[PATCH 1/2] arm64: zynqmp: Add resets to all GEMs

There is a need to get IP out of reset to operate properly.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp.dtsi | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 07d4d4b91201..2264a80e3312 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -533,6 +533,7 @@ #stream-id-cells = <1>; iommus = <&smmu 0x874>; power-domains = <&zynqmp_firmware PD_ETH_0>; + resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>; };
gem1: ethernet@ff0c0000 { @@ -547,6 +548,7 @@ #stream-id-cells = <1>; iommus = <&smmu 0x875>; power-domains = <&zynqmp_firmware PD_ETH_1>; + resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>; };
gem2: ethernet@ff0d0000 { @@ -561,6 +563,7 @@ #stream-id-cells = <1>; iommus = <&smmu 0x876>; power-domains = <&zynqmp_firmware PD_ETH_2>; + resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>; };
gem3: ethernet@ff0e0000 { @@ -575,6 +578,7 @@ #stream-id-cells = <1>; iommus = <&smmu 0x877>; power-domains = <&zynqmp_firmware PD_ETH_3>; + resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>; };
gpio: gpio@ff0a0000 {

Remove clock-names from GEM nodes from clk-ccf because they should be only present in zynqmp.dtsi. And as is visible both clock-names defined didn't really match.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynqmp-clk-ccf.dtsi | 4 ---- arch/arm/dts/zynqmp.dtsi | 8 ++++---- 2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index b27b0aaf7c9b..664e65896d7e 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -169,28 +169,24 @@ clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>, <&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>, <&zynqmp_clk GEM_TSU>; - clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; };
&gem1 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>, <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>, <&zynqmp_clk GEM_TSU>; - clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; };
&gem2 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM2_REF>, <&zynqmp_clk GEM2_TX>, <&zynqmp_clk GEM2_RX>, <&zynqmp_clk GEM_TSU>; - clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; };
&gem3 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM3_REF>, <&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_RX>, <&zynqmp_clk GEM_TSU>; - clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; };
&gpio { diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 2264a80e3312..015a582d7a79 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -527,7 +527,7 @@ interrupt-parent = <&gic>; interrupts = <0 57 4>, <0 57 4>; reg = <0x0 0xff0b0000 0x0 0x1000>; - clock-names = "pclk", "hclk", "tx_clk"; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; @@ -542,7 +542,7 @@ interrupt-parent = <&gic>; interrupts = <0 59 4>, <0 59 4>; reg = <0x0 0xff0c0000 0x0 0x1000>; - clock-names = "pclk", "hclk", "tx_clk"; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; @@ -557,7 +557,7 @@ interrupt-parent = <&gic>; interrupts = <0 61 4>, <0 61 4>; reg = <0x0 0xff0d0000 0x0 0x1000>; - clock-names = "pclk", "hclk", "tx_clk"; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>; @@ -572,7 +572,7 @@ interrupt-parent = <&gic>; interrupts = <0 63 4>, <0 63 4>; reg = <0x0 0xff0e0000 0x0 0x1000>; - clock-names = "pclk", "hclk", "tx_clk"; + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>;

čt 18. 11. 2021 v 13:42 odesílatel Michal Simek michal.simek@xilinx.com napsal:
Remove clock-names from GEM nodes from clk-ccf because they should be only present in zynqmp.dtsi. And as is visible both clock-names defined didn't really match.
Signed-off-by: Michal Simek michal.simek@xilinx.com
arch/arm/dts/zynqmp-clk-ccf.dtsi | 4 ---- arch/arm/dts/zynqmp.dtsi | 8 ++++---- 2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index b27b0aaf7c9b..664e65896d7e 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -169,28 +169,24 @@ clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>, <&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>, <&zynqmp_clk GEM_TSU>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem1 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>, <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>, <&zynqmp_clk GEM_TSU>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem2 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM2_REF>, <&zynqmp_clk GEM2_TX>, <&zynqmp_clk GEM2_RX>, <&zynqmp_clk GEM_TSU>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem3 { clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM3_REF>, <&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_RX>, <&zynqmp_clk GEM_TSU>;
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gpio { diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 2264a80e3312..015a582d7a79 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -527,7 +527,7 @@ interrupt-parent = <&gic>; interrupts = <0 57 4>, <0 57 4>; reg = <0x0 0xff0b0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>;
@@ -542,7 +542,7 @@ interrupt-parent = <&gic>; interrupts = <0 59 4>, <0 59 4>; reg = <0x0 0xff0c0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>;
@@ -557,7 +557,7 @@ interrupt-parent = <&gic>; interrupts = <0 61 4>, <0 61 4>; reg = <0x0 0xff0d0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>;
@@ -572,7 +572,7 @@ interrupt-parent = <&gic>; interrupts = <0 63 4>, <0 63 4>; reg = <0x0 0xff0e0000 0x0 0x1000>;
clock-names = "pclk", "hclk", "tx_clk";
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; #address-cells = <1>; #size-cells = <0>; #stream-id-cells = <1>;
-- 2.33.1
Applied. M

čt 18. 11. 2021 v 13:42 odesílatel Michal Simek michal.simek@xilinx.com napsal:
There is a need to get IP out of reset to operate properly.
Signed-off-by: Michal Simek michal.simek@xilinx.com
arch/arm/dts/zynqmp.dtsi | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 07d4d4b91201..2264a80e3312 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -533,6 +533,7 @@ #stream-id-cells = <1>; iommus = <&smmu 0x874>; power-domains = <&zynqmp_firmware PD_ETH_0>;
resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>; }; gem1: ethernet@ff0c0000 {
@@ -547,6 +548,7 @@ #stream-id-cells = <1>; iommus = <&smmu 0x875>; power-domains = <&zynqmp_firmware PD_ETH_1>;
resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>; }; gem2: ethernet@ff0d0000 {
@@ -561,6 +563,7 @@ #stream-id-cells = <1>; iommus = <&smmu 0x876>; power-domains = <&zynqmp_firmware PD_ETH_2>;
resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>; }; gem3: ethernet@ff0e0000 {
@@ -575,6 +578,7 @@ #stream-id-cells = <1>; iommus = <&smmu 0x877>; power-domains = <&zynqmp_firmware PD_ETH_3>;
resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>; }; gpio: gpio@ff0a0000 {
-- 2.33.1
Applied. M
participants (2)
-
Michal Simek
-
Michal Simek