[PATCH v2 00/20] rockchip: add support for Theobroma JAGUAR SBC-RK3588-AMR

This adds all the necessary bits for adding support for Theobroma's new SBC.
JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and is targeting Autonomous Mobile Robots (AMR).
It features: * LPDDR4X (up to 16GB) * 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131) * PCIe 3.0 4-lane on M.2 M-key connector * PCIe 2.1 1-lane on M.2 E-key * USB 2.0 on M.2 E-key * 2x USB3 OTG type-c ports with DP Alt-Mode * USB2 host port * HDMI output * 2x camera connectors, each exposing: * 2-lane MIPI-CSI * 1v2, 1v8, 2v8 power rails * I2C bus * GPIOs * PPS input * CAN * RS485 UART * FAN connector * SD card slot * eMMC (up to 256GB) * RTC backup battery * Companion microcontroller * ISL1208 RTC emulation * AMC6821 PWM emulation * On/off buzzer control * Secure Element * 80-pin Mezzanine connector for daughterboards: * GPIOs * 1Gbps Ethernet * PCIe 2.1 1-lane * 2x 2-lane MIPI-CSI * ADC channel * I2C bus * PWM * UART * SPI * SDIO * CAN * I2S * 1v8, 3v3, 5v0, dc-in (12-24V) power rails
While at it, do some code cleanup and factoring out for Rockchip SoCs.
This also fixes issues with the SDMMC controller on all RK3588 boards being muxed into JTAG automatically and breaking SD card support.
This also binds the MMC controllers from RK3588 in U-Boot proper before relocation so that it's available for env_init(), be there any need for it (there's for Theobroma's RK3588 based products), and match all (except the RK356x family) Rockchip SoCs behavior.
Special attention should be brought to the rockchip_early_misc_init_r migration for Pinephone Pro and Pinebook Pro since they now also call rockchip_setup_macaddr() which they didn't until now.
This also do a few non-code changes for Ringneck PX30 and Puma RK3399.
Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- Changes in v2: - added missing dtb Make target in arch/arm/dts/Makefile - added some Rb - reworded some commit logs - fixed typo in pinebook/pinephone commits missing the -pro suffix - added removal of DDR52 and HS mode for eMMC following discussions from https://lore.kernel.org/u-boot/20240204205312.2342868-1-jonas@kwiboo.se/ - migrated plaintext board/theobroma-systems/jaguar_rk3588/README from earlier version to doc/board/theobroma-systems/jaguar_rk3588.rst in rST format - added commit for migration of plaintext board/theobroma-systems/puma_rk3399/README to doc/board/theobroma-systems/puma_rk3399.rst in rST format - added commit for migration of plaintext board/theobroma-systems/ringneck_px30/README to doc/board/theobroma-systems/ringneck_px30.rst in rST format - updated DTS in MAINTAINERS entry for Puma to match all Puma DTSes - updated product URL in ringneck's MAINTAINERS entry to work around HTTP404 - Link to v1: https://lore.kernel.org/r/20240123-jaguar-v1-0-1eec1c34953c@theobroma-system...
--- Quentin Schulz (20): rockchip: avoid out-of-bounds when computing cpuid rockchip: add weak function symbol called at the beginning of misc_init_r rockchip: google: gru: migrate to rockchip_early_misc_init_r rockchip: pine64: pinebook-pro: migrate to rockchip_early_misc_init_r rockchip: pine64: pinephone-pro: migrate to rockchip_early_misc_init_r rockchip: pine64: rockpro64: migrate to rockchip_early_misc_init_r rockchip: theobroma-systems: puma: migrate to rockchip_early_misc_init_r rockchip: theobroma-systems: ringneck: migrate to rockchip_early_misc_init_r rockchip: merge misc.c into board.c rockchip: transform rockchip_capsule_update_board_setup into a weak function symbol rockchip: rk3588: fix non-working SD controller if booting from other media rockchip: rk3588: add constants for some register address spaces rockchip: migrate hardware.h inclusion into appropriate files rockchip: include asm/io.h directly in asm/arch-rockchip/hardware.h rockchip: rk3588: bind MMC controllers in U-Boot proper pre-reloc board: rockchip: add Theobroma-Systems RK3588 Jaguar SBC rockchip: puma-rk3399: MAINTAINERS: use glob for dtses rockchip: rk3399-puma: migrate README to doc/board in rST format rockchip: ringneck_px30: migrate README to doc/board in rST format rockchip: ringneck_px30: update website link
arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3588-jaguar-u-boot.dtsi | 38 + arch/arm/dts/rk3588-jaguar.dts | 803 +++++++++++++++++++++ arch/arm/dts/rk3588s-u-boot.dtsi | 4 +- arch/arm/include/asm/arch-rockchip/cru_rk3588.h | 2 + arch/arm/include/asm/arch-rockchip/grf_rk3588.h | 24 + arch/arm/include/asm/arch-rockchip/hardware.h | 2 + arch/arm/include/asm/arch-rockchip/ioc_rk3588.h | 6 + arch/arm/include/asm/arch-rockchip/misc.h | 14 - arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/board.c | 139 +++- arch/arm/mach-rockchip/cpu-info.c | 1 - arch/arm/mach-rockchip/misc.c | 135 ---- arch/arm/mach-rockchip/px30/px30.c | 1 - arch/arm/mach-rockchip/rk3036/rk3036.c | 1 - arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 1 - arch/arm/mach-rockchip/rk3066/rk3066.c | 2 +- arch/arm/mach-rockchip/rk3188/rk3188.c | 1 - arch/arm/mach-rockchip/rk322x/rk322x.c | 1 - arch/arm/mach-rockchip/rk3288/rk3288.c | 1 - arch/arm/mach-rockchip/rk3308/rk3308.c | 1 - arch/arm/mach-rockchip/rk3328/rk3328.c | 1 - arch/arm/mach-rockchip/rk3368/rk3368.c | 1 - arch/arm/mach-rockchip/rk3399/rk3399.c | 1 - arch/arm/mach-rockchip/rk3568/rk3568.c | 1 - arch/arm/mach-rockchip/rk3588/Kconfig | 28 + arch/arm/mach-rockchip/rk3588/rk3588.c | 12 +- arch/arm/mach-rockchip/rv1126/rv1126.c | 1 - board/elgin/elgin_rv1108/elgin_rv1108.c | 1 - board/firefly/firefly-rk3308/roc_cc_rk3308.c | 1 - board/google/gru/gru.c | 21 +- .../pinebook-pro-rk3399/pinebook-pro-rk3399.c | 19 +- .../pinephone-pro-rk3399/pinephone-pro-rk3399.c | 18 +- board/pine64/rockpro64_rk3399/rockpro64-rk3399.c | 21 +- board/rockchip/evb_rv1108/evb_rv1108.c | 1 - board/theobroma-systems/jaguar_rk3588/Kconfig | 16 + board/theobroma-systems/jaguar_rk3588/MAINTAINERS | 13 + board/theobroma-systems/jaguar_rk3588/Makefile | 10 + .../jaguar_rk3588/jaguar_rk3588.c | 52 ++ board/theobroma-systems/puma_rk3399/MAINTAINERS | 3 +- board/theobroma-systems/puma_rk3399/README | 90 +-- board/theobroma-systems/puma_rk3399/puma-rk3399.c | 21 +- board/theobroma-systems/ringneck_px30/MAINTAINERS | 3 +- board/theobroma-systems/ringneck_px30/README | 70 +- .../ringneck_px30/ringneck-px30.c | 20 +- board/vamrs/rock960_rk3399/rock960-rk3399.c | 1 - configs/jaguar-rk3588_defconfig | 115 +++ doc/board/index.rst | 1 + doc/board/rockchip/rockchip.rst | 1 + doc/board/theobroma-systems/index.rst | 11 + doc/board/theobroma-systems/jaguar_rk3588.rst | 100 +++ doc/board/theobroma-systems/puma_rk3399.rst | 126 ++++ doc/board/theobroma-systems/ringneck_px30.rst | 95 +++ drivers/clk/rockchip/clk_pll.c | 1 - drivers/clk/rockchip/clk_px30.c | 1 - drivers/clk/rockchip/clk_rk3036.c | 1 - drivers/clk/rockchip/clk_rk3066.c | 1 - drivers/clk/rockchip/clk_rk3128.c | 1 - drivers/clk/rockchip/clk_rk3188.c | 1 - drivers/clk/rockchip/clk_rk322x.c | 1 - drivers/clk/rockchip/clk_rk3288.c | 1 - drivers/clk/rockchip/clk_rk3308.c | 1 - drivers/clk/rockchip/clk_rk3328.c | 1 - drivers/clk/rockchip/clk_rk3368.c | 1 - drivers/clk/rockchip/clk_rk3399.c | 1 - drivers/clk/rockchip/clk_rk3568.c | 1 - drivers/clk/rockchip/clk_rk3588.c | 1 - drivers/clk/rockchip/clk_rv1108.c | 1 - drivers/clk/rockchip/clk_rv1126.c | 1 - drivers/gpio/rk_gpio.c | 1 - drivers/net/gmac_rockchip.c | 1 - drivers/ram/rockchip/dmc-rk3368.c | 2 +- drivers/ram/rockchip/sdram_px30.c | 1 - drivers/ram/rockchip/sdram_rk3066.c | 1 - drivers/ram/rockchip/sdram_rk3188.c | 2 +- drivers/ram/rockchip/sdram_rk322x.c | 1 - drivers/ram/rockchip/sdram_rk3288.c | 2 +- drivers/ram/rockchip/sdram_rk3399.c | 1 - drivers/ram/rockchip/sdram_rv1126.c | 1 - drivers/rng/rockchip_rng.c | 1 - drivers/sysreset/sysreset_rockchip.c | 1 - drivers/video/rockchip/dw_mipi_dsi_rockchip.c | 1 - drivers/video/rockchip/rk3288_hdmi.c | 1 - drivers/video/rockchip/rk3288_mipi.c | 1 - drivers/video/rockchip/rk3288_vop.c | 1 - drivers/video/rockchip/rk3399_hdmi.c | 1 - drivers/video/rockchip/rk3399_mipi.c | 1 - drivers/video/rockchip/rk3399_vop.c | 1 - drivers/video/rockchip/rk_edp.c | 1 - drivers/video/rockchip/rk_hdmi.c | 1 - drivers/video/rockchip/rk_lvds.c | 1 - include/configs/jaguar_rk3588.h | 15 + include/configs/rk3036_common.h | 1 - include/configs/rk3066_common.h | 1 - include/configs/rk3188_common.h | 1 - include/configs/rk322x_common.h | 1 - include/configs/rk3288_common.h | 1 - include/configs/rk3368_common.h | 1 - include/configs/rv1108_common.h | 1 - 99 files changed, 1626 insertions(+), 491 deletions(-) --- base-commit: a4650bf65e4b7d3ef04c90ba8031374428e4a682 change-id: 20240123-jaguar-efd00e57f56c
Best regards,

From: Quentin Schulz quentin.schulz@theobroma-systems.com
The expected length of the cpuid, as passed with cpuid_length, determines the size of cpuid_str string. Therefore, care should be taken to make sure nothing is accessing data out-of-bounds.
Instead of using hardcoded values, derive them from cpuid_length.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/mach-rockchip/misc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c index 7d03f0c2b67..15397cff009 100644 --- a/arch/arm/mach-rockchip/misc.c +++ b/arch/arm/mach-rockchip/misc.c @@ -102,7 +102,7 @@ int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) int i;
memset(cpuid_str, 0, sizeof(cpuid_str)); - for (i = 0; i < 16; i++) + for (i = 0; i < cpuid_length; i++) sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
debug("cpuid: %s\n", cpuid_str); @@ -111,13 +111,13 @@ int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) * Mix the cpuid bytes using the same rules as in * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c */ - for (i = 0; i < 8; i++) { + for (i = 0; i < cpuid_length / 2; i++) { low[i] = cpuid[1 + (i << 1)]; high[i] = cpuid[i << 1]; }
- serialno = crc32_no_comp(0, low, 8); - serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32; + serialno = crc32_no_comp(0, low, cpuid_length / 2); + serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) << 32; snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
oldid = env_get("cpuid#");

On 2024-02-09 10:49, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
The expected length of the cpuid, as passed with cpuid_length, determines the size of cpuid_str string. Therefore, care should be taken to make sure nothing is accessing data out-of-bounds.
Instead of using hardcoded values, derive them from cpuid_length.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Looking good to me.
Reviewed-by: Dragan Simic dsimic@manjaro.org
arch/arm/mach-rockchip/misc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c index 7d03f0c2b67..15397cff009 100644 --- a/arch/arm/mach-rockchip/misc.c +++ b/arch/arm/mach-rockchip/misc.c @@ -102,7 +102,7 @@ int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) int i;
memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < 16; i++)
for (i = 0; i < cpuid_length; i++) sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
debug("cpuid: %s\n", cpuid_str);
@@ -111,13 +111,13 @@ int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) * Mix the cpuid bytes using the same rules as in * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c */
- for (i = 0; i < 8; i++) {
- for (i = 0; i < cpuid_length / 2; i++) { low[i] = cpuid[1 + (i << 1)]; high[i] = cpuid[i << 1]; }
- serialno = crc32_no_comp(0, low, 8);
- serialno |= (u64)crc32_no_comp(serialno, high, 8) << 32;
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32; snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
oldid = env_get("cpuid#");

From: Quentin Schulz quentin.schulz@theobroma-systems.com
Most Rockchip boards who override misc_init_r do it only to call another function and keep the rest unchanged. Therefore to allow for less duplication, let's just add a weak function symbol that is called inside misc_init_r.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Reviewed-by: Dragan Simic dsimic@manjaro.org Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/mach-rockchip/board.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 2620530e03f..d5cb59c10fa 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -297,6 +297,11 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) #endif
#ifdef CONFIG_MISC_INIT_R +__weak int rockchip_early_misc_init_r(void) +{ + return 0; +} + __weak int misc_init_r(void) { const u32 cpuid_offset = CFG_CPUID_OFFSET; @@ -304,6 +309,10 @@ __weak int misc_init_r(void) u8 cpuid[cpuid_length]; int ret;
+ ret = rockchip_early_misc_init_r(); + if (ret) + return ret; + ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); if (ret) return ret;

From: Quentin Schulz quentin.schulz@theobroma-systems.com
Only setup_iodomain() differs from the original misc_init_r from Rockchip mach code, so let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/google/gru/gru.c | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-)
diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c index fbcf845e87d..ecbf702b035 100644 --- a/board/google/gru/gru.c +++ b/board/google/gru/gru.c @@ -11,7 +11,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/arch-rockchip/misc.h>
#define GRF_IO_VSEL_BT656_SHIFT 0 #define GRF_IO_VSEL_AUDIO_SHIFT 1 @@ -85,24 +84,9 @@ static void setup_iodomain(void) 1 << PMUGRF_CON0_VOL_SHIFT)); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) { - const u32 cpuid_offset = 0x7; - const u32 cpuid_length = 0x10; - u8 cpuid[cpuid_length]; - int ret; - setup_iodomain();
- ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); - if (ret) - return ret; - - ret = rockchip_cpuid_set(cpuid, cpuid_length); - if (ret) - return ret; - - ret = rockchip_setup_macaddr(); - - return ret; + return 0; }

From: Quentin Schulz quentin.schulz@theobroma-systems.com
Compared to the original misc_init_r from Rockchip mach code, setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine. Let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip (the side effect being that rockchip_setup_macaddr() is back).
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c index 4ad780767ea..2408a367305 100644 --- a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c +++ b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c @@ -11,7 +11,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/arch-rockchip/misc.h> #include <linux/printk.h> #include <power/regulator.h>
@@ -54,23 +53,10 @@ static void setup_iodomain(void) rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) { - const u32 cpuid_offset = 0x7; - const u32 cpuid_length = 0x10; - u8 cpuid[cpuid_length]; - int ret; - setup_iodomain();
- ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); - if (ret) - return ret; - - ret = rockchip_cpuid_set(cpuid, cpuid_length); - if (ret) - return ret; - - return ret; + return 0; } #endif

On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Compared to the original misc_init_r from Rockchip mach code, setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine. Let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip (the side effect being that rockchip_setup_macaddr() is back).
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Looking good to me. Thank you for including the changes suggested in my earlier review.
Reviewed-by: Dragan Simic dsimic@manjaro.org
board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c index 4ad780767ea..2408a367305 100644 --- a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c +++ b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c @@ -11,7 +11,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/arch-rockchip/misc.h> #include <linux/printk.h> #include <power/regulator.h>
@@ -54,23 +53,10 @@ static void setup_iodomain(void) rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) {
const u32 cpuid_offset = 0x7;
const u32 cpuid_length = 0x10;
u8 cpuid[cpuid_length];
int ret;
setup_iodomain();
ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
if (ret)
return ret;
ret = rockchip_cpuid_set(cpuid, cpuid_length);
if (ret)
return ret;
return ret;
- return 0;
} #endif

On Fri, 9 Feb 2024 at 09:50, Quentin Schulz foss+uboot@0leil.net wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Compared to the original misc_init_r from Rockchip mach code, setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine. Let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip (the side effect being that rockchip_setup_macaddr() is back).
The Pinebook Pro doesn't have onboard ethernet, nor an alias defined, I wonder if rockchip_setup_macaddr should be gated on GMAC_ROCKCHIP or something similar. Otherwise: Reviewed-by: Peter Robinson pbrobinson@gmail.com
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c index 4ad780767ea..2408a367305 100644 --- a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c +++ b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c @@ -11,7 +11,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/arch-rockchip/misc.h> #include <linux/printk.h> #include <power/regulator.h>
@@ -54,23 +53,10 @@ static void setup_iodomain(void) rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) {
const u32 cpuid_offset = 0x7;
const u32 cpuid_length = 0x10;
u8 cpuid[cpuid_length];
int ret;
setup_iodomain();
ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
if (ret)
return ret;
ret = rockchip_cpuid_set(cpuid, cpuid_length);
if (ret)
return ret;
return ret;
return 0;
} #endif
-- 2.43.0

Hi Peter,
On 2/12/24 14:41, Peter Robinson wrote:
On Fri, 9 Feb 2024 at 09:50, Quentin Schulz foss+uboot@0leil.net wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Compared to the original misc_init_r from Rockchip mach code, setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine. Let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip (the side effect being that rockchip_setup_macaddr() is back).
The Pinebook Pro doesn't have onboard ethernet, nor an alias defined, I wonder if rockchip_setup_macaddr should be gated on GMAC_ROCKCHIP or something similar. Otherwise:
This was discussed here:
https://lore.kernel.org/u-boot/0d74e5e5482cd32d7cad714e731d4fb8@manjaro.org/ is the first message in the discussion, which raised the same question.
In short: - gating on GMAC_ROCKCHIP is not wise, - onboard Ethernet or not doesn't matter, it provides a sane mac address for any Ethernet device by default, based on the CPU ID.
Quoting Jonas:
"""
diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c index 7d03f0c2b679..ed5bdab5a648 100644 --- a/arch/arm/mach-rockchip/misc.c +++ b/arch/arm/mach-rockchip/misc.c @@ -23,7 +23,8 @@
int rockchip_setup_macaddr(void) { -#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256) +#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256) && \
- CONFIG_IS_ENABLED(GMAC_ROCKCHIP)
This would exclude any board not enabling GMAC_ROCKCHIP in U-Boot but want a mac-address being set in DT fixup. And for newer RK35xx SoCs the GMAC_ROCKCHIP driver is not used.
A new Kconfig option should be introduced if there is a need for some boards to disable this. """
What is the actual concern of yours for pinebook-pro and this function now running? I think what ultimately would result from this is at worst the environment "polluted" with ethaddrX env variable?
Cheers, Quentin

Hello Peter,
On 2024-02-12 14:41, Peter Robinson wrote:
On Fri, 9 Feb 2024 at 09:50, Quentin Schulz foss+uboot@0leil.net wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Compared to the original misc_init_r from Rockchip mach code, setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine. Let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip (the side effect being that rockchip_setup_macaddr() is back).
The Pinebook Pro doesn't have onboard ethernet, nor an alias defined, I wonder if rockchip_setup_macaddr should be gated on GMAC_ROCKCHIP or something similar. Otherwise:
It's the same with the Pinephone Pro, plus we've got the Pinephone, the PineTab, and the "OG" Pinebook with no Ethernet interfaces. I've already prepares patches that gate out the redundant code, and I'll send them over after a bit more testing.
Reviewed-by: Peter Robinson pbrobinson@gmail.com
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c index 4ad780767ea..2408a367305 100644 --- a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c +++ b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c @@ -11,7 +11,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/arch-rockchip/misc.h> #include <linux/printk.h> #include <power/regulator.h>
@@ -54,23 +53,10 @@ static void setup_iodomain(void) rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) {
const u32 cpuid_offset = 0x7;
const u32 cpuid_length = 0x10;
u8 cpuid[cpuid_length];
int ret;
setup_iodomain();
ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length,
cpuid);
if (ret)
return ret;
ret = rockchip_cpuid_set(cpuid, cpuid_length);
if (ret)
return ret;
return ret;
return 0;
} #endif
-- 2.43.0

From: Quentin Schulz quentin.schulz@theobroma-systems.com
Compared to the original misc_init_r from Rockchip mach code, setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine. Let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip (the side effect being that rockchip_setup_macaddr() is back).
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- .../pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c index b6ccbb9c1c4..de75ee329d8 100644 --- a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c +++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c @@ -12,7 +12,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/arch-rockchip/misc.h> #include <power/regulator.h>
#define GRF_IO_VSEL_BT565_GPIO2AB 1 @@ -56,23 +55,11 @@ static void setup_iodomain(void) rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) { - const u32 cpuid_offset = 0x7; - const u32 cpuid_length = 0x10; - u8 cpuid[cpuid_length]; - int ret; - setup_iodomain();
- ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); - if (ret) - return ret; - - ret = rockchip_cpuid_set(cpuid, cpuid_length); - if (ret) - return ret; + return 0;
- return ret; } #endif

On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Compared to the original misc_init_r from Rockchip mach code, setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine. Let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip (the side effect being that rockchip_setup_macaddr() is back).
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Looking good to me. Thank you for including the changes suggested in my earlier review.
Reviewed-by: Dragan Simic dsimic@manjaro.org
.../pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c index b6ccbb9c1c4..de75ee329d8 100644 --- a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c +++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c @@ -12,7 +12,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/arch-rockchip/misc.h> #include <power/regulator.h>
#define GRF_IO_VSEL_BT565_GPIO2AB 1 @@ -56,23 +55,11 @@ static void setup_iodomain(void) rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) {
const u32 cpuid_offset = 0x7;
const u32 cpuid_length = 0x10;
u8 cpuid[cpuid_length];
int ret;
setup_iodomain();
ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
if (ret)
return ret;
ret = rockchip_cpuid_set(cpuid, cpuid_length);
if (ret)
return ret;
- return 0;
- return ret;
} #endif

On Fri, 9 Feb 2024 at 09:50, Quentin Schulz foss+uboot@0leil.net wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Compared to the original misc_init_r from Rockchip mach code, setup_iodomain() is added and rockchip_setup_macaddr() is not called.
It is assumed adding rockchip_setup_macaddr() back is fine. Let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip (the side effect being that rockchip_setup_macaddr() is back).
Same as for my comment on the Pinebook Pro, there's no wired ethernet on these devices and the GMAC driver isn't enabled, I vaguely remember we might have excluded rockchip_setup_macaddr because of an error but that was some time ago.
Reviewed-by: Peter Robinson pbrobinson@gmail.com
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
.../pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c index b6ccbb9c1c4..de75ee329d8 100644 --- a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c +++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c @@ -12,7 +12,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/arch-rockchip/misc.h> #include <power/regulator.h>
#define GRF_IO_VSEL_BT565_GPIO2AB 1 @@ -56,23 +55,11 @@ static void setup_iodomain(void) rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) {
const u32 cpuid_offset = 0x7;
const u32 cpuid_length = 0x10;
u8 cpuid[cpuid_length];
int ret;
setup_iodomain();
ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
if (ret)
return ret;
ret = rockchip_cpuid_set(cpuid, cpuid_length);
if (ret)
return ret;
return 0;
return ret;
} #endif
-- 2.43.0

From: Quentin Schulz quentin.schulz@theobroma-systems.com
Only setup_iodomain() differs from the original misc_init_r from Rockchip mach code, so let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/pine64/rockpro64_rk3399/rockpro64-rk3399.c | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-)
diff --git a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c index d79084614f1..d0a694ead1d 100644 --- a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c +++ b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c @@ -11,7 +11,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/arch-rockchip/misc.h>
#define GRF_IO_VSEL_BT565_SHIFT 0 #define PMUGRF_CON0_VSEL_SHIFT 8 @@ -31,26 +30,11 @@ static void setup_iodomain(void) rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) { - const u32 cpuid_offset = 0x7; - const u32 cpuid_length = 0x10; - u8 cpuid[cpuid_length]; - int ret; - setup_iodomain();
- ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); - if (ret) - return ret; - - ret = rockchip_cpuid_set(cpuid, cpuid_length); - if (ret) - return ret; - - ret = rockchip_setup_macaddr(); - - return ret; + return 0; }
#endif

On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Only setup_iodomain() differs from the original misc_init_r from Rockchip mach code, so let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Looking good to me.
Reviewed-by: Dragan Simic dsimic@manjaro.org
board/pine64/rockpro64_rk3399/rockpro64-rk3399.c | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-)
diff --git a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c index d79084614f1..d0a694ead1d 100644 --- a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c +++ b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c @@ -11,7 +11,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/arch-rockchip/misc.h>
#define GRF_IO_VSEL_BT565_SHIFT 0 #define PMUGRF_CON0_VSEL_SHIFT 8 @@ -31,26 +30,11 @@ static void setup_iodomain(void) rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) {
const u32 cpuid_offset = 0x7;
const u32 cpuid_length = 0x10;
u8 cpuid[cpuid_length];
int ret;
setup_iodomain();
ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
if (ret)
return ret;
ret = rockchip_cpuid_set(cpuid, cpuid_length);
if (ret)
return ret;
ret = rockchip_setup_macaddr();
return ret;
- return 0;
}
#endif

On Fri, 9 Feb 2024 at 09:50, Quentin Schulz foss+uboot@0leil.net wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Only setup_iodomain() differs from the original misc_init_r from Rockchip mach code, so let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip.
Reviewed-by: Peter Robinson pbrobinson@gmail.com
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
board/pine64/rockpro64_rk3399/rockpro64-rk3399.c | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-)
diff --git a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c index d79084614f1..d0a694ead1d 100644 --- a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c +++ b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c @@ -11,7 +11,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/arch-rockchip/misc.h>
#define GRF_IO_VSEL_BT565_SHIFT 0 #define PMUGRF_CON0_VSEL_SHIFT 8 @@ -31,26 +30,11 @@ static void setup_iodomain(void) rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) {
const u32 cpuid_offset = 0x7;
const u32 cpuid_length = 0x10;
u8 cpuid[cpuid_length];
int ret;
setup_iodomain();
ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
if (ret)
return ret;
ret = rockchip_cpuid_set(cpuid, cpuid_length);
if (ret)
return ret;
ret = rockchip_setup_macaddr();
return ret;
return 0;
}
#endif
-- 2.43.0

From: Quentin Schulz quentin.schulz@theobroma-systems.com
Only setup_iodomain() and setup_boottargets differ from the original misc_init_r from Rockchip mach code, so let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/theobroma-systems/puma_rk3399/puma-rk3399.c | 20 +------------------- 1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c index a82f97b2d54..98a818b135d 100644 --- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c +++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c @@ -10,7 +10,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/grf_rk3399.h> -#include <asm/arch-rockchip/misc.h> #include "../common/common.h"
static void setup_iodomain(void) @@ -27,25 +26,8 @@ static void setup_iodomain(void) rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_GPIO4CD_SHIFT); }
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) { - const u32 cpuid_offset = 0x7; - const u32 cpuid_length = 0x10; - u8 cpuid[cpuid_length]; - int ret; - - ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); - if (ret) - return ret; - - ret = rockchip_cpuid_set(cpuid, cpuid_length); - if (ret) - return ret; - - ret = rockchip_setup_macaddr(); - if (ret) - return ret; - setup_iodomain(); setup_boottargets();

From: Quentin Schulz quentin.schulz@theobroma-systems.com
Only setup_boottargets differs from the original misc_init_r from Rockchip mach code, so let's use rockchip_early_misc_init_r instead of reimplementing the whole misc_init_r from Rockchip.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- .../theobroma-systems/ringneck_px30/ringneck-px30.c | 20 +------------------- 1 file changed, 1 insertion(+), 19 deletions(-)
diff --git a/board/theobroma-systems/ringneck_px30/ringneck-px30.c b/board/theobroma-systems/ringneck_px30/ringneck-px30.c index ff7e414303d..bfebfe5136d 100644 --- a/board/theobroma-systems/ringneck_px30/ringneck-px30.c +++ b/board/theobroma-systems/ringneck_px30/ringneck-px30.c @@ -4,29 +4,11 @@ */
#include <asm/gpio.h> -#include <asm/arch-rockchip/misc.h> #include <linux/delay.h> #include "../common/common.h"
-int misc_init_r(void) +int rockchip_early_misc_init_r(void) { - const u32 cpuid_offset = 0x7; - const u32 cpuid_length = 0x10; - u8 cpuid[cpuid_length]; - int ret; - - ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid); - if (ret) - return ret; - - ret = rockchip_cpuid_set(cpuid, cpuid_length); - if (ret) - return ret; - - ret = rockchip_setup_macaddr(); - if (ret) - return ret; - setup_boottargets();
return 0;

From: Quentin Schulz quentin.schulz@theobroma-systems.com
The functions aren't used anywhere else than in board.c, therefore, let's not expose them anymore at all.
This merges misc.c and board.c together and removes the functions from the misc.h header file.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/include/asm/arch-rockchip/misc.h | 5 -- arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/board.c | 125 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/misc.c | 135 ------------------------------ 4 files changed, 125 insertions(+), 141 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/misc.h b/arch/arm/include/asm/arch-rockchip/misc.h index 4155af8c3b0..ef37ff1661a 100644 --- a/arch/arm/include/asm/arch-rockchip/misc.h +++ b/arch/arm/include/asm/arch-rockchip/misc.h @@ -6,9 +6,4 @@ * Rohan Garg rohan.garg@collabora.com */
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset, - const u32 cpuid_length, - u8 *cpuid); -int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length); -int rockchip_setup_macaddr(void); void rockchip_capsule_update_board_setup(void); diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 1dc92066bbf..c07bdaee4c3 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -23,7 +23,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # meaning "turn it off". obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o -obj-$(CONFIG_MISC_INIT_R) += misc.o endif
ifeq ($(CONFIG_TPL_BUILD),) diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index d5cb59c10fa..80b4514852f 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -1,20 +1,32 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2019 Rockchip Electronics Co., Ltd. + * + * Copyright (C) 2019 Collabora Inc - https://www.collabora.com/ + * Rohan Garg rohan.garg@collabora.com + * + * Based on puma-rk3399.c: + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH */ #include <common.h> #include <clk.h> #include <cpu_func.h> +#include <env.h> #include <dm.h> #include <efi_loader.h> #include <fastboot.h> +#include <hash.h> #include <init.h> #include <log.h> #include <mmc.h> +#include <dm/uclass-internal.h> +#include <misc.h> #include <part.h> #include <ram.h> #include <syscon.h> #include <uuid.h> +#include <u-boot/crc.h> +#include <u-boot/sha256.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/arch-rockchip/boot_mode.h> @@ -297,6 +309,119 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) #endif
#ifdef CONFIG_MISC_INIT_R +int rockchip_setup_macaddr(void) +{ +#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256) + int ret; + const char *cpuid = env_get("cpuid#"); + u8 hash[SHA256_SUM_LEN]; + int size = sizeof(hash); + u8 mac_addr[6]; + + /* Only generate a MAC address, if none is set in the environment */ + if (env_get("ethaddr")) + return 0; + + if (!cpuid) { + debug("%s: could not retrieve 'cpuid#'\n", __func__); + return -1; + } + + ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size); + if (ret) { + debug("%s: failed to calculate SHA256\n", __func__); + return -1; + } + + /* Copy 6 bytes of the hash to base the MAC address on */ + memcpy(mac_addr, hash, 6); + + /* Make this a valid MAC address and set it */ + mac_addr[0] &= 0xfe; /* clear multicast bit */ + mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ + eth_env_set_enetaddr("ethaddr", mac_addr); + + /* Make a valid MAC address for ethernet1 */ + mac_addr[5] ^= 0x01; + eth_env_set_enetaddr("eth1addr", mac_addr); +#endif + return 0; +} + +int rockchip_cpuid_from_efuse(const u32 cpuid_offset, + const u32 cpuid_length, + u8 *cpuid) +{ +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP) + struct udevice *dev; + int ret; + + /* retrieve the device */ +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(rockchip_efuse), &dev); +#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP) + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_DRIVER_GET(rockchip_otp), &dev); +#endif + if (ret) { + debug("%s: could not find efuse device\n", __func__); + return -1; + } + + /* read the cpu_id range from the efuses */ + ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length); + if (ret < 0) { + debug("%s: reading cpuid from the efuses failed\n", + __func__); + return -1; + } +#endif + return 0; +} + +int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) +{ + u8 low[cpuid_length / 2], high[cpuid_length / 2]; + char cpuid_str[cpuid_length * 2 + 1]; + u64 serialno; + char serialno_str[17]; + const char *oldid; + int i; + + memset(cpuid_str, 0, sizeof(cpuid_str)); + for (i = 0; i < cpuid_length; i++) + sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]); + + debug("cpuid: %s\n", cpuid_str); + + /* + * Mix the cpuid bytes using the same rules as in + * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c + */ + for (i = 0; i < cpuid_length / 2; i++) { + low[i] = cpuid[1 + (i << 1)]; + high[i] = cpuid[i << 1]; + } + + serialno = crc32_no_comp(0, low, cpuid_length / 2); + serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) << 32; + snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno); + + oldid = env_get("cpuid#"); + if (oldid && strcmp(oldid, cpuid_str) != 0) + printf("cpuid: value %s present in env does not match hardware %s\n", + oldid, cpuid_str); + + env_set("cpuid#", cpuid_str); + + /* Only generate serial# when none is set yet */ + if (!env_get("serial#")) + env_set("serial#", serialno_str); + + return 0; +} + __weak int rockchip_early_misc_init_r(void) { return 0; diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c deleted file mode 100644 index 15397cff009..00000000000 --- a/arch/arm/mach-rockchip/misc.c +++ /dev/null @@ -1,135 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * RK3399: Architecture common definitions - * - * Copyright (C) 2019 Collabora Inc - https://www.collabora.com/ - * Rohan Garg rohan.garg@collabora.com - * - * Based on puma-rk3399.c: - * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH - */ - -#include <common.h> -#include <env.h> -#include <dm.h> -#include <hash.h> -#include <log.h> -#include <dm/uclass-internal.h> -#include <misc.h> -#include <u-boot/crc.h> -#include <u-boot/sha256.h> - -#include <asm/arch-rockchip/misc.h> - -int rockchip_setup_macaddr(void) -{ -#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256) - int ret; - const char *cpuid = env_get("cpuid#"); - u8 hash[SHA256_SUM_LEN]; - int size = sizeof(hash); - u8 mac_addr[6]; - - /* Only generate a MAC address, if none is set in the environment */ - if (env_get("ethaddr")) - return 0; - - if (!cpuid) { - debug("%s: could not retrieve 'cpuid#'\n", __func__); - return -1; - } - - ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, &size); - if (ret) { - debug("%s: failed to calculate SHA256\n", __func__); - return -1; - } - - /* Copy 6 bytes of the hash to base the MAC address on */ - memcpy(mac_addr, hash, 6); - - /* Make this a valid MAC address and set it */ - mac_addr[0] &= 0xfe; /* clear multicast bit */ - mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ - eth_env_set_enetaddr("ethaddr", mac_addr); - - /* Make a valid MAC address for ethernet1 */ - mac_addr[5] ^= 0x01; - eth_env_set_enetaddr("eth1addr", mac_addr); -#endif - return 0; -} - -int rockchip_cpuid_from_efuse(const u32 cpuid_offset, - const u32 cpuid_length, - u8 *cpuid) -{ -#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP) - struct udevice *dev; - int ret; - - /* retrieve the device */ -#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) - ret = uclass_get_device_by_driver(UCLASS_MISC, - DM_DRIVER_GET(rockchip_efuse), &dev); -#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP) - ret = uclass_get_device_by_driver(UCLASS_MISC, - DM_DRIVER_GET(rockchip_otp), &dev); -#endif - if (ret) { - debug("%s: could not find efuse device\n", __func__); - return -1; - } - - /* read the cpu_id range from the efuses */ - ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length); - if (ret < 0) { - debug("%s: reading cpuid from the efuses failed\n", - __func__); - return -1; - } -#endif - return 0; -} - -int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) -{ - u8 low[cpuid_length / 2], high[cpuid_length / 2]; - char cpuid_str[cpuid_length * 2 + 1]; - u64 serialno; - char serialno_str[17]; - const char *oldid; - int i; - - memset(cpuid_str, 0, sizeof(cpuid_str)); - for (i = 0; i < cpuid_length; i++) - sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]); - - debug("cpuid: %s\n", cpuid_str); - - /* - * Mix the cpuid bytes using the same rules as in - * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c - */ - for (i = 0; i < cpuid_length / 2; i++) { - low[i] = cpuid[1 + (i << 1)]; - high[i] = cpuid[i << 1]; - } - - serialno = crc32_no_comp(0, low, cpuid_length / 2); - serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) << 32; - snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno); - - oldid = env_get("cpuid#"); - if (oldid && strcmp(oldid, cpuid_str) != 0) - printf("cpuid: value %s present in env does not match hardware %s\n", - oldid, cpuid_str); - - env_set("cpuid#", cpuid_str); - - /* Only generate serial# when none is set yet */ - if (!env_get("serial#")) - env_set("serial#", serialno_str); - - return 0; -}

Hello Quentin,
Please, see my comments below.
On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
The functions aren't used anywhere else than in board.c, therefore, let's not expose them anymore at all.
This merges misc.c and board.c together and removes the functions from the misc.h header file.
The patches I'm going to send, which exclude the unneeded code from the U-Boot images for the Pinebook Pro and the Pinebook Pro, change the code that this patch moves around.
Perhaps it would be better to have the move of the code and the subsequent changes to it performed in a separate series, to make checking and accepting the patches simpler as a group, and to perhaps make it a bit more clear what actually happened to anyone going through the repository history later.
Thus, I was wondering would you, please, be fine with excluding this patch from this series and letting me submit it, with proper attribution tags, of course, as part of the series I'll submit in the next couple of days?
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
arch/arm/include/asm/arch-rockchip/misc.h | 5 -- arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/board.c | 125 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/misc.c | 135
4 files changed, 125 insertions(+), 141 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/misc.h b/arch/arm/include/asm/arch-rockchip/misc.h index 4155af8c3b0..ef37ff1661a 100644 --- a/arch/arm/include/asm/arch-rockchip/misc.h +++ b/arch/arm/include/asm/arch-rockchip/misc.h @@ -6,9 +6,4 @@
Rohan Garg <rohan.garg@collabora.com>
*/
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid);
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length); -int rockchip_setup_macaddr(void); void rockchip_capsule_update_board_setup(void); diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 1dc92066bbf..c07bdaee4c3 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -23,7 +23,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # meaning "turn it off". obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o -obj-$(CONFIG_MISC_INIT_R) += misc.o endif
ifeq ($(CONFIG_TPL_BUILD),) diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index d5cb59c10fa..80b4514852f 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -1,20 +1,32 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- (C) Copyright 2019 Rockchip Electronics Co., Ltd.
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH */ #include <common.h> #include <clk.h> #include <cpu_func.h> +#include <env.h> #include <dm.h> #include <efi_loader.h> #include <fastboot.h> +#include <hash.h> #include <init.h> #include <log.h> #include <mmc.h> +#include <dm/uclass-internal.h> +#include <misc.h> #include <part.h> #include <ram.h> #include <syscon.h> #include <uuid.h> +#include <u-boot/crc.h> +#include <u-boot/sha256.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/arch-rockchip/boot_mode.h> @@ -297,6 +309,119 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) #endif
#ifdef CONFIG_MISC_INIT_R +int rockchip_setup_macaddr(void) +{ +#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
+#endif
- return 0;
+}
+int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
+{ +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
+#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
+#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
+#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
+#endif
- return 0;
+}
+int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) +{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
* Mix the cpuid bytes using the same rules as in
* ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
*/
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
+}
__weak int rockchip_early_misc_init_r(void) { return 0; diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c deleted file mode 100644 index 15397cff009..00000000000 --- a/arch/arm/mach-rockchip/misc.c +++ /dev/null @@ -1,135 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- RK3399: Architecture common definitions
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH
- */
-#include <common.h> -#include <env.h> -#include <dm.h> -#include <hash.h> -#include <log.h> -#include <dm/uclass-internal.h> -#include <misc.h> -#include <u-boot/crc.h> -#include <u-boot/sha256.h>
-#include <asm/arch-rockchip/misc.h>
-int rockchip_setup_macaddr(void) -{ -#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
-#endif
- return 0;
-}
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
-{ -#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
-#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
-#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
-#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
-#endif
- return 0;
-}
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) -{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
* Mix the cpuid bytes using the same rules as in
* ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
*/
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
-}

Date: Fri, 09 Feb 2024 18:58:01 +0100 From: Dragan Simic dsimic@manjaro.org
Hello Quentin,
Please, see my comments below.
On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
The functions aren't used anywhere else than in board.c, therefore, let's not expose them anymore at all.
This merges misc.c and board.c together and removes the functions from the misc.h header file.
The patches I'm going to send, which exclude the unneeded code from the U-Boot images for the Pinebook Pro and the Pinebook Pro, change the code that this patch moves around.
Perhaps it would be better to have the move of the code and the subsequent changes to it performed in a separate series, to make checking and accepting the patches simpler as a group, and to perhaps make it a bit more clear what actually happened to anyone going through the repository history later.
Thus, I was wondering would you, please, be fine with excluding this patch from this series and letting me submit it, with proper attribution tags, of course, as part of the series I'll submit in the next couple of days?
Hello Dragan,
I'm not covinced your patches are a good idea. Unless we're running into space constraints, or if there are noticable slowdowns in the boot process because of the extra code, I really don't see what the benefit of further differentiation between rk3399 boards would be. It just makes testing things harder.
The smaller the number of special snow flakes, the better!
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
arch/arm/include/asm/arch-rockchip/misc.h | 5 -- arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/board.c | 125 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/misc.c | 135
4 files changed, 125 insertions(+), 141 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/misc.h b/arch/arm/include/asm/arch-rockchip/misc.h index 4155af8c3b0..ef37ff1661a 100644 --- a/arch/arm/include/asm/arch-rockchip/misc.h +++ b/arch/arm/include/asm/arch-rockchip/misc.h @@ -6,9 +6,4 @@
Rohan Garg <rohan.garg@collabora.com>
*/
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid);
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length); -int rockchip_setup_macaddr(void); void rockchip_capsule_update_board_setup(void); diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 1dc92066bbf..c07bdaee4c3 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -23,7 +23,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # meaning "turn it off". obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o -obj-$(CONFIG_MISC_INIT_R) += misc.o endif
ifeq ($(CONFIG_TPL_BUILD),) diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index d5cb59c10fa..80b4514852f 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -1,20 +1,32 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- (C) Copyright 2019 Rockchip Electronics Co., Ltd.
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH */ #include <common.h> #include <clk.h> #include <cpu_func.h> +#include <env.h> #include <dm.h> #include <efi_loader.h> #include <fastboot.h> +#include <hash.h> #include <init.h> #include <log.h> #include <mmc.h> +#include <dm/uclass-internal.h> +#include <misc.h> #include <part.h> #include <ram.h> #include <syscon.h> #include <uuid.h> +#include <u-boot/crc.h> +#include <u-boot/sha256.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/arch-rockchip/boot_mode.h> @@ -297,6 +309,119 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) #endif
#ifdef CONFIG_MISC_INIT_R +int rockchip_setup_macaddr(void) +{ +#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
+#endif
- return 0;
+}
+int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
+{ +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
+#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
+#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
+#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
+#endif
- return 0;
+}
+int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) +{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
* Mix the cpuid bytes using the same rules as in
* ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
*/
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
+}
__weak int rockchip_early_misc_init_r(void) { return 0; diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c deleted file mode 100644 index 15397cff009..00000000000 --- a/arch/arm/mach-rockchip/misc.c +++ /dev/null @@ -1,135 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- RK3399: Architecture common definitions
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH
- */
-#include <common.h> -#include <env.h> -#include <dm.h> -#include <hash.h> -#include <log.h> -#include <dm/uclass-internal.h> -#include <misc.h> -#include <u-boot/crc.h> -#include <u-boot/sha256.h>
-#include <asm/arch-rockchip/misc.h>
-int rockchip_setup_macaddr(void) -{ -#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
-#endif
- return 0;
-}
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
-{ -#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
-#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
-#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
-#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
-#endif
- return 0;
-}
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) -{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
* Mix the cpuid bytes using the same rules as in
* ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
*/
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
-}

Hello Mark,
On 2024-02-09 19:36, Mark Kettenis wrote:
Date: Fri, 09 Feb 2024 18:58:01 +0100 From: Dragan Simic dsimic@manjaro.org Please, see my comments below.
On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
The functions aren't used anywhere else than in board.c, therefore, let's not expose them anymore at all.
This merges misc.c and board.c together and removes the functions from the misc.h header file.
The patches I'm going to send, which exclude the unneeded code from the U-Boot images for the Pinebook Pro and the Pinebook Pro, change the code that this patch moves around.
Perhaps it would be better to have the move of the code and the subsequent changes to it performed in a separate series, to make checking and accepting the patches simpler as a group, and to perhaps make it a bit more clear what actually happened to anyone going through the repository history later.
Thus, I was wondering would you, please, be fine with excluding this patch from this series and letting me submit it, with proper attribution tags, of course, as part of the series I'll submit in the next couple of days?
I'm not covinced your patches are a good idea. Unless we're running into space constraints, or if there are noticable slowdowns in the boot process because of the extra code, I really don't see what the benefit of further differentiation between rk3399 boards would be. It just makes testing things harder.
Oh, I fully understand your position, but please let's also keep in mind that the subject of those patches are actual devices with pretty much fixed hardware configurations, instead of targeting development boards whose actual hardware configurations, at least in theory, depend on the user.
In addition to preventing the unneeded code from entering the U-Boot images, my patches would also prevent useless "ethaddr" and "eth1addr" from appearing in the saved environments on those devices. I think that's useful and may actually prevent some confusion when the saved environment is checked by the users on those devices.
The smaller the number of special snow flakes, the better!
I'd agree that having fewer special cases helps, but again, handling the specifics of some devices also has its benefits. Additionally, perhaps simply the fact that those are actual devices makes them some kind of special snowflakes. :)
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
arch/arm/include/asm/arch-rockchip/misc.h | 5 -- arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/board.c | 125 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/misc.c | 135
4 files changed, 125 insertions(+), 141 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/misc.h b/arch/arm/include/asm/arch-rockchip/misc.h index 4155af8c3b0..ef37ff1661a 100644 --- a/arch/arm/include/asm/arch-rockchip/misc.h +++ b/arch/arm/include/asm/arch-rockchip/misc.h @@ -6,9 +6,4 @@
Rohan Garg <rohan.garg@collabora.com>
*/
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid);
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length); -int rockchip_setup_macaddr(void); void rockchip_capsule_update_board_setup(void); diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 1dc92066bbf..c07bdaee4c3 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -23,7 +23,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # meaning "turn it off". obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o -obj-$(CONFIG_MISC_INIT_R) += misc.o endif
ifeq ($(CONFIG_TPL_BUILD),) diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index d5cb59c10fa..80b4514852f 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -1,20 +1,32 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- (C) Copyright 2019 Rockchip Electronics Co., Ltd.
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH */ #include <common.h> #include <clk.h> #include <cpu_func.h> +#include <env.h> #include <dm.h> #include <efi_loader.h> #include <fastboot.h> +#include <hash.h> #include <init.h> #include <log.h> #include <mmc.h> +#include <dm/uclass-internal.h> +#include <misc.h> #include <part.h> #include <ram.h> #include <syscon.h> #include <uuid.h> +#include <u-boot/crc.h> +#include <u-boot/sha256.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/arch-rockchip/boot_mode.h> @@ -297,6 +309,119 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) #endif
#ifdef CONFIG_MISC_INIT_R +int rockchip_setup_macaddr(void) +{ +#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
+#endif
- return 0;
+}
+int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
+{ +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
+#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
+#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
+#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
+#endif
- return 0;
+}
+int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) +{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
* Mix the cpuid bytes using the same rules as in
* ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
*/
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
+}
__weak int rockchip_early_misc_init_r(void) { return 0; diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c deleted file mode 100644 index 15397cff009..00000000000 --- a/arch/arm/mach-rockchip/misc.c +++ /dev/null @@ -1,135 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- RK3399: Architecture common definitions
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH
- */
-#include <common.h> -#include <env.h> -#include <dm.h> -#include <hash.h> -#include <log.h> -#include <dm/uclass-internal.h> -#include <misc.h> -#include <u-boot/crc.h> -#include <u-boot/sha256.h>
-#include <asm/arch-rockchip/misc.h>
-int rockchip_setup_macaddr(void) -{ -#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
-#endif
- return 0;
-}
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
-{ -#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
-#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
-#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
-#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
-#endif
- return 0;
-}
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) -{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
* Mix the cpuid bytes using the same rules as in
* ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
*/
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
-}

On Fri, 9 Feb 2024 at 18:57, Dragan Simic dsimic@manjaro.org wrote:
Hello Mark,
On 2024-02-09 19:36, Mark Kettenis wrote:
Date: Fri, 09 Feb 2024 18:58:01 +0100 From: Dragan Simic dsimic@manjaro.org Please, see my comments below.
On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
The functions aren't used anywhere else than in board.c, therefore, let's not expose them anymore at all.
This merges misc.c and board.c together and removes the functions from the misc.h header file.
The patches I'm going to send, which exclude the unneeded code from the U-Boot images for the Pinebook Pro and the Pinebook Pro, change the code that this patch moves around.
Perhaps it would be better to have the move of the code and the subsequent changes to it performed in a separate series, to make checking and accepting the patches simpler as a group, and to perhaps make it a bit more clear what actually happened to anyone going through the repository history later.
Thus, I was wondering would you, please, be fine with excluding this patch from this series and letting me submit it, with proper attribution tags, of course, as part of the series I'll submit in the next couple of days?
I'm not covinced your patches are a good idea. Unless we're running into space constraints, or if there are noticable slowdowns in the boot process because of the extra code, I really don't see what the benefit of further differentiation between rk3399 boards would be. It just makes testing things harder.
Oh, I fully understand your position, but please let's also keep in mind that the subject of those patches are actual devices with pretty much fixed hardware configurations, instead of targeting development boards whose actual hardware configurations, at least in theory, depend on the user.
In addition to preventing the unneeded code from entering the U-Boot images, my patches would also prevent useless "ethaddr" and "eth1addr" from appearing in the saved environments on those devices. I think that's useful and may actually prevent some confusion when the saved environment is checked by the users on those devices.
Maybe that code should be guarded on if the wired ethernet is enabled or not. Would allow one code but the ability to disable it when the ethernet isn't used.
The smaller the number of special snow flakes, the better!
I'd agree that having fewer special cases helps, but again, handling the specifics of some devices also has its benefits. Additionally, perhaps simply the fact that those are actual devices makes them some kind of special snowflakes. :)
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
arch/arm/include/asm/arch-rockchip/misc.h | 5 -- arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/board.c | 125 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/misc.c | 135
4 files changed, 125 insertions(+), 141 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/misc.h b/arch/arm/include/asm/arch-rockchip/misc.h index 4155af8c3b0..ef37ff1661a 100644 --- a/arch/arm/include/asm/arch-rockchip/misc.h +++ b/arch/arm/include/asm/arch-rockchip/misc.h @@ -6,9 +6,4 @@
Rohan Garg <rohan.garg@collabora.com>
*/
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid);
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length); -int rockchip_setup_macaddr(void); void rockchip_capsule_update_board_setup(void); diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 1dc92066bbf..c07bdaee4c3 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -23,7 +23,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # meaning "turn it off". obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o -obj-$(CONFIG_MISC_INIT_R) += misc.o endif
ifeq ($(CONFIG_TPL_BUILD),) diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index d5cb59c10fa..80b4514852f 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -1,20 +1,32 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- (C) Copyright 2019 Rockchip Electronics Co., Ltd.
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH */ #include <common.h> #include <clk.h> #include <cpu_func.h> +#include <env.h> #include <dm.h> #include <efi_loader.h> #include <fastboot.h> +#include <hash.h> #include <init.h> #include <log.h> #include <mmc.h> +#include <dm/uclass-internal.h> +#include <misc.h> #include <part.h> #include <ram.h> #include <syscon.h> #include <uuid.h> +#include <u-boot/crc.h> +#include <u-boot/sha256.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/arch-rockchip/boot_mode.h> @@ -297,6 +309,119 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) #endif
#ifdef CONFIG_MISC_INIT_R +int rockchip_setup_macaddr(void) +{ +#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
+#endif
- return 0;
+}
+int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
+{ +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
+#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
+#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
+#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
+#endif
- return 0;
+}
+int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) +{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
- Mix the cpuid bytes using the same rules as in
- ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
- */
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
+}
__weak int rockchip_early_misc_init_r(void) { return 0; diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c deleted file mode 100644 index 15397cff009..00000000000 --- a/arch/arm/mach-rockchip/misc.c +++ /dev/null @@ -1,135 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- RK3399: Architecture common definitions
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH
- */
-#include <common.h> -#include <env.h> -#include <dm.h> -#include <hash.h> -#include <log.h> -#include <dm/uclass-internal.h> -#include <misc.h> -#include <u-boot/crc.h> -#include <u-boot/sha256.h>
-#include <asm/arch-rockchip/misc.h>
-int rockchip_setup_macaddr(void) -{ -#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
-#endif
- return 0;
-}
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
-{ -#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
-#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
-#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
-#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
-#endif
- return 0;
-}
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) -{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
- Mix the cpuid bytes using the same rules as in
- ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
- */
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
-}

Hello Peter,
On 2024-02-12 14:56, Peter Robinson wrote:
On Fri, 9 Feb 2024 at 18:57, Dragan Simic dsimic@manjaro.org wrote:
On 2024-02-09 19:36, Mark Kettenis wrote:
Date: Fri, 09 Feb 2024 18:58:01 +0100 From: Dragan Simic dsimic@manjaro.org Please, see my comments below.
On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
The functions aren't used anywhere else than in board.c, therefore, let's not expose them anymore at all.
This merges misc.c and board.c together and removes the functions from the misc.h header file.
The patches I'm going to send, which exclude the unneeded code from the U-Boot images for the Pinebook Pro and the Pinebook Pro, change the code that this patch moves around.
Perhaps it would be better to have the move of the code and the subsequent changes to it performed in a separate series, to make checking and accepting the patches simpler as a group, and to perhaps make it a bit more clear what actually happened to anyone going through the repository history later.
Thus, I was wondering would you, please, be fine with excluding this patch from this series and letting me submit it, with proper attribution tags, of course, as part of the series I'll submit in the next couple of days?
I'm not covinced your patches are a good idea. Unless we're running into space constraints, or if there are noticable slowdowns in the boot process because of the extra code, I really don't see what the benefit of further differentiation between rk3399 boards would be. It just makes testing things harder.
Oh, I fully understand your position, but please let's also keep in mind that the subject of those patches are actual devices with pretty much fixed hardware configurations, instead of targeting development boards whose actual hardware configurations, at least in theory, depend on the user.
In addition to preventing the unneeded code from entering the U-Boot images, my patches would also prevent useless "ethaddr" and "eth1addr" from appearing in the saved environments on those devices. I think that's useful and may actually prevent some confusion when the saved environment is checked by the users on those devices.
Maybe that code should be guarded on if the wired ethernet is enabled or not. Would allow one code but the ability to disable it when the ethernet isn't used.
Basically, we can't know for sure are the users going to supply some DT overlays that add another Ethernet interface to an SBC, for example a Fast Ethernet interface on RK3328-based SBCs, which is the reason why we can't rely on the built-in DT to decide whether to provide the stable MAC addresses or not.
However, it's highly unlikely that an Ethernet interface is going to be added to a fixed-configuration device such as the Pinebook Pro or the Pinephone. Other than plugging in a USB Ethernet dongle, that is, which already come with fixed MACA addresses. Thus, not providing stable MAC addresses should be just fine for such fixed- configuration devices.
The smaller the number of special snow flakes, the better!
I'd agree that having fewer special cases helps, but again, handling the specifics of some devices also has its benefits. Additionally, perhaps simply the fact that those are actual devices makes them some kind of special snowflakes. :)
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
arch/arm/include/asm/arch-rockchip/misc.h | 5 -- arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/board.c | 125 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/misc.c | 135
4 files changed, 125 insertions(+), 141 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/misc.h b/arch/arm/include/asm/arch-rockchip/misc.h index 4155af8c3b0..ef37ff1661a 100644 --- a/arch/arm/include/asm/arch-rockchip/misc.h +++ b/arch/arm/include/asm/arch-rockchip/misc.h @@ -6,9 +6,4 @@
Rohan Garg <rohan.garg@collabora.com>
*/
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid);
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length); -int rockchip_setup_macaddr(void); void rockchip_capsule_update_board_setup(void); diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 1dc92066bbf..c07bdaee4c3 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -23,7 +23,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # meaning "turn it off". obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o -obj-$(CONFIG_MISC_INIT_R) += misc.o endif
ifeq ($(CONFIG_TPL_BUILD),) diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index d5cb59c10fa..80b4514852f 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -1,20 +1,32 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- (C) Copyright 2019 Rockchip Electronics Co., Ltd.
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH */ #include <common.h> #include <clk.h> #include <cpu_func.h> +#include <env.h> #include <dm.h> #include <efi_loader.h> #include <fastboot.h> +#include <hash.h> #include <init.h> #include <log.h> #include <mmc.h> +#include <dm/uclass-internal.h> +#include <misc.h> #include <part.h> #include <ram.h> #include <syscon.h> #include <uuid.h> +#include <u-boot/crc.h> +#include <u-boot/sha256.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/arch-rockchip/boot_mode.h> @@ -297,6 +309,119 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) #endif
#ifdef CONFIG_MISC_INIT_R +int rockchip_setup_macaddr(void) +{ +#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
+#endif
- return 0;
+}
+int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
+{ +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
+#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
+#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
+#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
+#endif
- return 0;
+}
+int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) +{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
- Mix the cpuid bytes using the same rules as in
- ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
- */
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
+}
__weak int rockchip_early_misc_init_r(void) { return 0; diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c deleted file mode 100644 index 15397cff009..00000000000 --- a/arch/arm/mach-rockchip/misc.c +++ /dev/null @@ -1,135 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- RK3399: Architecture common definitions
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH
- */
-#include <common.h> -#include <env.h> -#include <dm.h> -#include <hash.h> -#include <log.h> -#include <dm/uclass-internal.h> -#include <misc.h> -#include <u-boot/crc.h> -#include <u-boot/sha256.h>
-#include <asm/arch-rockchip/misc.h>
-int rockchip_setup_macaddr(void) -{ -#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
-#endif
- return 0;
-}
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
-{ -#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
-#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
-#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
-#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
-#endif
- return 0;
-}
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) -{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
- Mix the cpuid bytes using the same rules as in
- ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
- */
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
-}

On Mon, 12 Feb 2024 at 14:16, Dragan Simic dsimic@manjaro.org wrote:
Hello Peter,
On 2024-02-12 14:56, Peter Robinson wrote:
On Fri, 9 Feb 2024 at 18:57, Dragan Simic dsimic@manjaro.org wrote:
On 2024-02-09 19:36, Mark Kettenis wrote:
Date: Fri, 09 Feb 2024 18:58:01 +0100 From: Dragan Simic dsimic@manjaro.org Please, see my comments below.
On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
The functions aren't used anywhere else than in board.c, therefore, let's not expose them anymore at all.
This merges misc.c and board.c together and removes the functions from the misc.h header file.
The patches I'm going to send, which exclude the unneeded code from the U-Boot images for the Pinebook Pro and the Pinebook Pro, change the code that this patch moves around.
Perhaps it would be better to have the move of the code and the subsequent changes to it performed in a separate series, to make checking and accepting the patches simpler as a group, and to perhaps make it a bit more clear what actually happened to anyone going through the repository history later.
Thus, I was wondering would you, please, be fine with excluding this patch from this series and letting me submit it, with proper attribution tags, of course, as part of the series I'll submit in the next couple of days?
I'm not covinced your patches are a good idea. Unless we're running into space constraints, or if there are noticable slowdowns in the boot process because of the extra code, I really don't see what the benefit of further differentiation between rk3399 boards would be. It just makes testing things harder.
Oh, I fully understand your position, but please let's also keep in mind that the subject of those patches are actual devices with pretty much fixed hardware configurations, instead of targeting development boards whose actual hardware configurations, at least in theory, depend on the user.
In addition to preventing the unneeded code from entering the U-Boot images, my patches would also prevent useless "ethaddr" and "eth1addr" from appearing in the saved environments on those devices. I think that's useful and may actually prevent some confusion when the saved environment is checked by the users on those devices.
Maybe that code should be guarded on if the wired ethernet is enabled or not. Would allow one code but the ability to disable it when the ethernet isn't used.
Basically, we can't know for sure are the users going to supply some DT overlays that add another Ethernet interface to an SBC, for example a Fast Ethernet interface on RK3328-based SBCs, which is the reason why we can't rely on the built-in DT to decide whether to provide the stable MAC addresses or not.
That will likely not be solvable with purely an overlay, they may need to enable drivers that aren't by default.
However, it's highly unlikely that an Ethernet interface is going to be added to a fixed-configuration device such as the Pinebook Pro or the Pinephone. Other than plugging in a USB Ethernet dongle, that is, which already come with fixed MACA addresses. Thus, not providing stable MAC addresses should be just fine for such fixed- configuration devices.
Don't disagree with that, which is why I did those configs like that.
The smaller the number of special snow flakes, the better!
I'd agree that having fewer special cases helps, but again, handling the specifics of some devices also has its benefits. Additionally, perhaps simply the fact that those are actual devices makes them some kind of special snowflakes. :)
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
arch/arm/include/asm/arch-rockchip/misc.h | 5 -- arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/board.c | 125 +++++++++++++++++++++++++++ arch/arm/mach-rockchip/misc.c | 135
4 files changed, 125 insertions(+), 141 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/misc.h b/arch/arm/include/asm/arch-rockchip/misc.h index 4155af8c3b0..ef37ff1661a 100644 --- a/arch/arm/include/asm/arch-rockchip/misc.h +++ b/arch/arm/include/asm/arch-rockchip/misc.h @@ -6,9 +6,4 @@
Rohan Garg <rohan.garg@collabora.com>
*/
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid);
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length); -int rockchip_setup_macaddr(void); void rockchip_capsule_update_board_setup(void); diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 1dc92066bbf..c07bdaee4c3 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -23,7 +23,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # meaning "turn it off". obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o -obj-$(CONFIG_MISC_INIT_R) += misc.o endif
ifeq ($(CONFIG_TPL_BUILD),) diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index d5cb59c10fa..80b4514852f 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -1,20 +1,32 @@ // SPDX-License-Identifier: GPL-2.0+ /*
- (C) Copyright 2019 Rockchip Electronics Co., Ltd.
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH */ #include <common.h> #include <clk.h> #include <cpu_func.h> +#include <env.h> #include <dm.h> #include <efi_loader.h> #include <fastboot.h> +#include <hash.h> #include <init.h> #include <log.h> #include <mmc.h> +#include <dm/uclass-internal.h> +#include <misc.h> #include <part.h> #include <ram.h> #include <syscon.h> #include <uuid.h> +#include <u-boot/crc.h> +#include <u-boot/sha256.h> #include <asm/cache.h> #include <asm/io.h> #include <asm/arch-rockchip/boot_mode.h> @@ -297,6 +309,119 @@ int fastboot_set_reboot_flag(enum fastboot_reboot_reason reason) #endif
#ifdef CONFIG_MISC_INIT_R +int rockchip_setup_macaddr(void) +{ +#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
+#endif
- return 0;
+}
+int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
+{ +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
+#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
+#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
+#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
+#endif
- return 0;
+}
+int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) +{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
- Mix the cpuid bytes using the same rules as in
- ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
- */
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
+}
__weak int rockchip_early_misc_init_r(void) { return 0; diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c deleted file mode 100644 index 15397cff009..00000000000 --- a/arch/arm/mach-rockchip/misc.c +++ /dev/null @@ -1,135 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- RK3399: Architecture common definitions
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- Based on puma-rk3399.c:
(C) Copyright 2017 Theobroma Systems Design und Consulting
GmbH
- */
-#include <common.h> -#include <env.h> -#include <dm.h> -#include <hash.h> -#include <log.h> -#include <dm/uclass-internal.h> -#include <misc.h> -#include <u-boot/crc.h> -#include <u-boot/sha256.h>
-#include <asm/arch-rockchip/misc.h>
-int rockchip_setup_macaddr(void) -{ -#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256)
- int ret;
- const char *cpuid = env_get("cpuid#");
- u8 hash[SHA256_SUM_LEN];
- int size = sizeof(hash);
- u8 mac_addr[6];
- /* Only generate a MAC address, if none is set in the environment */
- if (env_get("ethaddr"))
return 0;
- if (!cpuid) {
debug("%s: could not retrieve 'cpuid#'\n", __func__);
return -1;
- }
- ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash,
&size);
- if (ret) {
debug("%s: failed to calculate SHA256\n", __func__);
return -1;
- }
- /* Copy 6 bytes of the hash to base the MAC address on */
- memcpy(mac_addr, hash, 6);
- /* Make this a valid MAC address and set it */
- mac_addr[0] &= 0xfe; /* clear multicast bit */
- mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */
- eth_env_set_enetaddr("ethaddr", mac_addr);
- /* Make a valid MAC address for ethernet1 */
- mac_addr[5] ^= 0x01;
- eth_env_set_enetaddr("eth1addr", mac_addr);
-#endif
- return 0;
-}
-int rockchip_cpuid_from_efuse(const u32 cpuid_offset,
const u32 cpuid_length,
u8 *cpuid)
-{ -#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- struct udevice *dev;
- int ret;
- /* retrieve the device */
-#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_efuse), &dev);
-#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP)
- ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(rockchip_otp), &dev);
-#endif
- if (ret) {
debug("%s: could not find efuse device\n", __func__);
return -1;
- }
- /* read the cpu_id range from the efuses */
- ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length);
- if (ret < 0) {
debug("%s: reading cpuid from the efuses failed\n",
__func__);
return -1;
- }
-#endif
- return 0;
-}
-int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) -{
- u8 low[cpuid_length / 2], high[cpuid_length / 2];
- char cpuid_str[cpuid_length * 2 + 1];
- u64 serialno;
- char serialno_str[17];
- const char *oldid;
- int i;
- memset(cpuid_str, 0, sizeof(cpuid_str));
- for (i = 0; i < cpuid_length; i++)
sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]);
- debug("cpuid: %s\n", cpuid_str);
- /*
- Mix the cpuid bytes using the same rules as in
- ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c
- */
- for (i = 0; i < cpuid_length / 2; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
- }
- serialno = crc32_no_comp(0, low, cpuid_length / 2);
- serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) <<
32;
- snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno);
- oldid = env_get("cpuid#");
- if (oldid && strcmp(oldid, cpuid_str) != 0)
printf("cpuid: value %s present in env does not match hardware
%s\n",
oldid, cpuid_str);
- env_set("cpuid#", cpuid_str);
- /* Only generate serial# when none is set yet */
- if (!env_get("serial#"))
env_set("serial#", serialno_str);
- return 0;
-}

On 2024-02-12 15:21, Peter Robinson wrote:
On Mon, 12 Feb 2024 at 14:16, Dragan Simic dsimic@manjaro.org wrote:
On 2024-02-12 14:56, Peter Robinson wrote:
On Fri, 9 Feb 2024 at 18:57, Dragan Simic dsimic@manjaro.org wrote:
On 2024-02-09 19:36, Mark Kettenis wrote:
Date: Fri, 09 Feb 2024 18:58:01 +0100 From: Dragan Simic dsimic@manjaro.org Please, see my comments below.
On 2024-02-09 10:50, Quentin Schulz wrote: > From: Quentin Schulz quentin.schulz@theobroma-systems.com > > The functions aren't used anywhere else than in board.c, therefore, > let's not expose them anymore at all. > > This merges misc.c and board.c together and removes the functions from > the misc.h header file.
The patches I'm going to send, which exclude the unneeded code from the U-Boot images for the Pinebook Pro and the Pinebook Pro, change the code that this patch moves around.
Perhaps it would be better to have the move of the code and the subsequent changes to it performed in a separate series, to make checking and accepting the patches simpler as a group, and to perhaps make it a bit more clear what actually happened to anyone going through the repository history later.
Thus, I was wondering would you, please, be fine with excluding this patch from this series and letting me submit it, with proper attribution tags, of course, as part of the series I'll submit in the next couple of days?
I'm not covinced your patches are a good idea. Unless we're running into space constraints, or if there are noticable slowdowns in the boot process because of the extra code, I really don't see what the benefit of further differentiation between rk3399 boards would be. It just makes testing things harder.
Oh, I fully understand your position, but please let's also keep in mind that the subject of those patches are actual devices with pretty much fixed hardware configurations, instead of targeting development boards whose actual hardware configurations, at least in theory, depend on the user.
In addition to preventing the unneeded code from entering the U-Boot images, my patches would also prevent useless "ethaddr" and "eth1addr" from appearing in the saved environments on those devices. I think that's useful and may actually prevent some confusion when the saved environment is checked by the users on those devices.
Maybe that code should be guarded on if the wired ethernet is enabled or not. Would allow one code but the ability to disable it when the ethernet isn't used.
Basically, we can't know for sure are the users going to supply some DT overlays that add another Ethernet interface to an SBC, for example a Fast Ethernet interface on RK3328-based SBCs, which is the reason why we can't rely on the built-in DT to decide whether to provide the stable MAC addresses or not.
That will likely not be solvable with purely an overlay, they may need to enable drivers that aren't by default.
Sure, but from the Linux kernel's perspective, if the additional Ethernet interface isn't going to be used in U-Boot, all the kernel wants from U-Boot is the fixed MAC address in the DT.
By the way, I've got a hopefully neat Linux kernel patch in the works, which will make the testing of fixed MAC addresses being passed around correctly a bit easier.
However, it's highly unlikely that an Ethernet interface is going to be added to a fixed-configuration device such as the Pinebook Pro or the Pinephone. Other than plugging in a USB Ethernet dongle, that is, which already come with fixed MACA addresses. Thus, not providing stable MAC addresses should be just fine for such fixed- configuration devices.
Don't disagree with that, which is why I did those configs like that.
Great, thanks.
The smaller the number of special snow flakes, the better!
I'd agree that having fewer special cases helps, but again, handling the specifics of some devices also has its benefits. Additionally, perhaps simply the fact that those are actual devices makes them some kind of special snowflakes. :)
> Cc: Quentin Schulz foss+uboot@0leil.net > Reviewed-by: Kever Yang kever.yang@rock-chips.com > Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com > --- > arch/arm/include/asm/arch-rockchip/misc.h | 5 -- > arch/arm/mach-rockchip/Makefile | 1 - > arch/arm/mach-rockchip/board.c | 125 > +++++++++++++++++++++++++++ > arch/arm/mach-rockchip/misc.c | 135 > ------------------------------ > 4 files changed, 125 insertions(+), 141 deletions(-) > > diff --git a/arch/arm/include/asm/arch-rockchip/misc.h > b/arch/arm/include/asm/arch-rockchip/misc.h > index 4155af8c3b0..ef37ff1661a 100644 > --- a/arch/arm/include/asm/arch-rockchip/misc.h > +++ b/arch/arm/include/asm/arch-rockchip/misc.h > @@ -6,9 +6,4 @@ > * Rohan Garg rohan.garg@collabora.com > */ > > -int rockchip_cpuid_from_efuse(const u32 cpuid_offset, > - const u32 cpuid_length, > - u8 *cpuid); > -int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length); > -int rockchip_setup_macaddr(void); > void rockchip_capsule_update_board_setup(void); > diff --git a/arch/arm/mach-rockchip/Makefile > b/arch/arm/mach-rockchip/Makefile > index 1dc92066bbf..c07bdaee4c3 100644 > --- a/arch/arm/mach-rockchip/Makefile > +++ b/arch/arm/mach-rockchip/Makefile > @@ -23,7 +23,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) > # meaning "turn it off". > obj-y += boot_mode.o > obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o > -obj-$(CONFIG_MISC_INIT_R) += misc.o > endif > > ifeq ($(CONFIG_TPL_BUILD),) > diff --git a/arch/arm/mach-rockchip/board.c > b/arch/arm/mach-rockchip/board.c > index d5cb59c10fa..80b4514852f 100644 > --- a/arch/arm/mach-rockchip/board.c > +++ b/arch/arm/mach-rockchip/board.c > @@ -1,20 +1,32 @@ > // SPDX-License-Identifier: GPL-2.0+ > /* > * (C) Copyright 2019 Rockchip Electronics Co., Ltd. > + * > + * Copyright (C) 2019 Collabora Inc - https://www.collabora.com/ > + * Rohan Garg rohan.garg@collabora.com > + * > + * Based on puma-rk3399.c: > + * (C) Copyright 2017 Theobroma Systems Design und Consulting > GmbH > */ > #include <common.h> > #include <clk.h> > #include <cpu_func.h> > +#include <env.h> > #include <dm.h> > #include <efi_loader.h> > #include <fastboot.h> > +#include <hash.h> > #include <init.h> > #include <log.h> > #include <mmc.h> > +#include <dm/uclass-internal.h> > +#include <misc.h> > #include <part.h> > #include <ram.h> > #include <syscon.h> > #include <uuid.h> > +#include <u-boot/crc.h> > +#include <u-boot/sha256.h> > #include <asm/cache.h> > #include <asm/io.h> > #include <asm/arch-rockchip/boot_mode.h> > @@ -297,6 +309,119 @@ int fastboot_set_reboot_flag(enum > fastboot_reboot_reason reason) > #endif > > #ifdef CONFIG_MISC_INIT_R > +int rockchip_setup_macaddr(void) > +{ > +#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256) > + int ret; > + const char *cpuid = env_get("cpuid#"); > + u8 hash[SHA256_SUM_LEN]; > + int size = sizeof(hash); > + u8 mac_addr[6]; > + > + /* Only generate a MAC address, if none is set in the environment */ > + if (env_get("ethaddr")) > + return 0; > + > + if (!cpuid) { > + debug("%s: could not retrieve 'cpuid#'\n", __func__); > + return -1; > + } > + > + ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, > &size); > + if (ret) { > + debug("%s: failed to calculate SHA256\n", __func__); > + return -1; > + } > + > + /* Copy 6 bytes of the hash to base the MAC address on */ > + memcpy(mac_addr, hash, 6); > + > + /* Make this a valid MAC address and set it */ > + mac_addr[0] &= 0xfe; /* clear multicast bit */ > + mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ > + eth_env_set_enetaddr("ethaddr", mac_addr); > + > + /* Make a valid MAC address for ethernet1 */ > + mac_addr[5] ^= 0x01; > + eth_env_set_enetaddr("eth1addr", mac_addr); > +#endif > + return 0; > +} > + > +int rockchip_cpuid_from_efuse(const u32 cpuid_offset, > + const u32 cpuid_length, > + u8 *cpuid) > +{ > +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || > IS_ENABLED(CONFIG_ROCKCHIP_OTP) > + struct udevice *dev; > + int ret; > + > + /* retrieve the device */ > +#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) > + ret = uclass_get_device_by_driver(UCLASS_MISC, > + DM_DRIVER_GET(rockchip_efuse), &dev); > +#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP) > + ret = uclass_get_device_by_driver(UCLASS_MISC, > + DM_DRIVER_GET(rockchip_otp), &dev); > +#endif > + if (ret) { > + debug("%s: could not find efuse device\n", __func__); > + return -1; > + } > + > + /* read the cpu_id range from the efuses */ > + ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length); > + if (ret < 0) { > + debug("%s: reading cpuid from the efuses failed\n", > + __func__); > + return -1; > + } > +#endif > + return 0; > +} > + > +int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) > +{ > + u8 low[cpuid_length / 2], high[cpuid_length / 2]; > + char cpuid_str[cpuid_length * 2 + 1]; > + u64 serialno; > + char serialno_str[17]; > + const char *oldid; > + int i; > + > + memset(cpuid_str, 0, sizeof(cpuid_str)); > + for (i = 0; i < cpuid_length; i++) > + sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]); > + > + debug("cpuid: %s\n", cpuid_str); > + > + /* > + * Mix the cpuid bytes using the same rules as in > + * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c > + */ > + for (i = 0; i < cpuid_length / 2; i++) { > + low[i] = cpuid[1 + (i << 1)]; > + high[i] = cpuid[i << 1]; > + } > + > + serialno = crc32_no_comp(0, low, cpuid_length / 2); > + serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) << > 32; > + snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno); > + > + oldid = env_get("cpuid#"); > + if (oldid && strcmp(oldid, cpuid_str) != 0) > + printf("cpuid: value %s present in env does not match hardware > %s\n", > + oldid, cpuid_str); > + > + env_set("cpuid#", cpuid_str); > + > + /* Only generate serial# when none is set yet */ > + if (!env_get("serial#")) > + env_set("serial#", serialno_str); > + > + return 0; > +} > + > __weak int rockchip_early_misc_init_r(void) > { > return 0; > diff --git a/arch/arm/mach-rockchip/misc.c > b/arch/arm/mach-rockchip/misc.c > deleted file mode 100644 > index 15397cff009..00000000000 > --- a/arch/arm/mach-rockchip/misc.c > +++ /dev/null > @@ -1,135 +0,0 @@ > -/* SPDX-License-Identifier: GPL-2.0+ */ > -/* > - * RK3399: Architecture common definitions > - * > - * Copyright (C) 2019 Collabora Inc - https://www.collabora.com/ > - * Rohan Garg rohan.garg@collabora.com > - * > - * Based on puma-rk3399.c: > - * (C) Copyright 2017 Theobroma Systems Design und Consulting > GmbH > - */ > - > -#include <common.h> > -#include <env.h> > -#include <dm.h> > -#include <hash.h> > -#include <log.h> > -#include <dm/uclass-internal.h> > -#include <misc.h> > -#include <u-boot/crc.h> > -#include <u-boot/sha256.h> > - > -#include <asm/arch-rockchip/misc.h> > - > -int rockchip_setup_macaddr(void) > -{ > -#if CONFIG_IS_ENABLED(HASH) && CONFIG_IS_ENABLED(SHA256) > - int ret; > - const char *cpuid = env_get("cpuid#"); > - u8 hash[SHA256_SUM_LEN]; > - int size = sizeof(hash); > - u8 mac_addr[6]; > - > - /* Only generate a MAC address, if none is set in the environment */ > - if (env_get("ethaddr")) > - return 0; > - > - if (!cpuid) { > - debug("%s: could not retrieve 'cpuid#'\n", __func__); > - return -1; > - } > - > - ret = hash_block("sha256", (void *)cpuid, strlen(cpuid), hash, > &size); > - if (ret) { > - debug("%s: failed to calculate SHA256\n", __func__); > - return -1; > - } > - > - /* Copy 6 bytes of the hash to base the MAC address on */ > - memcpy(mac_addr, hash, 6); > - > - /* Make this a valid MAC address and set it */ > - mac_addr[0] &= 0xfe; /* clear multicast bit */ > - mac_addr[0] |= 0x02; /* set local assignment bit (IEEE802) */ > - eth_env_set_enetaddr("ethaddr", mac_addr); > - > - /* Make a valid MAC address for ethernet1 */ > - mac_addr[5] ^= 0x01; > - eth_env_set_enetaddr("eth1addr", mac_addr); > -#endif > - return 0; > -} > - > -int rockchip_cpuid_from_efuse(const u32 cpuid_offset, > - const u32 cpuid_length, > - u8 *cpuid) > -{ > -#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) || > IS_ENABLED(CONFIG_ROCKCHIP_OTP) > - struct udevice *dev; > - int ret; > - > - /* retrieve the device */ > -#if IS_ENABLED(CONFIG_ROCKCHIP_EFUSE) > - ret = uclass_get_device_by_driver(UCLASS_MISC, > - DM_DRIVER_GET(rockchip_efuse), &dev); > -#elif IS_ENABLED(CONFIG_ROCKCHIP_OTP) > - ret = uclass_get_device_by_driver(UCLASS_MISC, > - DM_DRIVER_GET(rockchip_otp), &dev); > -#endif > - if (ret) { > - debug("%s: could not find efuse device\n", __func__); > - return -1; > - } > - > - /* read the cpu_id range from the efuses */ > - ret = misc_read(dev, cpuid_offset, cpuid, cpuid_length); > - if (ret < 0) { > - debug("%s: reading cpuid from the efuses failed\n", > - __func__); > - return -1; > - } > -#endif > - return 0; > -} > - > -int rockchip_cpuid_set(const u8 *cpuid, const u32 cpuid_length) > -{ > - u8 low[cpuid_length / 2], high[cpuid_length / 2]; > - char cpuid_str[cpuid_length * 2 + 1]; > - u64 serialno; > - char serialno_str[17]; > - const char *oldid; > - int i; > - > - memset(cpuid_str, 0, sizeof(cpuid_str)); > - for (i = 0; i < cpuid_length; i++) > - sprintf(&cpuid_str[i * 2], "%02x", cpuid[i]); > - > - debug("cpuid: %s\n", cpuid_str); > - > - /* > - * Mix the cpuid bytes using the same rules as in > - * ${linux}/drivers/soc/rockchip/rockchip-cpuinfo.c > - */ > - for (i = 0; i < cpuid_length / 2; i++) { > - low[i] = cpuid[1 + (i << 1)]; > - high[i] = cpuid[i << 1]; > - } > - > - serialno = crc32_no_comp(0, low, cpuid_length / 2); > - serialno |= (u64)crc32_no_comp(serialno, high, cpuid_length / 2) << > 32; > - snprintf(serialno_str, sizeof(serialno_str), "%016llx", serialno); > - > - oldid = env_get("cpuid#"); > - if (oldid && strcmp(oldid, cpuid_str) != 0) > - printf("cpuid: value %s present in env does not match hardware > %s\n", > - oldid, cpuid_str); > - > - env_set("cpuid#", cpuid_str); > - > - /* Only generate serial# when none is set yet */ > - if (!env_get("serial#")) > - env_set("serial#", serialno_str); > - > - return 0; > -}

From: Quentin Schulz quentin.schulz@theobroma-systems.com
There's only one user of rockchip_capsule_update_board_setup, which is in board.c, and only one board defines it, so instead of having a header only for one function symbol, let's just use a weak symbol instead.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/include/asm/arch-rockchip/misc.h | 9 --------- arch/arm/mach-rockchip/board.c | 5 ++++- 2 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/misc.h b/arch/arm/include/asm/arch-rockchip/misc.h deleted file mode 100644 index ef37ff1661a..00000000000 --- a/arch/arm/include/asm/arch-rockchip/misc.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * RK3399: Architecture common definitions - * - * Copyright (C) 2019 Collabora Inc - https://www.collabora.com/ - * Rohan Garg rohan.garg@collabora.com - */ - -void rockchip_capsule_update_board_setup(void); diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 80b4514852f..4f666aee706 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -32,7 +32,6 @@ #include <asm/arch-rockchip/boot_mode.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/periph.h> -#include <asm/arch-rockchip/misc.h> #include <power/regulator.h>
#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION) @@ -148,6 +147,10 @@ void set_dfu_alt_info(char *interface, char *devstr) env_set("dfu_alt_info", buf); }
+__weak void rockchip_capsule_update_board_setup(void) +{ +} + static void gpt_capsule_update_setup(void) { int p, i, ret;

On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
There's only one user of rockchip_capsule_update_board_setup, which is in board.c, and only one board defines it, so instead of having a header only for one function symbol, let's just use a weak symbol instead.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
Looking good to me.
Reviewed-by: Dragan Simic dsimic@manjaro.org
arch/arm/include/asm/arch-rockchip/misc.h | 9 --------- arch/arm/mach-rockchip/board.c | 5 ++++- 2 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/misc.h b/arch/arm/include/asm/arch-rockchip/misc.h deleted file mode 100644 index ef37ff1661a..00000000000 --- a/arch/arm/include/asm/arch-rockchip/misc.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- RK3399: Architecture common definitions
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- */
-void rockchip_capsule_update_board_setup(void); diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 80b4514852f..4f666aee706 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -32,7 +32,6 @@ #include <asm/arch-rockchip/boot_mode.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/periph.h> -#include <asm/arch-rockchip/misc.h> #include <power/regulator.h>
#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION) @@ -148,6 +147,10 @@ void set_dfu_alt_info(char *interface, char *devstr) env_set("dfu_alt_info", buf); }
+__weak void rockchip_capsule_update_board_setup(void) +{ +}
static void gpt_capsule_update_setup(void) { int p, i, ret;

On Fri, 9 Feb 2024 at 09:50, Quentin Schulz foss+uboot@0leil.net wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
There's only one user of rockchip_capsule_update_board_setup, which is in board.c, and only one board defines it, so instead of having a header only for one function symbol, let's just use a weak symbol instead.
Reviewed-by: Peter Robinson pbrobinson@gmail.com
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
arch/arm/include/asm/arch-rockchip/misc.h | 9 --------- arch/arm/mach-rockchip/board.c | 5 ++++- 2 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/misc.h b/arch/arm/include/asm/arch-rockchip/misc.h deleted file mode 100644 index ef37ff1661a..00000000000 --- a/arch/arm/include/asm/arch-rockchip/misc.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/*
- RK3399: Architecture common definitions
- Copyright (C) 2019 Collabora Inc - https://www.collabora.com/
Rohan Garg <rohan.garg@collabora.com>
- */
-void rockchip_capsule_update_board_setup(void); diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c index 80b4514852f..4f666aee706 100644 --- a/arch/arm/mach-rockchip/board.c +++ b/arch/arm/mach-rockchip/board.c @@ -32,7 +32,6 @@ #include <asm/arch-rockchip/boot_mode.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/periph.h> -#include <asm/arch-rockchip/misc.h> #include <power/regulator.h>
#if defined(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) && defined(CONFIG_EFI_PARTITION) @@ -148,6 +147,10 @@ void set_dfu_alt_info(char *interface, char *devstr) env_set("dfu_alt_info", buf); }
+__weak void rockchip_capsule_update_board_setup(void) +{ +}
static void gpt_capsule_update_setup(void) { int p, i, ret;
-- 2.43.0

From: Quentin Schulz quentin.schulz@theobroma-systems.com
Rockchip SoCs have some jtag/sdmmc autoswitching that simply doesn't work really well.[00] The Linux kernel disables it for all SoCs[01], so U-Boot needs to do the same in order to fix issues related to SD card on RK3588. This autoswitching is enabled (by default) via the force_jtag bitfield in SYS_GRF_SOC_CON6 in the TRM part1.
The conditions to enter forced JTAG mode are the following: - force_jtag is 1 - GPIO4_D2 is muxed for SDMMC function - GPIO3_D3 is muxed for SDMMC function - SDMMC_DET is inactive
SDMMC_DET may be put in the inactive mode by HW design (e.g. because the detection pin is unused (e.g. card-detect-less designs), or another GPIO is used instead, and SDMMC_DET is pulled-low by default).
For some reason, when booting from SD card, everything's fine. But when we don't boot from SD card, U-Boot needs to set it up correctly to allow accessing SD cards, at the very least for RK3588-Jaguar (card-detect-less design with SDMMC_DET pulled-low in HW).
Therefore, let's disable the JTAG mode for the SDMMC pins so that the SD controller can be used either as a fallback mechanism to find U-Boot proper when the boot medium used to load TPL/SPL cannot find U-Boot proper, or to be used in U-Boot CLI.
Note that soc_con[0] is reserved. But considering that it's way more user-friendly to access soc_con1 from the TRM with soc_con[1] than soc_con[0], and that soc_con0 would actually be located at 4 bytes before soc_con1, let's just make soc_con0 part of the soc_con array.
[00] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?i... [01] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/driv...
Cc: Quentin Schulz foss+uboot@0leil.net Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/include/asm/arch-rockchip/grf_rk3588.h | 24 ++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3588/rk3588.c | 7 +++++++ 2 files changed, 31 insertions(+)
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3588.h b/arch/arm/include/asm/arch-rockchip/grf_rk3588.h index e0694068bb1..f0ecff97f0b 100644 --- a/arch/arm/include/asm/arch-rockchip/grf_rk3588.h +++ b/arch/arm/include/asm/arch-rockchip/grf_rk3588.h @@ -32,4 +32,28 @@ struct rk3588_pmu1grf {
check_member(rk3588_pmu1grf, sd_detect_cnt, 0x03b0);
+#define SYS_GRF_BASE 0xfd58c000 + +struct rk3588_sysgrf { + unsigned int wdt_con0; + unsigned int reserved0[(0x0010 - 0x0000) / 4 - 1]; + unsigned int uart_con[2]; + unsigned int reserved1[(0x00c0 - 0x0014) / 4 - 1]; + unsigned int gic_con0; + unsigned int reserved2[(0x0200 - 0x00c0) / 4 - 1]; + unsigned int memcfg_con[32]; + unsigned int reserved3[(0x0300 - 0x027c) / 4 - 1]; + /* soc_con0 is reserved */ + unsigned int soc_con[14]; + unsigned int reserved4[(0x0380 - 0x0334) / 4 - 1]; + unsigned int soc_status[4]; + unsigned int reserved5[(0x0500 - 0x038c) / 4 - 1]; + unsigned int otp_key08; + unsigned int otp_key0d; + unsigned int otp_key0e; + unsigned int reserved6[(0x0600 - 0x0508) / 4 - 1]; + unsigned int chip_id; +}; + +check_member(rk3588_sysgrf, chip_id, 0x0600); #endif /*__SOC_ROCKCHIP_RK3588_GRF_H__ */ diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c index 38e95a6e2b2..c5eeda9d751 100644 --- a/arch/arm/mach-rockchip/rk3588/rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c @@ -11,6 +11,7 @@ #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/ioc_rk3588.h> +#include <asm/arch-rockchip/grf_rk3588.h>
#define FIREWALL_DDR_BASE 0xfe030000 #define FW_DDR_MST5_REG 0x54 @@ -35,6 +36,8 @@ #define BUS_IOC_GPIO2D_IOMUX_SEL_H 0x5c #define BUS_IOC_GPIO3A_IOMUX_SEL_L 0x60
+#define SYS_GRF_FORCE_JTAG BIT(14) + /** * Boot-device identifiers used by the BROM on RK3588 when device is booted * from SPI flash. IOMUX used for SPI flash affect the value used by the BROM @@ -134,6 +137,7 @@ void rockchip_stimer_init(void) int arch_cpu_init(void) { #ifdef CONFIG_SPL_BUILD + static struct rk3588_sysgrf * const sys_grf = (void *)SYS_GRF_BASE; int secure_reg;
/* Set the SDMMC eMMC crypto_ns FSPI access secure area */ @@ -168,6 +172,9 @@ int arch_cpu_init(void) secure_reg = readl(FIREWALL_SYSMEM_BASE + FW_SYSM_MST27_REG); secure_reg &= 0xffff0000; writel(secure_reg, FIREWALL_SYSMEM_BASE + FW_SYSM_MST27_REG); + + /* Disable JTAG exposed on SDMMC */ + rk_clrreg(&sys_grf->soc_con[6], SYS_GRF_FORCE_JTAG); #endif
return 0;

From: Quentin Schulz quentin.schulz@theobroma-systems.com
It's one thing to have the register mapped via a well-defined struct but it's another to be able to make use of it. For that to happen, one needs to cast the physical address memory of the beginning of the register address space with the struct. Since this cannot change, let's hardcode it in the include files so that users do not need to duplicate this line of code in their own implementation.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/include/asm/arch-rockchip/cru_rk3588.h | 2 ++ arch/arm/include/asm/arch-rockchip/ioc_rk3588.h | 6 ++++++ arch/arm/mach-rockchip/rk3588/rk3588.c | 4 ---- 3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h index 7f4a9085392..a4507e5fdd7 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3588.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3588.h @@ -63,6 +63,8 @@ struct rk3588_pll { unsigned int reserved0[3]; };
+#define CRU_BASE 0xfd7c0000 + struct rk3588_cru { struct rk3588_pll pll[18]; unsigned int reserved0[16];/* Address Offset: 0x0240 */ diff --git a/arch/arm/include/asm/arch-rockchip/ioc_rk3588.h b/arch/arm/include/asm/arch-rockchip/ioc_rk3588.h index 5a656f850c7..7ad98466c39 100644 --- a/arch/arm/include/asm/arch-rockchip/ioc_rk3588.h +++ b/arch/arm/include/asm/arch-rockchip/ioc_rk3588.h @@ -5,6 +5,8 @@ #ifndef _ASM_ARCH_IOC_RK3588_H #define _ASM_ARCH_IOC_RK3588_H
+#define BUS_IOC_BASE 0xfd5f8000 + struct rk3588_bus_ioc { unsigned int reserved0000[3]; /* Address Offset: 0x0000 */ unsigned int gpio0b_iomux_sel_h; /* Address Offset: 0x000C */ @@ -48,6 +50,8 @@ struct rk3588_bus_ioc {
check_member(rk3588_bus_ioc, gpio4d_iomux_sel_h, 0x009C);
+#define PMU1_IOC_BASE 0xfd5f0000 + struct rk3588_pmu1_ioc { unsigned int gpio0a_iomux_sel_l; /* Address Offset: 0x0000 */ unsigned int gpio0a_iomux_sel_h; /* Address Offset: 0x0004 */ @@ -70,6 +74,8 @@ struct rk3588_pmu1_ioc {
check_member(rk3588_pmu1_ioc, xin_con, 0x0040);
+#define PMU2_IOC_BASE 0xfd5f4000 + struct rk3588_pmu2_ioc { unsigned int gpio0b_iomux_sel_h; /* Address Offset: 0x0000 */ unsigned int gpio0c_iomux_sel_l; /* Address Offset: 0x0004 */ diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c index c5eeda9d751..53ee9f1cebc 100644 --- a/arch/arm/mach-rockchip/rk3588/rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c @@ -26,10 +26,6 @@ #define FW_SYSM_MST26_REG 0xa8 #define FW_SYSM_MST27_REG 0xac
-#define PMU1_IOC_BASE 0xfd5f0000 -#define PMU2_IOC_BASE 0xfd5f4000 - -#define BUS_IOC_BASE 0xfd5f8000 #define BUS_IOC_GPIO2A_IOMUX_SEL_L 0x40 #define BUS_IOC_GPIO2B_IOMUX_SEL_L 0x48 #define BUS_IOC_GPIO2D_IOMUX_SEL_L 0x58

From: Quentin Schulz quentin.schulz@theobroma-systems.com
hardware.h is only defining macros which are "wrappers" around writel().
writel() is however not available in hardware.h, <asm/io.h> needs to be included. This means in order to use the wrappers in hardware.h, one also needs to include the <asm/io.h> header.
However, this cannot be done currently because hardware.h is included in include/configs files, which are implicitly included by every code file by default, which makes the compilation of arch/arm/cpu/armv8/u-boot.lds fail because ALIGN (the ARM assembly directive) got redefined by some of the include files coming from <asm.io.h>.
Because nothing in the include/configs file actually use hardware.h, let's remove the inclusion of hardware.h from the include/configs files and explicitly add it wherever it is required.
This prepares for the next commit where <asm/io.h> will be included in hardware.h.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/mach-rockchip/rk3066/rk3066.c | 1 + drivers/ram/rockchip/dmc-rk3368.c | 1 + drivers/ram/rockchip/sdram_rk3188.c | 1 + drivers/ram/rockchip/sdram_rk3288.c | 1 + include/configs/rk3036_common.h | 1 - include/configs/rk3066_common.h | 1 - include/configs/rk3188_common.h | 1 - include/configs/rk322x_common.h | 1 - include/configs/rk3288_common.h | 1 - include/configs/rk3368_common.h | 1 - include/configs/rv1108_common.h | 1 - 11 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c b/arch/arm/mach-rockchip/rk3066/rk3066.c index 78c7d894f90..6661b788295 100644 --- a/arch/arm/mach-rockchip/rk3066/rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/rk3066.c @@ -7,6 +7,7 @@ #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/grf_rk3066.h> +#include <asm/arch-rockchip/hardware.h>
#define GRF_BASE 0x20008000
diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c index f36be941a38..74d8aed571c 100644 --- a/drivers/ram/rockchip/dmc-rk3368.c +++ b/drivers/ram/rockchip/dmc-rk3368.c @@ -20,6 +20,7 @@ #include <asm/arch-rockchip/ddr_rk3368.h> #include <asm/arch-rockchip/sdram.h> #include <asm/arch-rockchip/sdram_rk3288.h> +#include <asm/arch-rockchip/hardware.h> #include <linux/bitops.h> #include <linux/delay.h> #include <linux/err.h> diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c index ad9f936df55..16a68885f1f 100644 --- a/drivers/ram/rockchip/sdram_rk3188.c +++ b/drivers/ram/rockchip/sdram_rk3188.c @@ -25,6 +25,7 @@ #include <asm/arch-rockchip/pmu_rk3188.h> #include <asm/arch-rockchip/sdram.h> #include <asm/arch-rockchip/sdram_rk3288.h> +#include <asm/arch-rockchip/hardware.h> #include <linux/delay.h> #include <linux/err.h>
diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c index c99118fd612..ec6bdcb2015 100644 --- a/drivers/ram/rockchip/sdram_rk3288.c +++ b/drivers/ram/rockchip/sdram_rk3288.c @@ -25,6 +25,7 @@ #include <asm/arch-rockchip/pmu_rk3288.h> #include <asm/arch-rockchip/sdram.h> #include <asm/arch-rockchip/sdram_rk3288.h> +#include <asm/arch-rockchip/hardware.h> #include <linux/delay.h> #include <linux/err.h> #include <power/regulator.h> diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index c2abd14e114..0bf9e8b9a2e 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -5,7 +5,6 @@ #ifndef __CONFIG_RK3036_COMMON_H #define __CONFIG_RK3036_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h index d70c8f77d48..6a3b6900463 100644 --- a/include/configs/rk3066_common.h +++ b/include/configs/rk3066_common.h @@ -6,7 +6,6 @@ #ifndef __CONFIG_RK3066_COMMON_H #define __CONFIG_RK3066_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index a8cee1e44d4..98f2c25f3cf 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -6,7 +6,6 @@ #ifndef __CONFIG_RK3188_COMMON_H #define __CONFIG_RK3188_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 15f77df3e17..bab4ca015f7 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -5,7 +5,6 @@ #ifndef __CONFIG_RK322X_COMMON_H #define __CONFIG_RK322X_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 3063076a97a..0c449e31099 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -6,7 +6,6 @@ #ifndef __CONFIG_RK3288_COMMON_H #define __CONFIG_RK3288_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index ccb5369b901..d488f8d477a 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -8,7 +8,6 @@
#include "rockchip-common.h"
-#include <asm/arch-rockchip/hardware.h> #include <linux/sizes.h>
#define CFG_SYS_SDRAM_BASE 0 diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 3bf70a0e0ae..ff28236a21d 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -5,7 +5,6 @@ #ifndef __CONFIG_RV1108_COMMON_H #define __CONFIG_RV1108_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_IRAM_BASE 0x10080000

On 2/9/24 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
hardware.h is only defining macros which are "wrappers" around writel().
writel() is however not available in hardware.h, <asm/io.h> needs to be included. This means in order to use the wrappers in hardware.h, one also needs to include the <asm/io.h> header.
However, this cannot be done currently because hardware.h is included in include/configs files, which are implicitly included by every code file by default, which makes the compilation of arch/arm/cpu/armv8/u-boot.lds fail because ALIGN (the ARM assembly directive) got redefined by some of the include files coming from <asm.io.h>.
Because nothing in the include/configs file actually use hardware.h, let's remove the inclusion of hardware.h from the include/configs files and explicitly add it wherever it is required.
This prepares for the next commit where <asm/io.h> will be included in hardware.h.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
arch/arm/mach-rockchip/rk3066/rk3066.c | 1 + drivers/ram/rockchip/dmc-rk3368.c | 1 + drivers/ram/rockchip/sdram_rk3188.c | 1 + drivers/ram/rockchip/sdram_rk3288.c | 1 + include/configs/rk3036_common.h | 1 - include/configs/rk3066_common.h | 1 - include/configs/rk3188_common.h | 1 - include/configs/rk322x_common.h | 1 - include/configs/rk3288_common.h | 1 - include/configs/rk3368_common.h | 1 - include/configs/rv1108_common.h | 1 - 11 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c b/arch/arm/mach-rockchip/rk3066/rk3066.c index 78c7d894f90..6661b788295 100644 --- a/arch/arm/mach-rockchip/rk3066/rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/rk3066.c @@ -7,6 +7,7 @@ #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/grf_rk3066.h> +#include <asm/arch-rockchip/hardware.h>
#define GRF_BASE 0x20008000
diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c index f36be941a38..74d8aed571c 100644 --- a/drivers/ram/rockchip/dmc-rk3368.c +++ b/drivers/ram/rockchip/dmc-rk3368.c @@ -20,6 +20,7 @@
#include <asm/arch-rockchip/ddr_rk3368.h> #include <asm/arch-rockchip/sdram.h> #include <asm/arch-rockchip/sdram_rk3288.h> +#include <asm/arch-rockchip/hardware.h>
From codingstyle.rst:
You should follow this ordering in U-Boot. The common.h header (which is going away at some point) should always be first, followed by other headers in order, then headers with directories, then local files. Within that order, sort your includes.
#include <linux/bitops.h> #include <linux/delay.h> #include <linux/err.h> diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c index ad9f936df55..16a68885f1f 100644 --- a/drivers/ram/rockchip/sdram_rk3188.c +++ b/drivers/ram/rockchip/sdram_rk3188.c @@ -25,6 +25,7 @@
#include <asm/arch-rockchip/pmu_rk3188.h> #include <asm/arch-rockchip/sdram.h> #include <asm/arch-rockchip/sdram_rk3288.h> +#include <asm/arch-rockchip/hardware.h>
dito
#include <linux/delay.h> #include <linux/err.h>
diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c index c99118fd612..ec6bdcb2015 100644 --- a/drivers/ram/rockchip/sdram_rk3288.c +++ b/drivers/ram/rockchip/sdram_rk3288.c @@ -25,6 +25,7 @@
#include <asm/arch-rockchip/pmu_rk3288.h> #include <asm/arch-rockchip/sdram.h> #include <asm/arch-rockchip/sdram_rk3288.h> +#include <asm/arch-rockchip/hardware.h>
dito
#include <linux/delay.h> #include <linux/err.h> #include <power/regulator.h> diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index c2abd14e114..0bf9e8b9a2e 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -5,7 +5,6 @@ #ifndef __CONFIG_RK3036_COMMON_H #define __CONFIG_RK3036_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/rk3066_common.h b/include/configs/rk3066_common.h index d70c8f77d48..6a3b6900463 100644 --- a/include/configs/rk3066_common.h +++ b/include/configs/rk3066_common.h @@ -6,7 +6,6 @@ #ifndef __CONFIG_RK3066_COMMON_H #define __CONFIG_RK3066_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index a8cee1e44d4..98f2c25f3cf 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -6,7 +6,6 @@ #ifndef __CONFIG_RK3188_COMMON_H #define __CONFIG_RK3188_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_IRAM_BASE 0x10080000 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 15f77df3e17..bab4ca015f7 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -5,7 +5,6 @@ #ifndef __CONFIG_RK322X_COMMON_H #define __CONFIG_RK322X_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 3063076a97a..0c449e31099 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -6,7 +6,6 @@ #ifndef __CONFIG_RK3288_COMMON_H #define __CONFIG_RK3288_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_SYS_HZ_CLOCK 24000000 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index ccb5369b901..d488f8d477a 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -8,7 +8,6 @@
#include "rockchip-common.h"
-#include <asm/arch-rockchip/hardware.h> #include <linux/sizes.h>
#define CFG_SYS_SDRAM_BASE 0 diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 3bf70a0e0ae..ff28236a21d 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -5,7 +5,6 @@ #ifndef __CONFIG_RV1108_COMMON_H #define __CONFIG_RV1108_COMMON_H
-#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h"
#define CFG_IRAM_BASE 0x10080000

Hi Johan,
On 2/9/24 14:07, Johan Jonker wrote: [...]
From codingstyle.rst:
You should follow this ordering in U-Boot. The common.h header (which is going away at some point) should always be first, followed by other headers in order, then headers with directories, then local files. Within that order, sort your includes.
Good catch indeed. I'll avoid resending a 20-patch series today though.
I have the following diff that can be applied on top of that commit:
""" diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c index 74d8aed571c..859fc47030f 100644 --- a/drivers/ram/rockchip/dmc-rk3368.c +++ b/drivers/ram/rockchip/dmc-rk3368.c @@ -17,10 +17,10 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3368.h> #include <asm/arch-rockchip/grf_rk3368.h> +#include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/ddr_rk3368.h> #include <asm/arch-rockchip/sdram.h> #include <asm/arch-rockchip/sdram_rk3288.h> -#include <asm/arch-rockchip/hardware.h> #include <linux/bitops.h> #include <linux/delay.h> #include <linux/err.h> diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c index 16a68885f1f..d23d4231798 100644 --- a/drivers/ram/rockchip/sdram_rk3188.c +++ b/drivers/ram/rockchip/sdram_rk3188.c @@ -22,10 +22,10 @@ #include <asm/arch-rockchip/cru_rk3188.h> #include <asm/arch-rockchip/ddr_rk3188.h> #include <asm/arch-rockchip/grf_rk3188.h> +#include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/pmu_rk3188.h> #include <asm/arch-rockchip/sdram.h> #include <asm/arch-rockchip/sdram_rk3288.h> -#include <asm/arch-rockchip/hardware.h> #include <linux/delay.h> #include <linux/err.h>
diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c index ec6bdcb2015..3177051dd12 100644 --- a/drivers/ram/rockchip/sdram_rk3288.c +++ b/drivers/ram/rockchip/sdram_rk3288.c @@ -22,10 +22,10 @@ #include <asm/arch-rockchip/cru.h> #include <asm/arch-rockchip/ddr_rk3288.h> #include <asm/arch-rockchip/grf_rk3288.h> +#include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/pmu_rk3288.h> #include <asm/arch-rockchip/sdram.h> #include <asm/arch-rockchip/sdram_rk3288.h> -#include <asm/arch-rockchip/hardware.h> #include <linux/delay.h> #include <linux/err.h> #include <power/regulator.h> """
You'll note that drivers/ram/rockchip/dmc-rk3368.c currently already doesn't follow the coding style :)
@Kever, up to you if you want me to send a v3 for that or if you can apply the diff above yourself before merging.
Cheers, Quentin

From: Quentin Schulz quentin.schulz@theobroma-systems.com
The different macros use writel which is defined in asm/io.h, so let's include the header so users of hardware.h do not need to include asm/io.h as well.
While at it, remove asm/io.h includes wherever asm/arch-rockchip/hardware.h is included already.
Cc: Quentin Schulz foss+uboot@0leil.net Reviewed-by: Kever Yang kever.yang@rock-chips.com Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/include/asm/arch-rockchip/hardware.h | 2 ++ arch/arm/mach-rockchip/cpu-info.c | 1 - arch/arm/mach-rockchip/px30/px30.c | 1 - arch/arm/mach-rockchip/rk3036/rk3036.c | 1 - arch/arm/mach-rockchip/rk3036/sdram_rk3036.c | 1 - arch/arm/mach-rockchip/rk3066/rk3066.c | 1 - arch/arm/mach-rockchip/rk3188/rk3188.c | 1 - arch/arm/mach-rockchip/rk322x/rk322x.c | 1 - arch/arm/mach-rockchip/rk3288/rk3288.c | 1 - arch/arm/mach-rockchip/rk3308/rk3308.c | 1 - arch/arm/mach-rockchip/rk3328/rk3328.c | 1 - arch/arm/mach-rockchip/rk3368/rk3368.c | 1 - arch/arm/mach-rockchip/rk3399/rk3399.c | 1 - arch/arm/mach-rockchip/rk3568/rk3568.c | 1 - arch/arm/mach-rockchip/rk3588/rk3588.c | 1 - arch/arm/mach-rockchip/rv1126/rv1126.c | 1 - board/elgin/elgin_rv1108/elgin_rv1108.c | 1 - board/firefly/firefly-rk3308/roc_cc_rk3308.c | 1 - board/google/gru/gru.c | 1 - board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c | 1 - board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c | 1 - board/pine64/rockpro64_rk3399/rockpro64-rk3399.c | 1 - board/rockchip/evb_rv1108/evb_rv1108.c | 1 - board/theobroma-systems/puma_rk3399/puma-rk3399.c | 1 - board/vamrs/rock960_rk3399/rock960-rk3399.c | 1 - drivers/clk/rockchip/clk_pll.c | 1 - drivers/clk/rockchip/clk_px30.c | 1 - drivers/clk/rockchip/clk_rk3036.c | 1 - drivers/clk/rockchip/clk_rk3066.c | 1 - drivers/clk/rockchip/clk_rk3128.c | 1 - drivers/clk/rockchip/clk_rk3188.c | 1 - drivers/clk/rockchip/clk_rk322x.c | 1 - drivers/clk/rockchip/clk_rk3288.c | 1 - drivers/clk/rockchip/clk_rk3308.c | 1 - drivers/clk/rockchip/clk_rk3328.c | 1 - drivers/clk/rockchip/clk_rk3368.c | 1 - drivers/clk/rockchip/clk_rk3399.c | 1 - drivers/clk/rockchip/clk_rk3568.c | 1 - drivers/clk/rockchip/clk_rk3588.c | 1 - drivers/clk/rockchip/clk_rv1108.c | 1 - drivers/clk/rockchip/clk_rv1126.c | 1 - drivers/gpio/rk_gpio.c | 1 - drivers/net/gmac_rockchip.c | 1 - drivers/ram/rockchip/dmc-rk3368.c | 1 - drivers/ram/rockchip/sdram_px30.c | 1 - drivers/ram/rockchip/sdram_rk3066.c | 1 - drivers/ram/rockchip/sdram_rk3188.c | 1 - drivers/ram/rockchip/sdram_rk322x.c | 1 - drivers/ram/rockchip/sdram_rk3288.c | 1 - drivers/ram/rockchip/sdram_rk3399.c | 1 - drivers/ram/rockchip/sdram_rv1126.c | 1 - drivers/rng/rockchip_rng.c | 1 - drivers/sysreset/sysreset_rockchip.c | 1 - drivers/video/rockchip/dw_mipi_dsi_rockchip.c | 1 - drivers/video/rockchip/rk3288_hdmi.c | 1 - drivers/video/rockchip/rk3288_mipi.c | 1 - drivers/video/rockchip/rk3288_vop.c | 1 - drivers/video/rockchip/rk3399_hdmi.c | 1 - drivers/video/rockchip/rk3399_mipi.c | 1 - drivers/video/rockchip/rk3399_vop.c | 1 - drivers/video/rockchip/rk_edp.c | 1 - drivers/video/rockchip/rk_hdmi.c | 1 - drivers/video/rockchip/rk_lvds.c | 1 - 63 files changed, 2 insertions(+), 62 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/hardware.h b/arch/arm/include/asm/arch-rockchip/hardware.h index 62e8bed8f31..e4662a2d52d 100644 --- a/arch/arm/include/asm/arch-rockchip/hardware.h +++ b/arch/arm/include/asm/arch-rockchip/hardware.h @@ -6,6 +6,8 @@ #ifndef _ASM_ARCH_HARDWARE_H #define _ASM_ARCH_HARDWARE_H
+#include <asm/io.h> + #define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | (set)) #define RK_SETBITS(set) RK_CLRSETBITS(0, set) #define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0) diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c index dac24910e0c..a62ff53c6a0 100644 --- a/arch/arm/mach-rockchip/cpu-info.c +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -7,7 +7,6 @@ #include <common.h> #include <env.h> #include <init.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru.h> #include <asm/arch-rockchip/hardware.h> diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c index fc7456e680c..b4f655fa4b3 100644 --- a/arch/arm/mach-rockchip/px30/px30.c +++ b/arch/arm/mach-rockchip/px30/px30.c @@ -9,7 +9,6 @@ #include <init.h> #include <spl.h> #include <asm/armv8/mmu.h> -#include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/grf_px30.h> #include <asm/arch-rockchip/hardware.h> diff --git a/arch/arm/mach-rockchip/rk3036/rk3036.c b/arch/arm/mach-rockchip/rk3036/rk3036.c index 0a072cf03a8..e8130abdd77 100644 --- a/arch/arm/mach-rockchip/rk3036/rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/rk3036.c @@ -6,7 +6,6 @@ #include <common.h> #include <init.h> #include <asm/global_data.h> -#include <asm/io.h> #include <asm/arch-rockchip/grf_rk3036.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/sdram_rk3036.h> diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c index fcae65b2e5a..07cd29a33e6 100644 --- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c @@ -4,7 +4,6 @@ */ #include <common.h> #include <init.h> -#include <asm/io.h> #include <asm/types.h> #include <asm/arch-rockchip/cru_rk3036.h> #include <asm/arch-rockchip/grf_rk3036.h> diff --git a/arch/arm/mach-rockchip/rk3066/rk3066.c b/arch/arm/mach-rockchip/rk3066/rk3066.c index 6661b788295..9a95ff85041 100644 --- a/arch/arm/mach-rockchip/rk3066/rk3066.c +++ b/arch/arm/mach-rockchip/rk3066/rk3066.c @@ -4,7 +4,6 @@ */
#include <common.h> -#include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/grf_rk3066.h> #include <asm/arch-rockchip/hardware.h> diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c index c807221f33f..ffdcaa49a1e 100644 --- a/arch/arm/mach-rockchip/rk3188/rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/rk3188.c @@ -10,7 +10,6 @@ #include <log.h> #include <syscon.h> #include <asm/global_data.h> -#include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3188.h> diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c index a304795fec6..712c0524266 100644 --- a/arch/arm/mach-rockchip/rk322x/rk322x.c +++ b/arch/arm/mach-rockchip/rk322x/rk322x.c @@ -3,7 +3,6 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ #include <init.h> -#include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/grf_rk322x.h> #include <asm/arch-rockchip/hardware.h> diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index d9f782e342b..c77c56c1dab 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -11,7 +11,6 @@ #include <malloc.h> #include <asm/armv7.h> #include <asm/global_data.h> -#include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cpu_rk3288.h> diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c index 6f121bf1304..27a748327e3 100644 --- a/arch/arm/mach-rockchip/rk3308/rk3308.c +++ b/arch/arm/mach-rockchip/rk3308/rk3308.c @@ -5,7 +5,6 @@ #include <common.h> #include <init.h> #include <malloc.h> -#include <asm/io.h> #include <asm/arch/grf_rk3308.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/hardware.h> diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c index b591d38fe41..b8e657e9bf4 100644 --- a/arch/arm/mach-rockchip/rk3328/rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c @@ -10,7 +10,6 @@ #include <asm/arch-rockchip/grf_rk3328.h> #include <asm/arch-rockchip/uart.h> #include <asm/armv8/mmu.h> -#include <asm/io.h>
#define CRU_BASE 0xFF440000 #define GRF_BASE 0xFF100000 diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c index d009b8758e5..651ba109020 100644 --- a/arch/arm/mach-rockchip/rk3368/rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/rk3368.c @@ -8,7 +8,6 @@ #include <init.h> #include <syscon.h> #include <asm/armv8/mmu.h> -#include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3368.h> diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index a1aa0e3e8b5..7fa1d7c7b7a 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -11,7 +11,6 @@ #include <spl_gpio.h> #include <syscon.h> #include <asm/armv8/mmu.h> -#include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru.h> diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c index 69ef19cc85a..b30ea04f737 100644 --- a/arch/arm/mach-rockchip/rk3568/rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c @@ -6,7 +6,6 @@ #include <common.h> #include <dm.h> #include <asm/armv8/mmu.h> -#include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/grf_rk3568.h> #include <asm/arch-rockchip/hardware.h> diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c index 53ee9f1cebc..d9e04ede092 100644 --- a/arch/arm/mach-rockchip/rk3588/rk3588.c +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c @@ -7,7 +7,6 @@ #include <common.h> #include <spl.h> #include <asm/armv8/mmu.h> -#include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/ioc_rk3588.h> diff --git a/arch/arm/mach-rockchip/rv1126/rv1126.c b/arch/arm/mach-rockchip/rv1126/rv1126.c index b9b898756f7..8589c46f10a 100644 --- a/arch/arm/mach-rockchip/rv1126/rv1126.c +++ b/arch/arm/mach-rockchip/rv1126/rv1126.c @@ -5,7 +5,6 @@ */
#include <common.h> -#include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/grf_rv1126.h> diff --git a/board/elgin/elgin_rv1108/elgin_rv1108.c b/board/elgin/elgin_rv1108/elgin_rv1108.c index eb7a322d847..10398e7f712 100644 --- a/board/elgin/elgin_rv1108/elgin_rv1108.c +++ b/board/elgin/elgin_rv1108/elgin_rv1108.c @@ -8,7 +8,6 @@ #include <init.h> #include <syscon.h> #include <asm/global_data.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rv1108.h> #include <asm/arch-rockchip/hardware.h> diff --git a/board/firefly/firefly-rk3308/roc_cc_rk3308.c b/board/firefly/firefly-rk3308/roc_cc_rk3308.c index bdf3cc03dc5..99a52a77116 100644 --- a/board/firefly/firefly-rk3308/roc_cc_rk3308.c +++ b/board/firefly/firefly-rk3308/roc_cc_rk3308.c @@ -5,7 +5,6 @@
#include <common.h> #include <adc.h> -#include <asm/io.h> #include <asm/arch/grf_rk3308.h> #include <asm/arch-rockchip/hardware.h> #include <linux/bitops.h> diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c index ecbf702b035..9cb3a525204 100644 --- a/board/google/gru/gru.c +++ b/board/google/gru/gru.c @@ -7,7 +7,6 @@ #include <dm.h> #include <init.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c index 2408a367305..5e758ea6cd9 100644 --- a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c +++ b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c @@ -7,7 +7,6 @@ #include <common.h> #include <dm.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c index de75ee329d8..c9b0d5a061d 100644 --- a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c +++ b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c @@ -8,7 +8,6 @@ #include <dm.h> #include <init.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> diff --git a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c index d0a694ead1d..fd78ad60d14 100644 --- a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c +++ b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c @@ -7,7 +7,6 @@ #include <dm.h> #include <init.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c index e6ac598648d..0d7a486bed7 100644 --- a/board/rockchip/evb_rv1108/evb_rv1108.c +++ b/board/rockchip/evb_rv1108/evb_rv1108.c @@ -8,7 +8,6 @@ #include <init.h> #include <syscon.h> #include <asm/global_data.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rv1108.h> #include <asm/arch-rockchip/hardware.h> diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c index 98a818b135d..8b998ef4556 100644 --- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c +++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c @@ -6,7 +6,6 @@ #include <dm.h> #include <syscon.h> #include <dm/pinctrl.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/grf_rk3399.h> diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c b/board/vamrs/rock960_rk3399/rock960-rk3399.c index a7fc38d42f8..876be8ed9e1 100644 --- a/board/vamrs/rock960_rk3399/rock960-rk3399.c +++ b/board/vamrs/rock960_rk3399/rock960-rk3399.c @@ -5,7 +5,6 @@
#include <common.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3399.h> #include <asm/arch-rockchip/hardware.h> diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c index 1bb31b3313b..66f8bb16695 100644 --- a/drivers/clk/rockchip/clk_pll.c +++ b/drivers/clk/rockchip/clk_pll.c @@ -8,7 +8,6 @@ #include <dm.h> #include <errno.h> #include <log.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> #include <div64.h> diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c index 93b76538509..2875c152b20 100644 --- a/drivers/clk/rockchip/clk_px30.c +++ b/drivers/clk/rockchip/clk_px30.c @@ -15,7 +15,6 @@ #include <asm/arch-rockchip/cru_px30.h> #include <asm/arch-rockchip/hardware.h> #include <asm/global_data.h> -#include <asm/io.h> #include <dm/device-internal.h> #include <dm/lists.h> #include <dt-bindings/clock/px30-cru.h> diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c index 6bc6d41ad61..6238b14c29e 100644 --- a/drivers/clk/rockchip/clk_rk3036.c +++ b/drivers/clk/rockchip/clk_rk3036.c @@ -10,7 +10,6 @@ #include <log.h> #include <malloc.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3036.h> #include <asm/arch-rockchip/hardware.h> diff --git a/drivers/clk/rockchip/clk_rk3066.c b/drivers/clk/rockchip/clk_rk3066.c index 2c12f6e0441..f83335df6db 100644 --- a/drivers/clk/rockchip/clk_rk3066.c +++ b/drivers/clk/rockchip/clk_rk3066.c @@ -14,7 +14,6 @@ #include <malloc.h> #include <mapmem.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3066.h> #include <asm/arch-rockchip/grf_rk3066.h> diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c index 13e176cdad1..182754e7052 100644 --- a/drivers/clk/rockchip/clk_rk3128.c +++ b/drivers/clk/rockchip/clk_rk3128.c @@ -10,7 +10,6 @@ #include <log.h> #include <malloc.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3128.h> #include <asm/arch-rockchip/hardware.h> diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c index ebdd1b3f99a..f98b46a0f73 100644 --- a/drivers/clk/rockchip/clk_rk3188.c +++ b/drivers/clk/rockchip/clk_rk3188.c @@ -13,7 +13,6 @@ #include <malloc.h> #include <mapmem.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3188.h> #include <asm/arch-rockchip/grf_rk3188.h> diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c index 28cdba75758..9371c4f63a4 100644 --- a/drivers/clk/rockchip/clk_rk322x.c +++ b/drivers/clk/rockchip/clk_rk322x.c @@ -10,7 +10,6 @@ #include <log.h> #include <malloc.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk322x.h> #include <asm/arch-rockchip/hardware.h> diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index e24c32c0a2a..0b7eefad15f 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -15,7 +15,6 @@ #include <mapmem.h> #include <syscon.h> #include <asm/global_data.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru.h> #include <asm/arch-rockchip/grf_rk3288.h> diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c index d0a3f654466..7755b016111 100644 --- a/drivers/clk/rockchip/clk_rk3308.c +++ b/drivers/clk/rockchip/clk_rk3308.c @@ -12,7 +12,6 @@ #include <malloc.h> #include <syscon.h> #include <asm/global_data.h> -#include <asm/io.h> #include <asm/arch/cru_rk3308.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c index ef97381f0ed..cfec1d974ac 100644 --- a/drivers/clk/rockchip/clk_rk3328.c +++ b/drivers/clk/rockchip/clk_rk3328.c @@ -15,7 +15,6 @@ #include <asm/arch-rockchip/cru_rk3328.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/grf_rk3328.h> -#include <asm/io.h> #include <dm/device-internal.h> #include <dm/lists.h> #include <dt-bindings/clock/rk3328-cru.h> diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c index 3406ff592e1..1c5dfaa3800 100644 --- a/drivers/clk/rockchip/clk_rk3368.c +++ b/drivers/clk/rockchip/clk_rk3368.c @@ -18,7 +18,6 @@ #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3368.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/io.h> #include <dm/device-internal.h> #include <dm/lists.h> #include <dt-bindings/clock/rk3368-cru.h> diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index c37e8a53a26..80f65a237e8 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -14,7 +14,6 @@ #include <mapmem.h> #include <syscon.h> #include <bitfield.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru.h> #include <asm/arch-rockchip/hardware.h> diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c index 68f5bbbb9e5..57ef27dda89 100644 --- a/drivers/clk/rockchip/clk_rk3568.c +++ b/drivers/clk/rockchip/clk_rk3568.c @@ -13,7 +13,6 @@ #include <asm/arch-rockchip/cru_rk3568.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/io.h> #include <dm/device-internal.h> #include <dm/lists.h> #include <dt-bindings/clock/rk3568-cru.h> diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c index a995dd5591d..8f33843179b 100644 --- a/drivers/clk/rockchip/clk_rk3588.c +++ b/drivers/clk/rockchip/clk_rk3588.c @@ -14,7 +14,6 @@ #include <asm/arch-rockchip/cru_rk3588.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> -#include <asm/io.h> #include <dm/device-internal.h> #include <dm/lists.h> #include <dt-bindings/clock/rockchip,rk3588-cru.h> diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c index b0c889ae156..fc442f7eebe 100644 --- a/drivers/clk/rockchip/clk_rv1108.c +++ b/drivers/clk/rockchip/clk_rv1108.c @@ -13,7 +13,6 @@ #include <malloc.h> #include <syscon.h> #include <asm/global_data.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rv1108.h> #include <asm/arch-rockchip/hardware.h> diff --git a/drivers/clk/rockchip/clk_rv1126.c b/drivers/clk/rockchip/clk_rv1126.c index 580c0b1b0cf..cfdfcbdb0f4 100644 --- a/drivers/clk/rockchip/clk_rv1126.c +++ b/drivers/clk/rockchip/clk_rv1126.c @@ -16,7 +16,6 @@ #include <asm/arch-rockchip/grf_rv1126.h> #include <asm/arch-rockchip/hardware.h> #include <dm/device-internal.h> -#include <asm/io.h> #include <dm/lists.h> #include <dt-bindings/clock/rockchip,rv1126-cru.h>
diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c index 4a6ae554bf7..c5e096bb1ad 100644 --- a/drivers/gpio/rk_gpio.c +++ b/drivers/gpio/rk_gpio.c @@ -11,7 +11,6 @@ #include <syscon.h> #include <linux/errno.h> #include <asm/gpio.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/gpio.h> diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c index 04008d2b198..c1bae3f68bd 100644 --- a/drivers/net/gmac_rockchip.c +++ b/drivers/net/gmac_rockchip.c @@ -13,7 +13,6 @@ #include <phy.h> #include <syscon.h> #include <asm/global_data.h> -#include <asm/io.h> #include <asm/arch-rockchip/periph.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c index 74d8aed571c..c0a60be7f11 100644 --- a/drivers/ram/rockchip/dmc-rk3368.c +++ b/drivers/ram/rockchip/dmc-rk3368.c @@ -13,7 +13,6 @@ #include <ram.h> #include <regmap.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3368.h> #include <asm/arch-rockchip/grf_rk3368.h> diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c index 2728d93be32..21498e89570 100644 --- a/drivers/ram/rockchip/sdram_px30.c +++ b/drivers/ram/rockchip/sdram_px30.c @@ -10,7 +10,6 @@ #include <log.h> #include <ram.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_px30.h> #include <asm/arch-rockchip/grf_px30.h> diff --git a/drivers/ram/rockchip/sdram_rk3066.c b/drivers/ram/rockchip/sdram_rk3066.c index 39c0be56a6e..562cf544c90 100644 --- a/drivers/ram/rockchip/sdram_rk3066.c +++ b/drivers/ram/rockchip/sdram_rk3066.c @@ -17,7 +17,6 @@ #include <ram.h> #include <regmap.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3066.h> #include <asm/arch-rockchip/ddr_rk3188.h> diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c index 16a68885f1f..f689235b13d 100644 --- a/drivers/ram/rockchip/sdram_rk3188.c +++ b/drivers/ram/rockchip/sdram_rk3188.c @@ -17,7 +17,6 @@ #include <ram.h> #include <regmap.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3188.h> #include <asm/arch-rockchip/ddr_rk3188.h> diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c index 892766a8b43..5fc23c11193 100644 --- a/drivers/ram/rockchip/sdram_rk322x.c +++ b/drivers/ram/rockchip/sdram_rk322x.c @@ -12,7 +12,6 @@ #include <regmap.h> #include <syscon.h> #include <asm/global_data.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk322x.h> #include <asm/arch-rockchip/grf_rk322x.h> diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c index ec6bdcb2015..2c1afa93ecf 100644 --- a/drivers/ram/rockchip/sdram_rk3288.c +++ b/drivers/ram/rockchip/sdram_rk3288.c @@ -17,7 +17,6 @@ #include <ram.h> #include <regmap.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru.h> #include <asm/arch-rockchip/ddr_rk3288.h> diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 2bf8d48d25a..02cc4a38cf0 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -14,7 +14,6 @@ #include <ram.h> #include <regmap.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru.h> #include <asm/arch-rockchip/grf_rk3399.h> diff --git a/drivers/ram/rockchip/sdram_rv1126.c b/drivers/ram/rockchip/sdram_rv1126.c index 0a78e18c732..849e15a9193 100644 --- a/drivers/ram/rockchip/sdram_rv1126.c +++ b/drivers/ram/rockchip/sdram_rv1126.c @@ -9,7 +9,6 @@ #include <dm.h> #include <ram.h> #include <syscon.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/cru_rv1126.h> diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c index 705b424cf3d..9dec7e45dde 100644 --- a/drivers/rng/rockchip_rng.c +++ b/drivers/rng/rockchip_rng.c @@ -3,7 +3,6 @@ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd */ #include <asm/arch-rockchip/hardware.h> -#include <asm/io.h> #include <common.h> #include <dm.h> #include <linux/bitops.h> diff --git a/drivers/sysreset/sysreset_rockchip.c b/drivers/sysreset/sysreset_rockchip.c index 0fc6b683f2b..f353f9b4c79 100644 --- a/drivers/sysreset/sysreset_rockchip.c +++ b/drivers/sysreset/sysreset_rockchip.c @@ -7,7 +7,6 @@ #include <dm.h> #include <errno.h> #include <sysreset.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/cru_rk3328.h> #include <asm/arch-rockchip/hardware.h> diff --git a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c index 5e75b6ec68c..fb784636e87 100644 --- a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c +++ b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c @@ -27,7 +27,6 @@ #include <common.h> #include <log.h> #include <video.h> -#include <asm/io.h> #include <dm/device-internal.h> #include <linux/bitops.h> #include <linux/time.h> diff --git a/drivers/video/rockchip/rk3288_hdmi.c b/drivers/video/rockchip/rk3288_hdmi.c index 8bedee55ad4..efa87540340 100644 --- a/drivers/video/rockchip/rk3288_hdmi.c +++ b/drivers/video/rockchip/rk3288_hdmi.c @@ -14,7 +14,6 @@ #include <regmap.h> #include <syscon.h> #include <asm/gpio.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/grf_rk3288.h> diff --git a/drivers/video/rockchip/rk3288_mipi.c b/drivers/video/rockchip/rk3288_mipi.c index c0dffa3cba2..9d42119c826 100644 --- a/drivers/video/rockchip/rk3288_mipi.c +++ b/drivers/video/rockchip/rk3288_mipi.c @@ -14,7 +14,6 @@ #include "rk_mipi.h" #include <syscon.h> #include <asm/gpio.h> -#include <asm/io.h> #include <dm/uclass-internal.h> #include <linux/err.h> #include <linux/kernel.h> diff --git a/drivers/video/rockchip/rk3288_vop.c b/drivers/video/rockchip/rk3288_vop.c index 44f32bb5fa2..a4683852ea0 100644 --- a/drivers/video/rockchip/rk3288_vop.c +++ b/drivers/video/rockchip/rk3288_vop.c @@ -12,7 +12,6 @@ #include <syscon.h> #include <video.h> #include <asm/global_data.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3288.h> #include <asm/arch-rockchip/hardware.h> diff --git a/drivers/video/rockchip/rk3399_hdmi.c b/drivers/video/rockchip/rk3399_hdmi.c index 3041360c6ed..5f3f5d26886 100644 --- a/drivers/video/rockchip/rk3399_hdmi.c +++ b/drivers/video/rockchip/rk3399_hdmi.c @@ -12,7 +12,6 @@ #include <regmap.h> #include <syscon.h> #include <asm/gpio.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/grf_rk3399.h> diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c index 7fc79ba9045..b62d8086674 100644 --- a/drivers/video/rockchip/rk3399_mipi.c +++ b/drivers/video/rockchip/rk3399_mipi.c @@ -14,7 +14,6 @@ #include "rk_mipi.h" #include <syscon.h> #include <asm/gpio.h> -#include <asm/io.h> #include <dm/uclass-internal.h> #include <linux/err.h> #include <linux/kernel.h> diff --git a/drivers/video/rockchip/rk3399_vop.c b/drivers/video/rockchip/rk3399_vop.c index a34b491058f..cb589c7537e 100644 --- a/drivers/video/rockchip/rk3399_vop.c +++ b/drivers/video/rockchip/rk3399_vop.c @@ -13,7 +13,6 @@ #include <video.h> #include <asm/arch-rockchip/hardware.h> #include <asm/global_data.h> -#include <asm/io.h> #include "rk_vop.h"
DECLARE_GLOBAL_DATA_PTR; diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c index dbd70ad583a..5f68a610e4a 100644 --- a/drivers/video/rockchip/rk_edp.c +++ b/drivers/video/rockchip/rk_edp.c @@ -17,7 +17,6 @@ #include <reset.h> #include <syscon.h> #include <asm/gpio.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/edp_rk3288.h> diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c index 8dcd4d59645..044a29ee47a 100644 --- a/drivers/video/rockchip/rk_hdmi.c +++ b/drivers/video/rockchip/rk_hdmi.c @@ -15,7 +15,6 @@ #include <regmap.h> #include <syscon.h> #include <asm/gpio.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/hardware.h> #include "rk_hdmi.h" diff --git a/drivers/video/rockchip/rk_lvds.c b/drivers/video/rockchip/rk_lvds.c index 9cf3e3ca768..d0a015e31ee 100644 --- a/drivers/video/rockchip/rk_lvds.c +++ b/drivers/video/rockchip/rk_lvds.c @@ -13,7 +13,6 @@ #include <syscon.h> #include <asm/global_data.h> #include <asm/gpio.h> -#include <asm/io.h> #include <asm/arch-rockchip/clock.h> #include <asm/arch-rockchip/grf_rk3288.h> #include <asm/arch-rockchip/hardware.h>

From: Quentin Schulz quentin.schulz@theobroma-systems.com
Since commit 9e644284ab81 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation"), bootph-pre-ram doesn't make U-Boot proper bind the device before relocation.
While this is usually not much of an issue, it is when there's a lookup for devices by code running before the relocation. Such is the case of env_init() which calls env_driver_lookup() which calls env_get_location() which is a weak symbol and may call arch_env_get_location() also a weak symbol. Those are two functions that may traverse UCLASS to find some devices (e.g. board/theobroma-systems/common/common.c:arch_env_get_location()).
This allows something in the env_init() call stack to be able to use uclasses for SD and eMMC controller on RK3588S/RK3588. This aligns the behavior with what seems to be all SoCs except RK356x family.
Additionally, if any other env function (e.g. env_load) were to be used before relocation, this is also required as otherwise it wouldn't be able to find the MMC device(s).
Cc: Quentin Schulz foss+uboot@0leil.net Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/dts/rk3588s-u-boot.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index bf3b1ea8a3c..3f194e8ffbd 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -187,12 +187,12 @@ };
&sdmmc { - bootph-pre-ram; + bootph-all; u-boot,spl-fifo-mode; };
&sdhci { - bootph-pre-ram; + bootph-all; u-boot,spl-fifo-mode; };

Hi Quentin,
On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
Since commit 9e644284ab81 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation"), bootph-pre-ram doesn't make U-Boot proper bind the device before relocation.
While this is usually not much of an issue, it is when there's a lookup for devices by code running before the relocation. Such is the case of env_init() which calls env_driver_lookup() which calls env_get_location() which is a weak symbol and may call arch_env_get_location() also a weak symbol. Those are two functions that may traverse UCLASS to find some devices (e.g. board/theobroma-systems/common/common.c:arch_env_get_location()).
This allows something in the env_init() call stack to be able to use uclasses for SD and eMMC controller on RK3588S/RK3588. This aligns the behavior with what seems to be all SoCs except RK356x family.
Additionally, if any other env function (e.g. env_load) were to be used before relocation, this is also required as otherwise it wouldn't be able to find the MMC device(s).
Cc: Quentin Schulz foss+uboot@0leil.net Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
arch/arm/dts/rk3588s-u-boot.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index bf3b1ea8a3c..3f194e8ffbd 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -187,12 +187,12 @@ };
&sdmmc {
- bootph-pre-ram;
- bootph-all;
I know that there is no TPL for rk3588 so this does not matter at this time but I would suggest you instead add bootph-some-ram for both these instead of changing them to bootph-all.
We are not expected to need the MMC devices in TPL, and I am working on a series that changes from bootph-all to bootph-pre-ram+bootph-some-ram combo in an upcoming rk3399 cleanup series.
Regards, Jonas
u-boot,spl-fifo-mode; };
&sdhci {
- bootph-pre-ram;
- bootph-all; u-boot,spl-fifo-mode;
};

From: Quentin Schulz quentin.schulz@theobroma-systems.com
JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and is targeting Autonomous Mobile Robots (AMR).
It features: * LPDDR4X (up to 16GB) * 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131) * PCIe 3.0 4-lane on M.2 M-key connector * PCIe 2.1 1-lane on M.2 E-key * USB 2.0 on M.2 E-key * 2x USB3 OTG type-c ports with DP Alt-Mode * USB2 host port * HDMI output * 2x camera connectors, each exposing: * 2-lane MIPI-CSI * 1v2, 1v8, 2v8 power rails * I2C bus * GPIOs * PPS input * CAN * RS485 UART * FAN connector * SD card slot * eMMC (up to 256GB) * RTC backup battery * Companion microcontroller * ISL1208 RTC emulation * AMC6821 PWM emulation * On/off buzzer control * Secure Element * 80-pin Mezzanine connector for daughterboards: * GPIOs * 1Gbps Ethernet * PCIe 2.1 1-lane * 2x 2-lane MIPI-CSI * ADC channel * I2C bus * PWM * UART * SPI * SDIO * CAN * I2S * 1v8, 3v3, 5v0, dc-in (12-24V) power rails
The Device Tree comes from next-20240110 Linux kernel.
Cc: Quentin Schulz foss+uboot@0leil.net Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3588-jaguar-u-boot.dtsi | 38 + arch/arm/dts/rk3588-jaguar.dts | 803 +++++++++++++++++++++ arch/arm/mach-rockchip/rk3588/Kconfig | 28 + board/theobroma-systems/jaguar_rk3588/Kconfig | 16 + board/theobroma-systems/jaguar_rk3588/MAINTAINERS | 13 + board/theobroma-systems/jaguar_rk3588/Makefile | 10 + .../jaguar_rk3588/jaguar_rk3588.c | 52 ++ configs/jaguar-rk3588_defconfig | 115 +++ doc/board/index.rst | 1 + doc/board/rockchip/rockchip.rst | 1 + doc/board/theobroma-systems/index.rst | 9 + doc/board/theobroma-systems/jaguar_rk3588.rst | 100 +++ include/configs/jaguar_rk3588.h | 15 + 14 files changed, 1202 insertions(+)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3beb8f1b9d4..7c103655e1d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -193,6 +193,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \ rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6b-io.dtb \ rk3588-evb1-v10.dtb \ + rk3588-jaguar.dtb \ rk3588-nanopc-t6.dtb \ rk3588s-orangepi-5.dtb \ rk3588-orangepi-5-plus.dtb \ diff --git a/arch/arm/dts/rk3588-jaguar-u-boot.dtsi b/arch/arm/dts/rk3588-jaguar-u-boot.dtsi new file mode 100644 index 00000000000..a0207c265c9 --- /dev/null +++ b/arch/arm/dts/rk3588-jaguar-u-boot.dtsi @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH + */ + +#include "rk3588-u-boot.dtsi" +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/usb/pd.h> + +/ { + chosen { + u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc; + }; +}; + +&emmc_pwrseq { + bootph-all; +}; + +&emmc_reset { + bootph-all; +}; + +&gpio0 { + bootph-all; +}; + +&gpio2 { + bootph-all; +}; + +&sdhci { + /* U-Boot currently cannot handle anything below HS200 for eMMC on RK3588 */ + /delete-property/ mmc-ddr-1_8v; + /delete-property/ cap-mmc-highspeed; +}; diff --git a/arch/arm/dts/rk3588-jaguar.dts b/arch/arm/dts/rk3588-jaguar.dts new file mode 100644 index 00000000000..4ce70fb75a3 --- /dev/null +++ b/arch/arm/dts/rk3588-jaguar.dts @@ -0,0 +1,803 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/usb/pd.h> +#include "rk3588.dtsi" + +/ { + model = "Theobroma Systems RK3588-SBC Jaguar"; + compatible = "tsd,rk3588-jaguar", "rockchip,rk3588"; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + /* Can be controlled through SW2 but also GPIO1 on CP2102 on P20 */ + button-bios-disable { + label = "BIOS_DISABLE"; + linux,code = <KEY_VENDOR>; + press-threshold-microvolt = <0>; + }; + }; + + aliases { + ethernet0 = &gmac0; + mmc0 = &sdhci; + mmc1 = &sdmmc; + rtc0 = &rtc_twi; + }; + + chosen { + stdout-path = "serial2:115200n8"; + }; + + /* DCIN is 12-24V but standard is 12V */ + dc_12v: dc-12v-regulator { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + pinctrl-0 = <&emmc_reset>; + pinctrl-names = "default"; + reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led1_pin>; + status = "okay"; + + /* LED1 on PCB */ + led-1 { + gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_HEARTBEAT; + linux,default-trigger = "heartbeat"; + color = <LED_COLOR_ID_AMBER>; + }; + }; + + pps { + compatible = "pps-gpio"; + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + }; + + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc_1v2_s3: vcc-1v2-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v2_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <&vcc5v0_sys>; + }; + + /* Exposed on P14 and P15 */ + vcc_2v8_s3: vcc-2v8-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_2v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <&vcc_3v3_s3>; + }; + + vcc_5v0_usb_a: vcc-5v0-usb-a-regulator { + compatible = "regulator-fixed"; + regulator-name = "usb_a_vcc"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_sys>; + gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_5v0_usb_c1: vcc-5v0-usb-c1-regulator { + compatible = "regulator-fixed"; + regulator-name = "5v_usbc1"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc_5v0_usb_c2: vcc-5v0-usb-c2-regulator { + compatible = "regulator-fixed"; + regulator-name = "5v_usbc2"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + gpio = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + vcc3v3_mdot2: vcc3v3-mdot2-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_mdot2"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_usb: vcc5v0-usb-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_sys>; + }; +}; + +&combphy1_ps { + status = "okay"; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&gmac0 { + clock_in_out = "output"; + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii"; + phy-supply = <&vcc_1v2_s3>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_rx_bus2 + &gmac0_tx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus + ð0_pins + ð_reset>; + tx_delay = <0x10>; + rx_delay = <0x10>; + snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 100000>; + + status = "okay"; +}; + +&gpio1 { + mdot2e-w-disable1-n-hog { + gpios = <RK_PB1 GPIO_ACTIVE_LOW>; + output-low; + line-name = "m.2 E-key W_DISABLE1#"; + gpio-hog; + }; +}; + +&gpio4 { + mdot2e-w-disable2-n-hog { + gpios = <RK_PC1 GPIO_ACTIVE_LOW>; + output-low; + line-name = "m.2 E-key W_DISABLE2#"; + gpio-hog; + }; +}; + +&i2c0 { + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + fan@18 { + compatible = "ti,amc6821"; + reg = <0x18>; + }; + + vdd_npu_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_npu_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rtc_twi: rtc@6f { + compatible = "isil,isl1208"; + reg = <0x6f>; + }; +}; + +&i2c1 { + pinctrl-0 = <&i2c1m4_xfer>; +}; + +&i2c6 { + pinctrl-0 = <&i2c6m4_xfer>; +}; + +&i2c7 { + status = "okay"; + + /* SE050 Secure Element at 0x48; GPIO1_A4 for enable pin */ + + /* Also on 0x55 */ + eeprom@54 { + compatible = "st,24c04", "atmel,24c04"; + reg = <0x54>; + pagesize = <16>; + vcc-supply = <&vcc_3v3_s3>; + }; +}; + +&i2c8 { + pinctrl-0 = <&i2c8m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&mdio0 { + rgmii_phy: ethernet-phy@6 { + /* KSZ9031 or KSZ9131 */ + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x6>; + clocks = <&cru REFCLKO25M_ETH0_OUT>; + }; +}; + +&pcie2x1l0 { + reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; /* WIFI_PERST0# */ + vpcie3v3-supply = <&vcc3v3_mdot2>; + status = "okay"; +}; + +&pinctrl { + emmc { + emmc_reset: emmc-reset { + rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + ethernet { + eth_reset: eth-reset { + rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + leds { + led1_pin: led1-pin { + rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&saradc { + vref-supply = <&vcc_1v8_s0>; + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + mmc-pwrseq = <&emmc_pwrseq>; + no-sdio; + no-sd; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>; + supports-cqe; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vcc_1v8_s3>; + status = "okay"; +}; + +&sdmmc { + broken-cd; + bus-width = <4>; + cap-sd-highspeed; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_bus4 &sdmmc_cmd &sdmmc_clk>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-ddr50; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3_s3>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + +&spi2 { + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + num-cs = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; + status = "okay"; + + pmic@0 { + compatible = "rockchip,rk806"; + reg = <0x0>; + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + gpio-controller; + #gpio-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + spi-max-frequency = <1000000>; + system-power-controller; + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc5v0_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc5v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc5v0_sys>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: dcdc-reg1 { + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_gpu_s0"; + regulator-enable-ramp-delay = <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg2 { + regulator-name = "vdd_cpu_lit_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-name = "vdd_log_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <750000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: dcdc-reg4 { + regulator-name = "vdd_vdenc_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-name = "vdd_ddr_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <900000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-name = "vdd2_ddr_s3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-name = "vdd_2v0_pldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-name = "vcc_3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-name = "vddq_ddr_s0"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-name = "vcc_1v8_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca_1v8_s0: pldo-reg1 { + regulator-name = "vcca_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s0: pldo-reg2 { + regulator-name = "vcc_1v8_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda_1v2_s0: pldo-reg3 { + regulator-name = "vdda_1v2_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_3v3_s0: pldo-reg4 { + regulator-name = "vcca_3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-name = "vccio_sd_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-name = "pldo6_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-name = "vdd_0v75_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdda_ddr_pll_s0: nldo-reg2 { + regulator-name = "vdda_ddr_pll_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdda_0v75_s0: nldo-reg3 { + regulator-name = "vdda_0v75_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v85_s0: nldo-reg4 { + regulator-name = "vdda_0v85_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-name = "vdd_0v75_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&tsadc { + status = "okay"; +}; + +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + phy-supply = <&vcc_5v0_usb_a>; + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + status = "okay"; +}; + +/* Mule-ATtiny debug UART; typically baudrate 9600 */ +&uart0 { + pinctrl-0 = <&uart0m0_xfer>; + status = "okay"; +}; + +/* Main debug interface on P20 micro-USB B port and P21 header */ +&uart2 { + pinctrl-0 = <&uart2m0_xfer>; + status = "okay"; +}; + +/* RS485 on P19 */ +&uart3 { + pinctrl-0 = <&uart3m2_xfer &uart3_rtsn>; + linux,rs485-enabled-at-boot-time; + status = "okay"; +}; + +/* Mule-ATtiny UPDI flashing UART */ +&uart7 { + pinctrl-0 = <&uart7m0_xfer>; + status = "okay"; +}; + +/* host0 on P10 USB-A */ +&usb_host0_ehci { + status = "okay"; +}; + +/* host0 on P10 USB-A */ +&usb_host0_ohci { + status = "okay"; +}; + +/* host1 on M.2 E-key */ +&usb_host1_ehci { + status = "okay"; +}; + +/* host1 on M.2 E-key */ +&usb_host1_ohci { + status = "okay"; +}; diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig b/arch/arm/mach-rockchip/rk3588/Kconfig index a2193fbd41f..c6b79b6cd75 100644 --- a/arch/arm/mach-rockchip/rk3588/Kconfig +++ b/arch/arm/mach-rockchip/rk3588/Kconfig @@ -6,6 +6,33 @@ config TARGET_EVB_RK3588 help RK3588 EVB is a evaluation board for Rockchp RK3588.
+config TARGET_JAGUAR_RK3588 + bool "Theobroma Systems SBC-RK3588-AMR (Jaguar)" + select BOARD_LATE_INIT + help + The SBC-RK3588-AMR is a Single Board Computer designed by + Theobroma Systems for autonomous mobile robots. + + It provides the following features: + * up to 32GB LDDR4 + * up to 128GB on-module eMMC (with 8-bit 1.8V interface) + * SD card + * Gigabit Ethernet + * 1x USB-A 2.0 host + * PCIe M.2 2230 Key M (Gen 2 1-lane) for WiFi+BT + * PCIe M.2 2280 Key M (Gen 3 4-lane) for NVMe + * CAN + * RS485 UART + * 2x USB Type-C 3.1 host/device + * HDMI output + * 2x camera connectors (MIPI-CSI 2-lane + I2C/SPI for IMUs + GPIOs) + * EEPROM + * Secure Element + * ATtiny companion controller implementing: + - low-power RTC functionality (ISL1208 emulation) + - fan controller (AMC6821 emulation) + * 80-pin Mezzanine connector + config TARGET_NANOPCT6_RK3588 bool "FriendlyElec NanoPC-T6 RK3588 board" select BOARD_LATE_INIT @@ -174,5 +201,6 @@ source board/turing/turing-rk1-rk3588/Kconfig source board/rockchip/evb_rk3588/Kconfig source board/radxa/rock5a-rk3588s/Kconfig source board/radxa/rock5b-rk3588/Kconfig +source board/theobroma-systems/jaguar_rk3588/Kconfig
endif diff --git a/board/theobroma-systems/jaguar_rk3588/Kconfig b/board/theobroma-systems/jaguar_rk3588/Kconfig new file mode 100644 index 00000000000..0ff417af4dd --- /dev/null +++ b/board/theobroma-systems/jaguar_rk3588/Kconfig @@ -0,0 +1,16 @@ +if TARGET_JAGUAR_RK3588 + +config SYS_BOARD + default "jaguar_rk3588" + +config SYS_VENDOR + default "theobroma-systems" + +config SYS_CONFIG_NAME + default "jaguar_rk3588" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ENV_IS_NOWHERE + +endif diff --git a/board/theobroma-systems/jaguar_rk3588/MAINTAINERS b/board/theobroma-systems/jaguar_rk3588/MAINTAINERS new file mode 100644 index 00000000000..28fae4b479f --- /dev/null +++ b/board/theobroma-systems/jaguar_rk3588/MAINTAINERS @@ -0,0 +1,13 @@ +JAGUAR-RK3588 (SBC-RK3588-AMR Single Board Computer) +M: Klaus Goger klaus.goger@theobroma-systems.com +M: Quentin Schulz quentin.schulz@theobroma-systems.com +M: Heiko Stuebner heiko.stuebner@cherry.de +S: Maintained +F: board/theobroma-systems/jaguar_rk3588 +F: board/theobroma-systems/common +F: doc/board/theobroma-systems/ +F: include/configs/jaguar_rk3588.h +F: arch/arm/dts/rk3588-jaguar* +F: configs/jaguar-rk3588_defconfig +W: https://theobroma-systems.com/product/jaguar-sbc-rk3588/ +T: git git://git.theobroma-systems.com/jaguar-u-boot.git diff --git a/board/theobroma-systems/jaguar_rk3588/Makefile b/board/theobroma-systems/jaguar_rk3588/Makefile new file mode 100644 index 00000000000..532aab01532 --- /dev/null +++ b/board/theobroma-systems/jaguar_rk3588/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += jaguar_rk3588.o +ifneq ($(CONFIG_SPL_BUILD),y) +obj-y += ../common/common.o +endif diff --git a/board/theobroma-systems/jaguar_rk3588/jaguar_rk3588.c b/board/theobroma-systems/jaguar_rk3588/jaguar_rk3588.c new file mode 100644 index 00000000000..3f96c4c500f --- /dev/null +++ b/board/theobroma-systems/jaguar_rk3588/jaguar_rk3588.c @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2023 Theobroma Systems Design und Consulting GmbH + */ + +#include <asm/types.h> +#include <asm-generic/u-boot.h> +#include <phy.h> +#include <eth_phy.h> +#include <dm/uclass-id.h> +#include <dm/device.h> +#include <asm/arch-rockchip/cru_rk3588.h> +#include <asm/arch-rockchip/ioc_rk3588.h> +#include <asm/arch-rockchip/hardware.h> +#include "../common/common.h" + +#define GPIO2C3_SEL_OFFSET 12 +#define GPIO2C3_SEL_MASK GENMASK(15, GPIO2C3_SEL_OFFSET) +#define GPIO2C3_ETH0_REFCLKO_25M (0x1 << GPIO2C3_SEL_OFFSET) + +#define REFCLKO25M_ETH0_OUT_SEL_MASK BIT(15) +#define REFCLKO25M_ETH0_OUT_SEL_CPLL BIT(15) +#define REFCLKO25M_ETH0_OUT_DIV_OFFSET 8 +#define REFCLKO25M_ETH0_OUT_DIV_MASK GENMASK(14, REFCLKO25M_ETH0_OUT_DIV_OFFSET) +#define REFCLKO25M_ETH0_OUT_DIV(x) ((((x) - 1) << REFCLKO25M_ETH0_OUT_DIV_OFFSET) & REFCLKO25M_ETH0_OUT_DIV_MASK) + +#define REFCLKO25M_ETH0_OUT_EN BIT(4) + +void setup_eth0refclko(void) +{ + /* Configure and enable ETH0_REFCLKO_25MHz */ + static struct rk3588_bus_ioc * const bus_ioc = (void *)BUS_IOC_BASE; + static struct rk3588_cru * const cru = (void *)CRU_BASE; + + /* 1. Pinmux */ + rk_clrsetreg(&bus_ioc->gpio2c_iomux_sel_l, GPIO2C3_SEL_MASK, GPIO2C3_ETH0_REFCLKO_25M); + /* 2. Parent clock selection + divider => CPLL (1.5GHz) / 60 => 25MHz */ + rk_clrsetreg(&cru->clksel_con[15], + REFCLKO25M_ETH0_OUT_SEL_MASK | REFCLKO25M_ETH0_OUT_DIV_MASK, + REFCLKO25M_ETH0_OUT_SEL_CPLL | REFCLKO25M_ETH0_OUT_DIV(60)); + /* 3. Enable clock */ + rk_clrreg(&cru->clkgate_con[5], REFCLKO25M_ETH0_OUT_EN); +} + +int rockchip_early_misc_init_r(void) +{ + setup_boottargets(); + + setup_eth0refclko(); + + return 0; +} diff --git a/configs/jaguar-rk3588_defconfig b/configs/jaguar-rk3588_defconfig new file mode 100644 index 00000000000..ab550f16263 --- /dev/null +++ b/configs/jaguar-rk3588_defconfig @@ -0,0 +1,115 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00a00000 +CONFIG_SPL_GPIO=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SF_DEFAULT_MODE=0x2000 +CONFIG_ENV_SIZE=0x1f000 +CONFIG_DEFAULT_DEVICE_TREE="rk3588-jaguar" +CONFIG_ROCKCHIP_RK3588=y +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_TARGET_JAGUAR_RK3588=y +CONFIG_SPL_STACK=0x400000 +CONFIG_DEBUG_UART_BASE=0xfeb50000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +# CONFIG_BOOTMETH_VBE is not set +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-jaguar.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CYCLIC=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_ATF=y +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_ELF is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +# CONFIG_CMD_SF is not set +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MII is not set +# CONFIG_CMD_BLOCK_CACHE is not set +# CONFIG_CMD_EFICONFIG is not set +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EROFS=y +CONFIG_CMD_SQUASHFS=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +# CONFIG_OF_TAG_MIGRATE is not set +CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +# CONFIG_SARADC_ROCKCHIP is not set +CONFIG_SPL_CLK=y +CONFIG_CLK_GPIO=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_SPL_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_SPL_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_ES_SUPPORT=y +CONFIG_SPL_MMC_HS400_ES_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_SPL_MMC_HS400_SUPPORT=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +# CONFIG_SPI_FLASH is not set +CONFIG_SF_DEFAULT_BUS=5 +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_SPL_PINCTRL=y +CONFIG_SPL_RAM=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/index.rst b/doc/board/index.rst index d0f9f355d2e..39e17d7041e 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -52,6 +52,7 @@ Board-specific doc ste/index tbs/index thead/index + theobroma-systems/index ti/index toradex/index variscite/index diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index e23ca4231cc..1d5451183be 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -120,6 +120,7 @@ List of mainline supported Rockchip boards: - Turing Machines RK1 (turing-rk1-rk3588) - Radxa ROCK 5A (rock5a-rk3588s) - Radxa ROCK 5B (rock5b-rk3588) + - Theobroma Systems RK3588-SBC Jaguar (jaguar-rk3588) - Xunlong Orange Pi 5 (orangepi-5-rk3588s) - Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588)
diff --git a/doc/board/theobroma-systems/index.rst b/doc/board/theobroma-systems/index.rst new file mode 100644 index 00000000000..945f7a2f976 --- /dev/null +++ b/doc/board/theobroma-systems/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Theobroma Systems +================= + +.. toctree:: + :maxdepth: 2 + + jaguar_rk3588 diff --git a/doc/board/theobroma-systems/jaguar_rk3588.rst b/doc/board/theobroma-systems/jaguar_rk3588.rst new file mode 100644 index 00000000000..db15f945d3b --- /dev/null +++ b/doc/board/theobroma-systems/jaguar_rk3588.rst @@ -0,0 +1,100 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +SBC-RK3588-AMR Jaguar +===================== + +The SBC-RK3588-AMR is a Single Board Computer designed by +Theobroma Systems for autonomous mobile robots. + +It provides the following features: + + * up to 32GB LDDR4 + * up to 128GB on-module eMMC (with 8-bit 1.8V interface) + * SD card + * Gigabit Ethernet + * 1x USB-A 2.0 host + * PCIe M.2 2230 Key M (Gen 2 1-lane) for WiFi+BT + * PCIe M.2 2280 Key M (Gen 3 4-lane) for NVMe + * CAN + * RS485 UART + * 2x USB Type-C 3.1 host/device + * HDMI output + * 2x camera connectors (MIPI-CSI 2-lane I2C/SPI for IMUs GPIOs) + * EEPROM + * Secure Element + * ATtiny companion controller implementing: + + - low-power RTC functionality (ISL1208 emulation) + - fan controller (AMC6821 emulation) + + * 80-pin Mezzanine connector + +Here is the step-by-step to boot to U-Boot on SBC-RK3588-AMR Jaguar from Theobroma +Systems. + +Get the TF-A and DDR init (TPL) binaries +---------------------------------------- + +.. prompt:: bash + + git clone https://github.com/rockchip-linux/rkbin + cd rkbin + export RKBIN=$(pwd) + export BL31=$RKBIN/bin/rk35/rk3588_bl31_v1.38.elf + export ROCKCHIP_TPL=$RKBIN/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.11.bin + sed -i 's/^uart baudrate=.*$/uart baudrate=115200/' tools/ddrbin_param.txt + ./tools/ddrbin_tool tools/ddrbin_param.txt "$ROCKCHIP_TPL" + ./tools/boot_merger RKBOOT/RK3588MINIALL.ini + export RKDB=$RKBIN/rk3588_spl_loader_v1.11.112.bin + +This will setup all required external dependencies for compiling U-Boot. This will +be updated in the future once upstream Trusted-Firmware-A supports RK3588 or U-Boot +gains support for open-source DRAM initialization in TPL. + +Build U-Boot +------------ + +.. prompt:: bash + + cd ../u-boot + make CROSS_COMPILE=aarch64-linux-gnu- jaguar-rk3588_defconfig all + +This will build ``u-boot-rockchip.bin`` which can be written to an MMC device +(eMMC or SD card). + +Flash the image +--------------- + +Copy ``u-boot-rockchip.bin`` to offset 32k for SD/eMMC. + +SD-Card +~~~~~~~ + +.. prompt:: bash + + dd if=u-boot-rockchip.bin of=/dev/sdX seek=64 + +.. note:: + + Replace ``/dev/sdX`` to match your SD card kernel device. + +eMMC +~~~~ + +``rkdeveloptool`` allows to flash the on-board eMMC via the USB OTG interface +with help of the Rockchip loader binary. + +To enter the USB flashing mode, remove any SD card, insert a USB-C cable in the +``DOWNLOAD`` USB Type-C connector (P11) and then power cycle or reset the board +while pressing the ``BIOS`` (SW2) button. A new USB device should have appeared +on your PC (check with ``lsusb -d 2207:350b``). + +To flash U-Boot on the eMMC with ``rkdeveloptool``: + +.. prompt:: bash + + git clone https://github.com/rockchip-linux/rkdeveloptool + cd rkdeveloptool + autoreconf -i && CPPFLAGS=-Wno-format-truncation ./configure && make + ./rkdeveloptool db "$RKDB" + ./rkdeveloptool wl 64 ../u-boot-rockchip.bin diff --git a/include/configs/jaguar_rk3588.h b/include/configs/jaguar_rk3588.h new file mode 100644 index 00000000000..843028c5385 --- /dev/null +++ b/include/configs/jaguar_rk3588.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH + */ + +#ifndef __JAGUAR_RK3588_H +#define __JAGUAR_RK3588_H + +#define ROCKCHIP_DEVICE_SETTINGS \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" + +#include <configs/rk3588_common.h> + +#endif /* __JAGUAR_RK3588_H */

Hi Quentin,
On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and is targeting Autonomous Mobile Robots (AMR).
It features:
- LPDDR4X (up to 16GB)
- 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131)
- PCIe 3.0 4-lane on M.2 M-key connector
- PCIe 2.1 1-lane on M.2 E-key
- USB 2.0 on M.2 E-key
- 2x USB3 OTG type-c ports with DP Alt-Mode
- USB2 host port
- HDMI output
- 2x camera connectors, each exposing:
- 2-lane MIPI-CSI
- 1v2, 1v8, 2v8 power rails
- I2C bus
- GPIOs
- PPS input
- CAN
- RS485 UART
- FAN connector
- SD card slot
- eMMC (up to 256GB)
- RTC backup battery
- Companion microcontroller
- ISL1208 RTC emulation
- AMC6821 PWM emulation
- On/off buzzer control
- Secure Element
- 80-pin Mezzanine connector for daughterboards:
- GPIOs
- 1Gbps Ethernet
- PCIe 2.1 1-lane
- 2x 2-lane MIPI-CSI
- ADC channel
- I2C bus
- PWM
- UART
- SPI
- SDIO
- CAN
- I2S
- 1v8, 3v3, 5v0, dc-in (12-24V) power rails
The Device Tree comes from next-20240110 Linux kernel.
Cc: Quentin Schulz foss+uboot@0leil.net Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3588-jaguar-u-boot.dtsi | 38 + arch/arm/dts/rk3588-jaguar.dts | 803 +++++++++++++++++++++ arch/arm/mach-rockchip/rk3588/Kconfig | 28 + board/theobroma-systems/jaguar_rk3588/Kconfig | 16 + board/theobroma-systems/jaguar_rk3588/MAINTAINERS | 13 + board/theobroma-systems/jaguar_rk3588/Makefile | 10 + .../jaguar_rk3588/jaguar_rk3588.c | 52 ++ configs/jaguar-rk3588_defconfig | 115 +++ doc/board/index.rst | 1 + doc/board/rockchip/rockchip.rst | 1 + doc/board/theobroma-systems/index.rst | 9 + doc/board/theobroma-systems/jaguar_rk3588.rst | 100 +++ include/configs/jaguar_rk3588.h | 15 + 14 files changed, 1202 insertions(+)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3beb8f1b9d4..7c103655e1d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -193,6 +193,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \ rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6b-io.dtb \ rk3588-evb1-v10.dtb \
- rk3588-jaguar.dtb \ rk3588-nanopc-t6.dtb \ rk3588s-orangepi-5.dtb \ rk3588-orangepi-5-plus.dtb \
diff --git a/arch/arm/dts/rk3588-jaguar-u-boot.dtsi b/arch/arm/dts/rk3588-jaguar-u-boot.dtsi new file mode 100644 index 00000000000..a0207c265c9 --- /dev/null +++ b/arch/arm/dts/rk3588-jaguar-u-boot.dtsi @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH
- */
+#include "rk3588-u-boot.dtsi" +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/usb/pd.h>
These dt-bindings includes should not be needed in this file.
+/ {
- chosen {
u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
Is there specific reasoning behind why eMMC is listed before SD-card?
rk3588-u-boot.dtsi should now contain a default with a same-as-spl > SD-card > eMMC order.
Also guess in practice it should not matter mutch, if TPL/SPL is running from eMMC it will read FIT from eMMC > eMMC > SD-card. And if TPL/SPL is running from SD-card it will read FIT from SD-card > eMMC > SD-card.
Main difference would be if TPL/SPL is running from SPI, then it will read FIT from SPI > eMMC > SD-card instead of SPI > SD-card > eMMC.
In my mind anything after same-as-spl would mostly be used for recovery. And preferring SD-card may ease in such situation?
- };
+};
+&emmc_pwrseq {
- bootph-all;
+};
+&emmc_reset {
- bootph-all;
+};
+&gpio0 {
- bootph-all;
+};
+&gpio2 {
- bootph-all;
I am guessing that emmc_pwrseq, gpio0 and gpio2 would not be needed in TPL so bootph-all could be too inclusive, for now I guess this does not really matter because an external TPL blob is used anyway.
Regards, Jonas
+};
+&sdhci {
- /* U-Boot currently cannot handle anything below HS200 for eMMC on RK3588 */
- /delete-property/ mmc-ddr-1_8v;
- /delete-property/ cap-mmc-highspeed;
+};
[snip]

Hi Jonas,
On 2/11/24 22:34, Jonas Karlman wrote:
Hi Quentin,
On 2024-02-09 10:50, Quentin Schulz wrote:
From: Quentin Schulz quentin.schulz@theobroma-systems.com
JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and is targeting Autonomous Mobile Robots (AMR).
It features:
- LPDDR4X (up to 16GB)
- 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131)
- PCIe 3.0 4-lane on M.2 M-key connector
- PCIe 2.1 1-lane on M.2 E-key
- USB 2.0 on M.2 E-key
- 2x USB3 OTG type-c ports with DP Alt-Mode
- USB2 host port
- HDMI output
- 2x camera connectors, each exposing:
- 2-lane MIPI-CSI
- 1v2, 1v8, 2v8 power rails
- I2C bus
- GPIOs
- PPS input
- CAN
- RS485 UART
- FAN connector
- SD card slot
- eMMC (up to 256GB)
- RTC backup battery
- Companion microcontroller
- ISL1208 RTC emulation
- AMC6821 PWM emulation
- On/off buzzer control
- Secure Element
- 80-pin Mezzanine connector for daughterboards:
- GPIOs
- 1Gbps Ethernet
- PCIe 2.1 1-lane
- 2x 2-lane MIPI-CSI
- ADC channel
- I2C bus
- PWM
- UART
- SPI
- SDIO
- CAN
- I2S
- 1v8, 3v3, 5v0, dc-in (12-24V) power rails
The Device Tree comes from next-20240110 Linux kernel.
Cc: Quentin Schulz foss+uboot@0leil.net Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com
arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3588-jaguar-u-boot.dtsi | 38 + arch/arm/dts/rk3588-jaguar.dts | 803 +++++++++++++++++++++ arch/arm/mach-rockchip/rk3588/Kconfig | 28 + board/theobroma-systems/jaguar_rk3588/Kconfig | 16 + board/theobroma-systems/jaguar_rk3588/MAINTAINERS | 13 + board/theobroma-systems/jaguar_rk3588/Makefile | 10 + .../jaguar_rk3588/jaguar_rk3588.c | 52 ++ configs/jaguar-rk3588_defconfig | 115 +++ doc/board/index.rst | 1 + doc/board/rockchip/rockchip.rst | 1 + doc/board/theobroma-systems/index.rst | 9 + doc/board/theobroma-systems/jaguar_rk3588.rst | 100 +++ include/configs/jaguar_rk3588.h | 15 + 14 files changed, 1202 insertions(+)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3beb8f1b9d4..7c103655e1d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -193,6 +193,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \ rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6b-io.dtb \ rk3588-evb1-v10.dtb \
- rk3588-jaguar.dtb \ rk3588-nanopc-t6.dtb \ rk3588s-orangepi-5.dtb \ rk3588-orangepi-5-plus.dtb \
diff --git a/arch/arm/dts/rk3588-jaguar-u-boot.dtsi b/arch/arm/dts/rk3588-jaguar-u-boot.dtsi new file mode 100644 index 00000000000..a0207c265c9 --- /dev/null +++ b/arch/arm/dts/rk3588-jaguar-u-boot.dtsi @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*
- Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH
- */
+#include "rk3588-u-boot.dtsi" +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/usb/pd.h>
These dt-bindings includes should not be needed in this file.
+/ {
- chosen {
u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
Is there specific reasoning behind why eMMC is listed before SD-card?
Consistency with our other products (Ringneck PX30 and Puma RK3399).
rk3588-u-boot.dtsi should now contain a default with a same-as-spl > SD-card > eMMC order.
Also guess in practice it should not matter mutch, if TPL/SPL is running from eMMC it will read FIT from eMMC > eMMC > SD-card. And if TPL/SPL is running from SD-card it will read FIT from SD-card > eMMC > SD-card.
I was pondering whether we should do something about this, to avoid reading twice from the same boot medium, this unnecessarily increase the boot time in case we're entering the fallback mechanism.
Main difference would be if TPL/SPL is running from SPI, then it will read FIT from SPI > eMMC > SD-card instead of SPI > SD-card > eMMC.
Yes, we do have an SPI-NOR on Puma, and we want SPI -> eMMC -> SD card there (mainly because that's what we've always done, thus now for "backward" compatibility).
For SPI-less systems, I guess it doesn't matter much indeed.
In my mind anything after same-as-spl would mostly be used for recovery. And preferring SD-card may ease in such situation?
No, this we don't want. But this is just a different policy from Rockchip's default.
c.f. https://lore.kernel.org/u-boot/7b5cb03f-c2b2-4cf2-b06a-751d7cc978b9@theobrom...
- };
+};
+&emmc_pwrseq {
- bootph-all;
+};
+&emmc_reset {
- bootph-all;
+};
+&gpio0 {
- bootph-all;
+};
+&gpio2 {
- bootph-all;
I am guessing that emmc_pwrseq, gpio0 and gpio2 would not be needed in TPL so bootph-all could be too inclusive, for now I guess this does not really matter because an external TPL blob is used anyway.
Don't have much of a choice sadly, c.f. https://source.denx.de/u-boot/u-boot/-/commit/9e644284ab812f2db23f6185af77c0... Considering that we need the eMMC in U-Boot proper before relocation, I assume I need the emmc_pwrseq as well in bootph-all.
As for gpio0, I think we use one of the pins in that bank for the NVMe but we indeed wouldn't need it before relocation. Especially since I somehow didn't manage to get it to work in U-Boot yet.
Cheers, Quentin

From: Quentin Schulz quentin.schulz@theobroma-systems.com
There are multiple Device Trees in U-Boot git repo for Puma, so let's make the MAINTAINERS entry match them all.
Cc: Quentin Schulz foss+uboot@0leil.net Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/theobroma-systems/puma_rk3399/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/theobroma-systems/puma_rk3399/MAINTAINERS b/board/theobroma-systems/puma_rk3399/MAINTAINERS index 93f570fc4f9..23701b3f0ed 100644 --- a/board/theobroma-systems/puma_rk3399/MAINTAINERS +++ b/board/theobroma-systems/puma_rk3399/MAINTAINERS @@ -5,7 +5,7 @@ S: Maintained F: board/theobroma-systems/puma_rk3399 F: board/theobroma-systems/common F: include/configs/puma_rk3399.h -F: arch/arm/dts/rk3399-puma.dts +F: arch/arm/dts/rk3399-puma* F: configs/puma-rk3399_defconfig W: https://www.theobroma-systems.com/rk3399-q7/tech-specs T: git git://git.theobroma-systems.com/puma-u-boot.git

From: Quentin Schulz quentin.schulz@theobroma-systems.com
This migrates the plaintext README in board/theobroma-systems/puma_rk3399 to doc/board/theobroma-systems and while doing so, update the instructions and rewrite it in rST.
Cc: Quentin Schulz foss+uboot@0leil.net Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/theobroma-systems/puma_rk3399/MAINTAINERS | 1 + board/theobroma-systems/puma_rk3399/README | 90 +---------------- doc/board/theobroma-systems/index.rst | 1 + doc/board/theobroma-systems/puma_rk3399.rst | 126 ++++++++++++++++++++++++ 4 files changed, 129 insertions(+), 89 deletions(-)
diff --git a/board/theobroma-systems/puma_rk3399/MAINTAINERS b/board/theobroma-systems/puma_rk3399/MAINTAINERS index 23701b3f0ed..7e84a5be262 100644 --- a/board/theobroma-systems/puma_rk3399/MAINTAINERS +++ b/board/theobroma-systems/puma_rk3399/MAINTAINERS @@ -4,6 +4,7 @@ M: Klaus Goger klaus.goger@theobroma-systems.com S: Maintained F: board/theobroma-systems/puma_rk3399 F: board/theobroma-systems/common +F: doc/board/theobroma-systems F: include/configs/puma_rk3399.h F: arch/arm/dts/rk3399-puma* F: configs/puma-rk3399_defconfig diff --git a/board/theobroma-systems/puma_rk3399/README b/board/theobroma-systems/puma_rk3399/README index 649aa3c543d..39c9d618866 100644 --- a/board/theobroma-systems/puma_rk3399/README +++ b/board/theobroma-systems/puma_rk3399/README @@ -1,89 +1 @@ -Introduction -============ - -The RK3399-Q7 (Puma) is a system-on-module featuring the Rockchip -RK3399 in a Qseven-compatible form-factor. - -RK3399-Q7 features: - * CPU: ARMv8 64bit Big-Little architecture, - * Big: dual-core Cortex-A72 - * Little: quad-core Cortex-A53 - * IRAM: 200KB - * DRAM: 4GB-128MB dual-channel - * eMMC: onboard eMMC - * SD/MMC - * GbE (onboard Micrel KSZ9031) Gigabit ethernet PHY - * USB: - * USB3.0 dual role port - * 2x USB3.0 host, 1x USB2.0 host via onboard USB3.0 hub - * Display: HDMI/eDP/MIPI - * Camera: 2x CSI (one on the edge connector, one on the Q7 specified CSI ZIF) - * NOR Flash: onboard SPI NOR - * Companion Controller: onboard additional Cortex-M0 microcontroller - * RTC - * fan controller - * CAN - -Here is the step-by-step to boot to U-Boot on rk3399. - -Get the Source and build ATF binary -=================================== - - > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git - -Compile the ATF -=============== - - > cd trusted-firmware-a - > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31 - > cp build/rk3399/release/bl31/bl31.elf ../u-boot/bl31.elf - -Compile the U-Boot -================== - - > cd ../u-boot - > make CROSS_COMPILE=aarch64-linux-gnu- puma-rk3399_defconfig all - -Flash the image -=============== - -Copy u-boot-rockchip.bin to offset 32k for SD/eMMC. -Copy u-boot-rockchip-spi.bin to offset 0 for NOR-flash. - -SD-Card -------- - - > dd if=u-boot-rockchip.bin of=/dev/sdb seek=64 - -eMMC ----- - -rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with -help of the Rockchip loader binary. - - > git clone https://github.com/rockchip-linux/rkdeveloptool - > cd rkdeveloptool - > autoreconf -i && ./configure && make - > git clone https://github.com/rockchip-linux/rkbin.git - > cd rkbin - > ./tools/boot_merger RKBOOT/RK3399MINIALL.ini - > cd .. - > ./rkdeveloptool db rkbin/rk3399_loader_v1.25.126.bin - > ./rkdeveloptool wl 64 ../u-boot-rockchip.bin - -NOR-Flash ---------- - -rkdeveloptool allows to flash the on-board SPI via the USB OTG interface with -help of the Rockchip loader binary. - - > git clone https://github.com/rockchip-linux/rkdeveloptool - > cd rkdeveloptool - > autoreconf -i && ./configure && make - > git clone https://github.com/rockchip-linux/rkbin.git - > cd rkbin - > ./tools/boot_merger RKBOOT/RK3399MINIALL_SPINOR.ini - > cd .. - > ./rkdeveloptool db rkbin/rk3399_loader_spinor_v1.25.114.bin - > ./rkdeveloptool ef - > ./rkdeveloptool wl 0 ../u-boot-rockchip-spi.bin +See doc/board/theobroma-systems/puma_rk3399.rst. diff --git a/doc/board/theobroma-systems/index.rst b/doc/board/theobroma-systems/index.rst index 945f7a2f976..0720128ad52 100644 --- a/doc/board/theobroma-systems/index.rst +++ b/doc/board/theobroma-systems/index.rst @@ -7,3 +7,4 @@ Theobroma Systems :maxdepth: 2
jaguar_rk3588 + puma_rk3399 diff --git a/doc/board/theobroma-systems/puma_rk3399.rst b/doc/board/theobroma-systems/puma_rk3399.rst new file mode 100644 index 00000000000..5bc6385e451 --- /dev/null +++ b/doc/board/theobroma-systems/puma_rk3399.rst @@ -0,0 +1,126 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +RK3399-Q7 Puma +============== + +The RK3399-Q7 (Puma) is a system-on-module featuring the Rockchip +RK3399 in a Qseven-compatible form-factor. + +RK3399-Q7 features: + + * CPU: ARMv8 64bit Big-Little architecture, + + * Big: dual-core Cortex-A72 + * Little: quad-core Cortex-A53 + * IRAM: 200KB + * DRAM: 4GB-128MB dual-channel + + * eMMC: onboard eMMC + * SD/MMC + * GbE (onboard Micrel KSZ9031) Gigabit ethernet PHY + * USB: + + * USB3.0 dual role port + * 2x USB3.0 host, 1x USB2.0 host via onboard USB3.0 hub + + * Display: HDMI/eDP/MIPI + * Camera: 2x CSI (one on the edge connector, one on the Q7 specified CSI ZIF) + * NOR Flash: onboard SPI NOR + * Companion Controller: onboard additional Cortex-M0 microcontroller + * RTC + * fan controller + * CAN + +Here is the step-by-step to boot to U-Boot on RK3399-Q7 from Theobroma Systems. + +Get the Source and build ATF binary +----------------------------------- + +.. prompt:: bash + + git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git + cd trusted-firmware-a + make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31 + export BL31=$PWD/build/rk3399/release/bl31/bl31.elf + +Compile the U-Boot +------------------ + +.. prompt:: bash + + cd ../u-boot + make CROSS_COMPILE=aarch64-linux-gnu- puma-rk3399_defconfig all + +This will build ``u-boot-rockchip.bin`` which can be written to an MMC device +(eMMC or SD card), and ``u-boot-rockchip-spi.bin`` which can be written to the +SPI-NOR flash. + +Flash the image +--------------- + +Copy ``u-boot-rockchip.bin`` to offset 32k for SD/eMMC. +Copy ``u-boot-rockchip-spi.bin`` to offset 0 for NOR-flash. + +SD-Card +~~~~~~~ + +.. prompt:: bash + + dd if=u-boot-rockchip.bin of=/dev/sdX seek=64 + +.. note:: + + Replace ``/dev/sdX`` to match your SD card kernel device. + +eMMC +~~~~ + +``rkdeveloptool`` allows to flash the on-board eMMC via the USB OTG interface +with help of the Rockchip loader binary. + +To enter the USB flashing mode on Haikou baseboard, remove any SD card, insert a +micro-USB cable in the ``Q7 USB P1`` connector (P8), move ``SW5`` switch into +``BIOS Disable`` mode, power cycle or reset the board and move ``SW5`` switch +back to ``Normal Boot`` mode. A new USB device should have appeared on your PC +(check with ``lsusb -d 2207:330c``). + +To flash U-Boot on the eMMC with ``rkdeveloptool``: + +.. prompt:: bash + + git clone https://github.com/rockchip-linux/rkdeveloptool + cd rkdeveloptool + autoreconf -i && CPPFLAGS=-Wno-format-truncation ./configure && make + git clone https://github.com/rockchip-linux/rkbin.git + cd rkbin + ./tools/boot_merger RKBOOT/RK3399MINIALL.ini + cd .. + ./rkdeveloptool db rkbin/rk3399_loader_v1.30.130.bin + ./rkdeveloptool wl 64 ../u-boot-rockchip.bin + +NOR-Flash +~~~~~~~~~ + +``rkdeveloptool`` allows to flash the on-board SPI via the USB OTG interface with +help of the Rockchip loader binary. + +To enter the USB flashing mode on Haikou baseboard, remove any SD card, insert a +micro-USB cable in the ``Q7 USB P1`` connector (P8), move ``SW5`` switch into +``BIOS Disable`` mode, power cycle or reset the board and move ``SW5`` switch +back to ``Normal Boot`` mode. A new USB device should have appeared on your PC +(check with ``lsusb -d 2207:330c``). + +To flash U-Boot on the SPI with ``rkdeveloptool``: + +.. prompt:: bash + + git clone https://github.com/rockchip-linux/rkdeveloptool + cd rkdeveloptool + autoreconf -i && CPPFLAGS=-Wno-format-truncation ./configure && make + git clone https://github.com/rockchip-linux/rkbin.git + cd rkbin + ./tools/boot_merger RKBOOT/RK3399MINIALL_SPINOR.ini + cd .. + ./rkdeveloptool db rkbin/rk3399_loader_spinor_v1.30.114.bin + ./rkdeveloptool ef + ./rkdeveloptool wl 0 ../u-boot-rockchip-spi.bin

From: Quentin Schulz quentin.schulz@theobroma-systems.com
This migrates the plaintext README in board/theobroma-systems/ringneck_px30 to doc/board/theobroma-systems and while doing so, update the instructions and rewrite it in rST.
Cc: Quentin Schulz foss+uboot@0leil.net Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/theobroma-systems/ringneck_px30/MAINTAINERS | 1 + board/theobroma-systems/ringneck_px30/README | 70 +---------------- doc/board/theobroma-systems/index.rst | 1 + doc/board/theobroma-systems/ringneck_px30.rst | 95 +++++++++++++++++++++++ 4 files changed, 98 insertions(+), 69 deletions(-)
diff --git a/board/theobroma-systems/ringneck_px30/MAINTAINERS b/board/theobroma-systems/ringneck_px30/MAINTAINERS index 06e1beaab14..601830fe45b 100644 --- a/board/theobroma-systems/ringneck_px30/MAINTAINERS +++ b/board/theobroma-systems/ringneck_px30/MAINTAINERS @@ -4,6 +4,7 @@ M: Klaus Goger klaus.goger@theobroma-systems.com S: Maintained F: board/theobroma-systems/ringneck_px30 F: board/theobroma-systems/common +F: doc/board/theobroma-systems/ F: include/configs/ringneck_px30.h F: arch/arm/dts/px30-ringneck* F: configs/ringneck-px30_defconfig diff --git a/board/theobroma-systems/ringneck_px30/README b/board/theobroma-systems/ringneck_px30/README index e756b3a8ffc..915baf4a9a0 100644 --- a/board/theobroma-systems/ringneck_px30/README +++ b/board/theobroma-systems/ringneck_px30/README @@ -1,69 +1 @@ -Introduction -============ - -The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm, MXM-230 -connector) system-on-module from Theobroma Systems[1], featuring the -Rockchip PX30. - -It provides the following feature set: - * up to 4GB DDR4 - * up to 128GB on-module eMMC (with 8-bit 1.8V interface) - * SD card (on a baseboard) via edge connector - * Fast Ethernet with on-module TI DP83825I PHY - * MIPI-DSI/LVDS - * MIPI-CSI - * USB - - 1x USB 2.0 dual-role - - 3x USB 2.0 host - * on-module companion controller (STM32 Cortex-M0 or ATtiny), implementing: - - low-power RTC functionality (ISL1208 emulation) - - fan controller (AMC6821 emulation) - - USB<->CAN bridge controller (STM32 only) - * on-module Espressif ESP32 for Bluetooth + 2.4GHz WiFi - * on-module NXP SE05x Secure Element - -Here is the step-by-step to boot to U-Boot on px30. - -Get the Source and build ATF binary -=================================== - - > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git - -Compile the ATF -=============== - - > cd trusted-firmware-a - > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=px30 bl31 - > cp build/px30/release/bl31/bl31.elf ../u-boot/bl31.elf - -Compile the U-Boot -================== - - > cd ../u-boot - > make CROSS_COMPILE=aarch64-linux-gnu- ringneck-px30_defconfig all - -Flash the image -=============== - -Copy u-boot-rockchip.bin to offset 32k for SD/eMMC. - -SD-Card -------- - - > dd if=u-boot-rockchip.bin of=/dev/sdb seek=64 - -eMMC ----- - -rkdeveloptool allows to flash the on-board eMMC via the USB OTG interface with -help of the Rockchip loader binary. - - > git clone https://github.com/rockchip-linux/rkdeveloptool - > cd rkdeveloptool - > autoreconf -i && ./configure && make - > git clone https://github.com/rockchip-linux/rkbin.git - > cd rkbin - > ./tools/boot_merger RKBOOT/PX30MINIALL.ini - > cd .. - > ./rkdeveloptool db rkbin/px30_loader_v1.16.131.bin - > ./rkdeveloptool wl 64 ../u-boot-rockchip.bin +See doc/board/theobroma-systems/ringneck_px30.rst. diff --git a/doc/board/theobroma-systems/index.rst b/doc/board/theobroma-systems/index.rst index 0720128ad52..b4da2616c37 100644 --- a/doc/board/theobroma-systems/index.rst +++ b/doc/board/theobroma-systems/index.rst @@ -8,3 +8,4 @@ Theobroma Systems
jaguar_rk3588 puma_rk3399 + ringneck_px30 diff --git a/doc/board/theobroma-systems/ringneck_px30.rst b/doc/board/theobroma-systems/ringneck_px30.rst new file mode 100644 index 00000000000..c16b9ed17ed --- /dev/null +++ b/doc/board/theobroma-systems/ringneck_px30.rst @@ -0,0 +1,95 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +PX30-uQ7 Ringneck +================= + +The PX30-uQ7 (Ringneck) SoM is a µQseven-compatible (40mmx70mm, MXM-230 +connector) system-on-module from Theobroma Systems, featuring the Rockchip PX30. + +It provides the following feature set: + + * up to 4GB DDR4 + * up to 128GB on-module eMMC (with 8-bit 1.8V interface) + * SD card (on a baseboard) via edge connector + * Fast Ethernet with on-module TI DP83825I PHY + * MIPI-DSI/LVDS + * MIPI-CSI + * USB + + - 1x USB 2.0 dual-role + - 3x USB 2.0 host + + * on-module companion controller (STM32 Cortex-M0 or ATtiny), implementing: + + - low-power RTC functionality (ISL1208 emulation) + - fan controller (AMC6821 emulation) + - USB<->CAN bridge controller (STM32 only) + + * on-module Espressif ESP32 for Bluetooth + 2.4GHz WiFi + * on-module NXP SE05x Secure Element + +Here is the step-by-step to boot to U-Boot on PX30-uQ7 Ringneck from Theobroma +Systems. + +Get the Source and build ATF binary +----------------------------------- + +.. prompt:: bash + + git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git + cd trusted-firmware-a + make CROSS_COMPILE=aarch64-linux-gnu- PLAT=px30 bl31 + export BL31=$PWD/build/px30/release/bl31/bl31.elf + +Compile the U-Boot +------------------ + +.. prompt:: bash + + cd ../u-boot + make CROSS_COMPILE=aarch64-linux-gnu- ringneck-px30_defconfig all + +This will build ``u-boot-rockchip.bin`` which can be written to an MMC device +(eMMC or SD card). + +Flash the image +--------------- + +Copy ``u-boot-rockchip.bin`` to offset 32k for SD/eMMC. + +SD-Card +~~~~~~~ + +.. prompt:: bash + + dd if=u-boot-rockchip.bin of=/dev/sdX seek=64 + +.. note:: + + Replace ``/dev/sdX`` to match your SD card kernel device. + +eMMC +~~~~ + +``rkdeveloptool`` allows to flash the on-board eMMC via the USB OTG interface +with help of the Rockchip loader binary. + +To enter the USB flashing mode on Haikou baseboard, remove any SD card, insert a +micro-USB cable in the ``Q7 USB P1`` connector (P8), move ``SW5`` switch into +``BIOS Disable`` mode, power cycle or reset the board and move ``SW5`` switch +back to ``Normal Boot`` mode. A new USB device should have appeared on your PC +(check with ``lsusb -d 2207:330d``). + +To flash U-Boot on the eMMC with ``rkdeveloptool``: + +.. prompt:: bash + + git clone https://github.com/rockchip-linux/rkdeveloptool + cd rkdeveloptool + autoreconf -i && CPPFLAGS=-Wno-format-truncation ./configure && make + git clone https://github.com/rockchip-linux/rkbin.git + cd rkbin + ./tools/boot_merger RKBOOT/PX30MINIALL.ini + cd .. + ./rkdeveloptool db rkbin/px30_loader_v2.08.135.bin + ./rkdeveloptool wl 64 ../u-boot-rockchip.bin

From: Quentin Schulz quentin.schulz@theobroma-systems.com
The original link returns a custom 404, so let's point to a link that works today instead.
Cc: Quentin Schulz foss+uboot@0leil.net Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com --- board/theobroma-systems/ringneck_px30/MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/theobroma-systems/ringneck_px30/MAINTAINERS b/board/theobroma-systems/ringneck_px30/MAINTAINERS index 601830fe45b..97baf334d02 100644 --- a/board/theobroma-systems/ringneck_px30/MAINTAINERS +++ b/board/theobroma-systems/ringneck_px30/MAINTAINERS @@ -8,4 +8,4 @@ F: doc/board/theobroma-systems/ F: include/configs/ringneck_px30.h F: arch/arm/dts/px30-ringneck* F: configs/ringneck-px30_defconfig -W: https://www.theobroma-systems.com/px30-uq7#tech-spec +W: https://theobroma-systems.com/product/ringneck-som-px30-uq7/
participants (7)
-
Dragan Simic
-
Johan Jonker
-
Jonas Karlman
-
Mark Kettenis
-
Peter Robinson
-
Quentin Schulz
-
Quentin Schulz