[PATCH 00/19] sandbox: Preparation for running vboot from coreboot

This series contains various patches related to running U-Boot with Chromium OS verified boot. Most of them relate to sandbox.
Simon Glass (19): sandbox: Only call timer_timebase_fallback() if present sandbox: Only delete the executable if requested sandbox: cros_ec: Only write EC state when the EC is probed sandbox: Disintangle declarations in do_host_bind() sandbox: Update do_host_bind() argument counting sandbox: Provide a way to bind fixed/removeable devices sandbox: image: Allow sandbox to load any image test: Silenece the echo and print tests binman: Show a message when changing subnodes spl: Split out bootstage ID into a function bootstage: Warning if space is exhausted sf: Support querying write-protect cpu: Rename SPL_CPU_SUPPORT to SPL_CPU malloc: Export malloc_simple_info() doc: Convert Chromium OS docs to rst command: Fix operation of !CONFIG_CMDLINE bloblist: Make BLOBLIST_TABLES depend on BLOBLIST bootm: Skip command-line substitution if !CONFIG_CMDLINE sandbox: Correct uninit conflict
arch/riscv/cpu/ax25/Kconfig | 2 +- arch/riscv/cpu/fu540/Kconfig | 2 +- arch/riscv/cpu/generic/Kconfig | 2 +- arch/sandbox/cpu/cpu.c | 6 +- arch/sandbox/cpu/os.c | 24 +++-- arch/x86/lib/spl.c | 2 +- cmd/host.c | 35 +++++-- common/bootm.c | 3 +- common/bootstage.c | 18 ++-- common/image-fit.c | 4 + common/spl/Kconfig | 2 +- common/spl/spl.c | 23 ++++- configs/chromebook_coral_defconfig | 2 +- configs/chromebook_link64_defconfig | 2 +- configs/qemu-x86_64_defconfig | 2 +- doc/arch/sandbox.rst | 2 + .../chainload.rst} | 80 ++++++++++------ doc/chromium/{ => files}/chromebook_jerry.its | 0 .../{ => files}/devkeys/kernel.keyblock | Bin .../devkeys/kernel_data_key.vbprivk | Bin doc/chromium/{ => files}/nyan-big.its | 0 doc/chromium/index.rst | 14 +++ doc/chromium/overview.rst | 74 ++++++++++++++ .../run_vboot.rst} | 90 ++++++++---------- doc/index.rst | 8 ++ drivers/Makefile | 2 +- drivers/block/sandbox.c | 8 +- drivers/misc/cros_ec_sandbox.c | 4 + drivers/mtd/spi/sf-uclass.c | 9 ++ drivers/mtd/spi/sf_internal.h | 4 + drivers/mtd/spi/sf_probe.c | 8 ++ drivers/mtd/spi/spi-nor-core.c | 11 +++ drivers/mtd/spi/spi-nor-tiny.c | 6 ++ drivers/timer/sandbox_timer.c | 3 +- drivers/timer/timer-uclass.c | 6 +- include/command.h | 10 +- include/image.h | 5 + include/malloc.h | 3 +- include/sandboxblockdev.h | 9 +- include/spi_flash.h | 27 ++++++ lib/Kconfig | 2 +- lib/binman.c | 4 +- test/cmd/test_echo.c | 3 +- test/dm/sf.c | 10 +- test/lib/test_print.c | 8 +- 45 files changed, 394 insertions(+), 145 deletions(-) rename doc/{README.chromium-chainload => chromium/chainload.rst} (79%) rename doc/chromium/{ => files}/chromebook_jerry.its (100%) rename doc/chromium/{ => files}/devkeys/kernel.keyblock (100%) rename doc/chromium/{ => files}/devkeys/kernel_data_key.vbprivk (100%) rename doc/chromium/{ => files}/nyan-big.its (100%) create mode 100644 doc/chromium/index.rst create mode 100644 doc/chromium/overview.rst rename doc/{README.chromium => chromium/run_vboot.rst} (68%)

This function only exists if CPU is enabled. Update the code to take account of this, so that it does not have to be enabled on all sandbox builds.
Signed-off-by: Simon Glass sjg@chromium.org ---
drivers/timer/sandbox_timer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/timer/sandbox_timer.c b/drivers/timer/sandbox_timer.c index 2075cd4edda..c846bfb9f12 100644 --- a/drivers/timer/sandbox_timer.c +++ b/drivers/timer/sandbox_timer.c @@ -38,7 +38,8 @@ static int sandbox_timer_probe(struct udevice *dev) { struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- if (dev_read_bool(dev, "sandbox,timebase-frequency-fallback")) + if (CONFIG_IS_ENABLED(CPU) && + dev_read_bool(dev, "sandbox,timebase-frequency-fallback")) return timer_timebase_fallback(dev); else if (!uc_priv->clock_rate) uc_priv->clock_rate = SANDBOX_TIMER_RATE;

On 3/15/21 1:11 AM, Simon Glass wrote:
This function only exists if CPU is enabled. Update the code to take account of this, so that it does not have to be enabled on all sandbox builds.
Signed-off-by: Simon Glass sjg@chromium.org
drivers/timer/sandbox_timer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/timer/sandbox_timer.c b/drivers/timer/sandbox_timer.c index 2075cd4edda..c846bfb9f12 100644 --- a/drivers/timer/sandbox_timer.c +++ b/drivers/timer/sandbox_timer.c @@ -38,7 +38,8 @@ static int sandbox_timer_probe(struct udevice *dev) { struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- if (dev_read_bool(dev, "sandbox,timebase-frequency-fallback"))
- if (CONFIG_IS_ENABLED(CPU) &&
return timer_timebase_fallback(dev); else if (!uc_priv->clock_rate) uc_priv->clock_rate = SANDBOX_TIMER_RATE;dev_read_bool(dev, "sandbox,timebase-frequency-fallback"))
Reviewed-by: Sean Anderson seanga2@gmail.com

On 3/15/21 1:11 AM, Simon Glass wrote:
This function only exists if CPU is enabled. Update the code to take account of this, so that it does not have to be enabled on all sandbox builds.
Signed-off-by: Simon Glass sjg@chromium.org
drivers/timer/sandbox_timer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Applied to u-boot-dm/next, thanks!

At present sandbox removes its executable after failing to run it, since there is no other way that it would get cleaned up.
However, this is actually only wanted if the image was created within sandbox. For the case where the image was generated by the build system, such as u-boot-spl, we don't want to delete it.
Handle the two code paths accordingly.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/sandbox/cpu/os.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 2d9583c17ca..9510def4526 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -711,7 +711,7 @@ static int add_args(char ***argvp, char *add_args[], int count) * @fname: Filename to exec * @return does not return on success, any return value is an error */ -static int os_jump_to_file(const char *fname) +static int os_jump_to_file(const char *fname, bool delete_it) { struct sandbox_state *state = state_get_current(); char mem_fname[30]; @@ -734,11 +734,13 @@ static int os_jump_to_file(const char *fname)
os_fd_restore();
- extra_args[0] = "-j"; - extra_args[1] = (char *)fname; - extra_args[2] = "-m"; - extra_args[3] = mem_fname; - argc = 4; + argc = 0; + if (delete_it) { + extra_args[argc++] = "-j"; + extra_args[argc++] = (char *)fname; + } + extra_args[argc++] = "-m"; + extra_args[argc++] = mem_fname; if (state->ram_buf_rm) extra_args[argc++] = "--rm_memory"; err = add_args(&argv, extra_args, argc); @@ -762,7 +764,10 @@ static int os_jump_to_file(const char *fname) return err; }
- return unlink(fname); + if (delete_it) + return unlink(fname); + + return -EFAULT; }
int os_jump_to_image(const void *dest, int size) @@ -774,7 +779,7 @@ int os_jump_to_image(const void *dest, int size) if (err) return err;
- return os_jump_to_file(fname); + return os_jump_to_file(fname, true); }
int os_find_u_boot(char *fname, int maxlen, bool use_img) @@ -848,7 +853,8 @@ int os_spl_to_uboot(const char *fname) printf("%s\n", __func__); /* U-Boot will delete ram buffer after read: "--rm_memory"*/ state->ram_buf_rm = true; - return os_jump_to_file(fname); + + return os_jump_to_file(fname, false); }
long os_get_time_offset(void)

At present sandbox removes its executable after failing to run it, since there is no other way that it would get cleaned up.
However, this is actually only wanted if the image was created within sandbox. For the case where the image was generated by the build system, such as u-boot-spl, we don't want to delete it.
Handle the two code paths accordingly.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/sandbox/cpu/os.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-)
Applied to u-boot-dm/next, thanks!

This can crash if the EC has not yet been probed. Add a check to prevent this.
Signed-off-by: Simon Glass sjg@chromium.org ---
drivers/misc/cros_ec_sandbox.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c index cb8adc4495a..bc01df0904e 100644 --- a/drivers/misc/cros_ec_sandbox.c +++ b/drivers/misc/cros_ec_sandbox.c @@ -153,10 +153,14 @@ static int cros_ec_write_state(void *blob, int node) { struct ec_state *ec = g_state;
+ if (!g_state) + return 0; + /* We are guaranteed enough space to write basic properties */ fdt_setprop_u32(blob, node, "current-image", ec->current_image); fdt_setprop(blob, node, "vbnv-context", ec->vbnv_context, sizeof(ec->vbnv_context)); + return state_setprop(node, "flash-data", ec->flash_data, ec->ec_config.flash.length); }

On 3/15/21 6:11 AM, Simon Glass wrote:
This can crash if the EC has not yet been probed. Add a check to prevent
What does 'This' relate to? There seems a sentence to missing from the commit message.
Best regards
Heinrich
this.
Signed-off-by: Simon Glass sjg@chromium.org
drivers/misc/cros_ec_sandbox.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c index cb8adc4495a..bc01df0904e 100644 --- a/drivers/misc/cros_ec_sandbox.c +++ b/drivers/misc/cros_ec_sandbox.c @@ -153,10 +153,14 @@ static int cros_ec_write_state(void *blob, int node) { struct ec_state *ec = g_state;
- if (!g_state)
return 0;
- /* We are guaranteed enough space to write basic properties */ fdt_setprop_u32(blob, node, "current-image", ec->current_image); fdt_setprop(blob, node, "vbnv-context", ec->vbnv_context, sizeof(ec->vbnv_context));
- return state_setprop(node, "flash-data", ec->flash_data, ec->ec_config.flash.length); }

Hi Heinrich,
On Mon, 15 Mar 2021 at 23:58, Heinrich Schuchardt xypron.glpk@gmx.de wrote:
On 3/15/21 6:11 AM, Simon Glass wrote:
This can crash if the EC has not yet been probed. Add a check to prevent
What does 'This' relate to? There seems a sentence to missing from the commit message.
It refers to the commit subject, i.e. writing the EC state.
Regards, Simon

Hi Heinrich,
On Mon, 15 Mar 2021 at 23:58, Heinrich Schuchardt xypron.glpk@gmx.de wrote:
On 3/15/21 6:11 AM, Simon Glass wrote:
This can crash if the EC has not yet been probed. Add a check to prevent
What does 'This' relate to? There seems a sentence to missing from the commit message.
It refers to the commit subject, i.e. writing the EC state.
Regards, Simon
Applied to u-boot-dm/next, thanks!

This function has a strange mix of declarations and argument parsing which is a bit hard to follow and harder to modify. Separate out the declarations at the start of the function and adjust the ordering of the code slightly.
Signed-off-by: Simon Glass sjg@chromium.org ---
cmd/host.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/cmd/host.c b/cmd/host.c index 1d21f796ac3..927c23d0d9d 100644 --- a/cmd/host.c +++ b/cmd/host.c @@ -41,16 +41,21 @@ static int do_host_save(struct cmd_tbl *cmdtp, int flag, int argc, static int do_host_bind(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { + const char *dev_str; + char *file; + char *ep; + int dev; + if (argc < 2 || argc > 3) return CMD_RET_USAGE; - char *ep; - char *dev_str = argv[1]; - char *file = argc >= 3 ? argv[2] : NULL; - int dev = simple_strtoul(dev_str, &ep, 16); + dev_str = argv[1]; + dev = simple_strtoul(dev_str, &ep, 16); if (*ep) { printf("** Bad device specification %s **\n", dev_str); return CMD_RET_USAGE; } + file = argc >= 3 ? argv[2] : NULL; + return !!host_dev_bind(dev, file); }

This function has a strange mix of declarations and argument parsing which is a bit hard to follow and harder to modify. Separate out the declarations at the start of the function and adjust the ordering of the code slightly.
Signed-off-by: Simon Glass sjg@chromium.org ---
cmd/host.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-)
Applied to u-boot-dm/next, thanks!

Remove the 'bind' subcommand before processing the arguments. This will make it easier to add an optional flag.
Signed-off-by: Simon Glass sjg@chromium.org ---
cmd/host.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/cmd/host.c b/cmd/host.c index 927c23d0d9d..847bb1d3b5f 100644 --- a/cmd/host.c +++ b/cmd/host.c @@ -46,15 +46,18 @@ static int do_host_bind(struct cmd_tbl *cmdtp, int flag, int argc, char *ep; int dev;
- if (argc < 2 || argc > 3) + /* Skip 'bind' */ + argc--; + argv++; + if (argc < 1 || argv > 2) return CMD_RET_USAGE; - dev_str = argv[1]; + dev_str = argv[0]; dev = simple_strtoul(dev_str, &ep, 16); if (*ep) { printf("** Bad device specification %s **\n", dev_str); return CMD_RET_USAGE; } - file = argc >= 3 ? argv[2] : NULL; + file = argc > 1 ? argv[1] : NULL;
return !!host_dev_bind(dev, file); }

Remove the 'bind' subcommand before processing the arguments. This will make it easier to add an optional flag.
Signed-off-by: Simon Glass sjg@chromium.org ---
cmd/host.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)
Applied to u-boot-dm/next, thanks!

At present when a file is bound to a host device it is always marked as removeable. Arguably the device is removeable, since it can be unbound at will. However while it is bound, it is not considered removable by the user. Also it is useful to be able to model both fixed and removeable devices for code that distinguishes them.
Add a -r flag to the 'host bind' command and plumb it through to provide this feature.
Signed-off-by: Simon Glass sjg@chromium.org ---
cmd/host.c | 19 +++++++++++++++---- doc/arch/sandbox.rst | 2 ++ drivers/block/sandbox.c | 8 ++++---- include/sandboxblockdev.h | 9 ++++++++- 4 files changed, 29 insertions(+), 9 deletions(-)
diff --git a/cmd/host.c b/cmd/host.c index 847bb1d3b5f..6aa3d9167a4 100644 --- a/cmd/host.c +++ b/cmd/host.c @@ -41,6 +41,7 @@ static int do_host_save(struct cmd_tbl *cmdtp, int flag, int argc, static int do_host_bind(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { + bool removable = false; const char *dev_str; char *file; char *ep; @@ -49,7 +50,16 @@ static int do_host_bind(struct cmd_tbl *cmdtp, int flag, int argc, /* Skip 'bind' */ argc--; argv++; - if (argc < 1 || argv > 2) + if (argc < 2) + return CMD_RET_USAGE; + + if (!strcmp(argv[0], "-r")) { + removable = true; + argc--; + argv++; + } + + if (argc > 2) return CMD_RET_USAGE; dev_str = argv[0]; dev = simple_strtoul(dev_str, &ep, 16); @@ -59,7 +69,7 @@ static int do_host_bind(struct cmd_tbl *cmdtp, int flag, int argc, } file = argc > 1 ? argv[1] : NULL;
- return !!host_dev_bind(dev, file); + return !!host_dev_bind(dev, file, removable); }
static int do_host_info(struct cmd_tbl *cmdtp, int flag, int argc, @@ -154,7 +164,7 @@ static struct cmd_tbl cmd_host_sub[] = { U_BOOT_CMD_MKENT(ls, 3, 0, do_host_ls, "", ""), U_BOOT_CMD_MKENT(save, 6, 0, do_host_save, "", ""), U_BOOT_CMD_MKENT(size, 3, 0, do_host_size, "", ""), - U_BOOT_CMD_MKENT(bind, 3, 0, do_host_bind, "", ""), + U_BOOT_CMD_MKENT(bind, 4, 0, do_host_bind, "", ""), U_BOOT_CMD_MKENT(info, 3, 0, do_host_info, "", ""), U_BOOT_CMD_MKENT(dev, 0, 1, do_host_dev, "", ""), }; @@ -186,7 +196,8 @@ U_BOOT_CMD( "host save hostfs - <addr> <filename> <bytes> [<offset>] - " "save a file to host\n" "host size hostfs - <filename> - determine size of file on host\n" - "host bind <dev> [<filename>] - bind "host" device to file\n" + "host bind [-r] <dev> [<filename>] - bind "host" device to file\n" + " -r = mark as removable\n" "host info [<dev>] - show device binding & info\n" "host dev [<dev>] - Set or retrieve the current host device\n" "host commands use the "hostfs" device. The "host" device is used\n" diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst index 1638b050002..1912cb48f61 100644 --- a/doc/arch/sandbox.rst +++ b/doc/arch/sandbox.rst @@ -389,6 +389,8 @@ the contents of the root directory on the second partion of the image =>host bind 0 ./disk.raw =>ls host 0:2
+The device can be marked removeable with 'host bind -r'. + A disk image can be created using the following commands::
$> truncate -s 1200M ./disk.raw diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c index 9d7d68c007f..e419e607c04 100644 --- a/drivers/block/sandbox.c +++ b/drivers/block/sandbox.c @@ -89,7 +89,7 @@ static unsigned long host_block_write(struct blk_desc *block_dev, }
#ifdef CONFIG_BLK -int host_dev_bind(int devnum, char *filename) +int host_dev_bind(int devnum, char *filename, bool removable) { struct host_block_dev *host_dev; struct udevice *dev; @@ -146,7 +146,7 @@ int host_dev_bind(int devnum, char *filename) }
desc = blk_get_devnum_by_type(IF_TYPE_HOST, devnum); - desc->removable = 1; + desc->removable = removable; snprintf(desc->vendor, BLK_VEN_SIZE, "U-Boot"); snprintf(desc->product, BLK_PRD_SIZE, "hostfile"); snprintf(desc->revision, BLK_REV_SIZE, "1.0"); @@ -160,7 +160,7 @@ err: return ret; } #else -int host_dev_bind(int dev, char *filename) +int host_dev_bind(int dev, char *filename, bool removable) { struct host_block_dev *host_dev = find_host_device(dev);
@@ -195,7 +195,7 @@ int host_dev_bind(int dev, char *filename) blk_dev->block_write = host_block_write; blk_dev->devnum = dev; blk_dev->part_type = PART_TYPE_UNKNOWN; - blk_dev->removable = 1; + blk_dev->removable = removable; snprintf(blk_dev->vendor, BLK_VEN_SIZE, "U-Boot"); snprintf(blk_dev->product, BLK_PRD_SIZE, "hostfile"); snprintf(blk_dev->revision, BLK_REV_SIZE, "1.0"); diff --git a/include/sandboxblockdev.h b/include/sandboxblockdev.h index c1f0afb337d..4006e942a02 100644 --- a/include/sandboxblockdev.h +++ b/include/sandboxblockdev.h @@ -14,6 +14,13 @@ struct host_block_dev { int fd; };
-int host_dev_bind(int dev, char *filename); +/** + * host_dev_bind() - Bind or unbind a device + * + * @dev: Device number (0=first slot) + * @filename: Host filename to use, or NULL to unbind + * @removable: true if the block device should mark itself as removable + */ +int host_dev_bind(int dev, char *filename, bool removable);
#endif

At present when a file is bound to a host device it is always marked as removeable. Arguably the device is removeable, since it can be unbound at will. However while it is bound, it is not considered removable by the user. Also it is useful to be able to model both fixed and removeable devices for code that distinguishes them.
Add a -r flag to the 'host bind' command and plumb it through to provide this feature.
Signed-off-by: Simon Glass sjg@chromium.org ---
cmd/host.c | 19 +++++++++++++++---- doc/arch/sandbox.rst | 2 ++ drivers/block/sandbox.c | 8 ++++---- include/sandboxblockdev.h | 9 ++++++++- 4 files changed, 29 insertions(+), 9 deletions(-)
Applied to u-boot-dm/next, thanks!

Sandbox is special in that it is used for testing and it does not match any particular target architecture. Allow it to load an image from any architecture, so that 'bootm' can be used as needed.
Signed-off-by: Simon Glass sjg@chromium.org ---
common/image-fit.c | 4 ++++ include/image.h | 5 +++++ 2 files changed, 9 insertions(+)
diff --git a/common/image-fit.c b/common/image-fit.c index 28b3d2b1911..2d0ece61815 100644 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -1512,6 +1512,10 @@ int fit_image_check_arch(const void *fit, int noffset, uint8_t arch) uint8_t image_arch; int aarch32_support = 0;
+ /* Let's assume that sandbox can load any architecture */ + if (IS_ENABLED(CONFIG_SANDBOX)) + return true; + if (IS_ENABLED(CONFIG_ARM64_SUPPORT_AARCH32)) aarch32_support = 1;
diff --git a/include/image.h b/include/image.h index 138c83dd28d..bcd126d262d 100644 --- a/include/image.h +++ b/include/image.h @@ -886,6 +886,11 @@ static inline int image_check_type(const image_header_t *hdr, uint8_t type) } static inline int image_check_arch(const image_header_t *hdr, uint8_t arch) { +#ifndef USE_HOSTCC + /* Let's assume that sandbox can load any architecture */ + if (IS_ENABLED(CONFIG_SANDBOX)) + return true; +#endif return (image_get_arch(hdr) == arch) || (image_get_arch(hdr) == IH_ARCH_ARM && arch == IH_ARCH_ARM64); }

On Mon, 15 Mar 2021 at 18:12, Simon Glass sjg@chromium.org wrote:
Sandbox is special in that it is used for testing and it does not match any particular target architecture. Allow it to load an image from any architecture, so that 'bootm' can be used as needed.
Signed-off-by: Simon Glass sjg@chromium.org
common/image-fit.c | 4 ++++ include/image.h | 5 +++++ 2 files changed, 9 insertions(+)
Applied to u-boot-dm/next

These tests current produce unwanted output on sandbox. Use the correct functions to controller console output, to avoid this.
Signed-off-by: Simon Glass sjg@chromium.org ---
test/cmd/test_echo.c | 3 ++- test/lib/test_print.c | 8 ++++++-- 2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/test/cmd/test_echo.c b/test/cmd/test_echo.c index aa5cebc4e78..9d60d7d1a0b 100644 --- a/test/cmd/test_echo.c +++ b/test/cmd/test_echo.c @@ -44,9 +44,10 @@ static int lib_test_hush_echo(struct unit_test_state *uts) int i;
for (i = 0; i < ARRAY_SIZE(echo_data); ++i) { + ut_silence_console(uts); console_record_reset_enable(); ut_assertok(run_command(echo_data[i].cmd, 0)); - gd->flags &= ~GD_FLG_RECORD; + ut_unsilence_console(uts); console_record_readline(uts->actual_str, sizeof(uts->actual_str)); ut_asserteq_str(echo_data[i].expected, uts->actual_str); diff --git a/test/lib/test_print.c b/test/lib/test_print.c index 12972f1bcd6..a60a5a51f12 100644 --- a/test/lib/test_print.c +++ b/test/lib/test_print.c @@ -18,12 +18,14 @@ DECLARE_GLOBAL_DATA_PTR; static int test_print_freq(struct unit_test_state *uts, uint64_t freq, char *expected) { + ut_silence_console(uts); console_record_reset_enable(); print_freq(freq, ";\n"); - gd->flags &= ~GD_FLG_RECORD; + ut_unsilence_console(uts); console_record_readline(uts->actual_str, sizeof(uts->actual_str)); ut_asserteq_str(expected, uts->actual_str); ut_assertok(ut_check_console_end(uts)); + return 0; }
@@ -46,12 +48,14 @@ LIB_TEST(lib_test_print_freq, 0); static int test_print_size(struct unit_test_state *uts, uint64_t freq, char *expected) { + ut_silence_console(uts); console_record_reset_enable(); print_size(freq, ";\n"); - gd->flags &= ~GD_FLG_RECORD; + ut_unsilence_console(uts); console_record_readline(uts->actual_str, sizeof(uts->actual_str)); ut_asserteq_str(expected, uts->actual_str); ut_assertok(ut_check_console_end(uts)); + return 0; }

These tests current produce unwanted output on sandbox. Use the correct functions to controller console output, to avoid this.
Signed-off-by: Simon Glass sjg@chromium.org ---
test/cmd/test_echo.c | 3 ++- test/lib/test_print.c | 8 ++++++-- 2 files changed, 8 insertions(+), 3 deletions(-)
Applied to u-boot-dm/next, thanks!

This change seems important enough to warrant a visible message. Change the log_debug() to log_info().
Signed-off-by: Simon Glass sjg@chromium.org ---
lib/binman.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/binman.c b/lib/binman.c index 6040ec89241..530df6a4b4c 100644 --- a/lib/binman.c +++ b/lib/binman.c @@ -128,8 +128,8 @@ int binman_select_subnode(const char *name) if (!ofnode_valid(node)) return log_msg_ret("node", -ENOENT); binman->image = node; - log_debug("binman: Selected image subnode '%s'\n", - ofnode_get_name(binman->image)); + log_info("binman: Selected image subnode '%s'\n", + ofnode_get_name(binman->image));
return 0; }

This change seems important enough to warrant a visible message. Change the log_debug() to log_info().
Signed-off-by: Simon Glass sjg@chromium.org ---
lib/binman.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Applied to u-boot-dm/next, thanks!

We have two separate places that need to figure out the bootstage ID to use. Put this code in a function so that the logic is in one place.
Signed-off-by: Simon Glass sjg@chromium.org ---
common/spl/spl.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c index 5f51098a88f..556a91ab53c 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -387,6 +387,22 @@ static inline int write_spl_handoff(void) { return 0; }
#endif /* HANDOFF */
+/** + * get_bootstage_id() - Get the bootstage ID to emit + * + * @start: true if this is for starting SPL, false for ending it + * @return bootstage ID to use + */ +static enum bootstage_id get_bootstage_id(bool start) +{ + enum u_boot_phase phase = spl_phase(); + + if (IS_ENABLED(CONFIG_TPL_BUILD) && phase == PHASE_TPL) + return start ? BOOTSTAGE_ID_START_TPL : BOOTSTAGE_ID_END_TPL; + else + return start ? BOOTSTAGE_ID_START_SPL : BOOTSTAGE_ID_END_SPL; +} + static int spl_common_init(bool setup_malloc) { int ret; @@ -417,8 +433,8 @@ static int spl_common_init(bool setup_malloc) __func__, ret); } #endif /* CONFIG_BOOTSTAGE_STASH */ - bootstage_mark_name(spl_phase() == PHASE_TPL ? BOOTSTAGE_ID_START_TPL : - BOOTSTAGE_ID_START_SPL, SPL_TPL_NAME); + bootstage_mark_name(get_bootstage_id(true), + spl_phase_name(spl_phase())); #if CONFIG_IS_ENABLED(LOG) ret = log_init(); if (ret) { @@ -733,8 +749,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) debug("SPL malloc() used 0x%lx bytes (%ld KB)\n", gd->malloc_ptr, gd->malloc_ptr / 1024); #endif - bootstage_mark_name(spl_phase() == PHASE_TPL ? BOOTSTAGE_ID_END_TPL : - BOOTSTAGE_ID_END_SPL, "end " SPL_TPL_NAME); + bootstage_mark_name(get_bootstage_id(false), "end phase"); #ifdef CONFIG_BOOTSTAGE_STASH ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR, CONFIG_BOOTSTAGE_STASH_SIZE);

At present bootstage silently ignores new records if it runs out of space. It is sometimes obvious by looking at the report, but the IDs are not contiguous, so it is easy to miss.
Aad a message so that action can be taken.
Signed-off-by: Simon Glass sjg@chromium.org ---
common/bootstage.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/common/bootstage.c b/common/bootstage.c index d5b78b9f487..0dc619e5da7 100644 --- a/common/bootstage.c +++ b/common/bootstage.c @@ -9,6 +9,8 @@ * permits accurate timestamping of each. */
+#define LOG_CATEGORY LOGC_BOOT + #include <common.h> #include <bootstage.h> #include <hang.h> @@ -127,12 +129,16 @@ ulong bootstage_add_record(enum bootstage_id id, const char *name,
/* Only record the first event for each */ rec = find_id(data, id); - if (!rec && data->rec_count < RECORD_COUNT) { - rec = &data->record[data->rec_count++]; - rec->time_us = mark; - rec->name = name; - rec->flags = flags; - rec->id = id; + if (!rec) { + if (data->rec_count < RECORD_COUNT) { + rec = &data->record[data->rec_count++]; + rec->time_us = mark; + rec->name = name; + rec->flags = flags; + rec->id = id; + } else { + log_warning("Bootstage space exhasuted\n"); + } }
/* Tell the board about this progress */

At present bootstage silently ignores new records if it runs out of space. It is sometimes obvious by looking at the report, but the IDs are not contiguous, so it is easy to miss.
Aad a message so that action can be taken.
Signed-off-by: Simon Glass sjg@chromium.org ---
common/bootstage.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-)
Applied to u-boot-dm/next, thanks!

This feature was dropped from U-Boot some time ago:
f12f96cfaf5 (sf: Drop spl_flash_get_sw_write_prot")
However, we do need a way to see if a flash device is write-protected, since if it is, it may not be possible to write to do (i.e. failing to write is expected).
I am not sure of the correct layer to implement this, so this patch is a stab at it. If spi-flash makes sense then I will add to the 'sf' also.
Re the points mentioned in the removal commit:
1) This kind of requirement can be achieved using existing flash operations and flash locking API calls instead of making a separate flash API.
Which uclass is this?
2) Technically there is no real hardware user for this API to use in the source tree.
I do want coral (at least) to support this.
3) Having a flash operations API for simple register read bits also make difficult to extend the flash operations.
This new patch only mentions write-protect being on or off, rather than the actual mechanism.
4) Instead of touching generic code, it is possible to have this functionality inside spinor operations in the form of flash hooks or fixups for associated flash chips.
That sounds to me like what drivers are for. But we still need some sort of API for it to be accessible.
Signed-off-by: Simon Glass sjg@chromium.org ---
drivers/mtd/spi/sf-uclass.c | 9 +++++++++ drivers/mtd/spi/sf_internal.h | 4 ++++ drivers/mtd/spi/sf_probe.c | 8 ++++++++ drivers/mtd/spi/spi-nor-core.c | 11 +++++++++++ drivers/mtd/spi/spi-nor-tiny.c | 6 ++++++ include/spi_flash.h | 27 +++++++++++++++++++++++++++ test/dm/sf.c | 10 +++++++++- 7 files changed, 74 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c index 12d132152d3..980ac18ee96 100644 --- a/drivers/mtd/spi/sf-uclass.c +++ b/drivers/mtd/spi/sf-uclass.c @@ -31,6 +31,15 @@ int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len) return log_ret(sf_get_ops(dev)->erase(dev, offset, len)); }
+int spl_flash_get_sw_write_prot(struct udevice *dev) +{ + struct dm_spi_flash_ops *ops = sf_get_ops(dev); + + if (!ops->get_sw_write_prot) + return -ENOSYS; + return log_ret(ops->get_sw_write_prot(dev)); +} + /* * TODO(sjg@chromium.org): This is an old-style function. We should remove * it when all SPI flash drivers use dm diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 9ceff0e7c12..786301ba4a9 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -75,6 +75,10 @@ extern const struct flash_info spi_nor_ids[]; #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2]))
+/* Get software write-protect value (BP bits) */ +int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash); + + #if CONFIG_IS_ENABLED(SPI_FLASH_MTD) int spi_flash_mtd_register(struct spi_flash *flash); void spi_flash_mtd_unregister(void); diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 6c874348676..3befbe91cac 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -130,6 +130,13 @@ static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) return mtd->_erase(mtd, &instr); }
+static int spi_flash_std_get_sw_write_prot(struct udevice *dev) +{ + struct spi_flash *flash = dev_get_uclass_priv(dev); + + return spi_flash_cmd_get_sw_write_prot(flash); +} + int spi_flash_std_probe(struct udevice *dev) { struct spi_slave *slave = dev_get_parent_priv(dev); @@ -153,6 +160,7 @@ static const struct dm_spi_flash_ops spi_flash_std_ops = { .read = spi_flash_std_read, .write = spi_flash_std_write, .erase = spi_flash_std_erase, + .get_sw_write_prot = spi_flash_std_get_sw_write_prot, };
static const struct udevice_id spi_flash_std_ids[] = { diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index ef426dac02b..55cca609028 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -2644,3 +2644,14 @@ int spi_nor_scan(struct spi_nor *nor)
return 0; } + +/* U-Boot specific functions, need to extend MTD to support these */ +int spi_flash_cmd_get_sw_write_prot(struct spi_nor *nor) +{ + int sr = read_sr(nor); + + if (sr < 0) + return sr; + + return (sr >> 2) & 7; +} diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c index 07c8c7b82b1..1d5861d55cd 100644 --- a/drivers/mtd/spi/spi-nor-tiny.c +++ b/drivers/mtd/spi/spi-nor-tiny.c @@ -809,3 +809,9 @@ int spi_nor_scan(struct spi_nor *nor)
return 0; } + +/* U-Boot specific functions, need to extend MTD to support these */ +int spi_flash_cmd_get_sw_write_prot(struct spi_nor *nor) +{ + return -ENOTSUPP; +} diff --git a/include/spi_flash.h b/include/spi_flash.h index 85cae32cc73..d1c073ac1fc 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -35,6 +35,19 @@ struct dm_spi_flash_ops { int (*write)(struct udevice *dev, u32 offset, size_t len, const void *buf); int (*erase)(struct udevice *dev, u32 offset, size_t len); + /** + * get_sw_write_prot() - Check state of software write-protect feature + * + * SPI flash chips can lock a region of the flash defined by a + * 'protected area'. This function checks if this protected area is + * defined. + * + * @dev: SPI flash device + * @return 0 if no region is write-protected, 1 if a region is + * write-protected, -ENOSYS if the driver does not implement this, + * other -ve value on error + */ + int (*get_sw_write_prot)(struct udevice *dev); };
/* Access the serial operations for a device */ @@ -76,6 +89,20 @@ int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len, */ int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len);
+/** + * spl_flash_get_sw_write_prot() - Check state of software write-protect feature + * + * SPI flash chips can lock a region of the flash defined by a + * 'protected area'. This function checks if this protected area is + * defined. + * + * @dev: SPI flash device + * @return 0 if no region is write-protected, 1 if a region is + * write-protected, -ENOSYS if the driver does not implement this, + * other -ve value on error + */ +int spl_flash_get_sw_write_prot(struct udevice *dev); + /** * spi_flash_std_probe() - Probe a SPI flash device * diff --git a/test/dm/sf.c b/test/dm/sf.c index cc1fc4d69af..17d43fef3bc 100644 --- a/test/dm/sf.c +++ b/test/dm/sf.c @@ -21,7 +21,7 @@ /* Simple test of sandbox SPI flash */ static int dm_test_spi_flash(struct unit_test_state *uts) { - struct udevice *dev; + struct udevice *dev, *emul; int full_size = 0x200000; int size = 0x10000; u8 *src, *dst; @@ -51,6 +51,14 @@ static int dm_test_spi_flash(struct unit_test_state *uts) ut_assertok(spi_flash_read_dm(dev, 0, size, dst)); ut_asserteq_mem(src, dst, size);
+ /* Try the write-protect stuff */ + ut_assertok(uclass_first_device_err(UCLASS_SPI_EMUL, &emul)); + ut_asserteq(0, spl_flash_get_sw_write_prot(dev)); + sandbox_sf_set_block_protect(emul, 1); + ut_asserteq(1, spl_flash_get_sw_write_prot(dev)); + sandbox_sf_set_block_protect(emul, 0); + ut_asserteq(0, spl_flash_get_sw_write_prot(dev)); + /* Check mapping */ ut_assertok(dm_spi_get_mmap(dev, &map_base, &map_size, &offset)); ut_asserteq(0x1000, map_base);

This feature was dropped from U-Boot some time ago:
f12f96cfaf5 (sf: Drop spl_flash_get_sw_write_prot")
However, we do need a way to see if a flash device is write-protected, since if it is, it may not be possible to write to do (i.e. failing to write is expected).
I am not sure of the correct layer to implement this, so this patch is a stab at it. If spi-flash makes sense then I will add to the 'sf' also.
Re the points mentioned in the removal commit:
1) This kind of requirement can be achieved using existing flash operations and flash locking API calls instead of making a separate flash API.
Which uclass is this?
2) Technically there is no real hardware user for this API to use in the source tree.
I do want coral (at least) to support this.
3) Having a flash operations API for simple register read bits also make difficult to extend the flash operations.
This new patch only mentions write-protect being on or off, rather than the actual mechanism.
4) Instead of touching generic code, it is possible to have this functionality inside spinor operations in the form of flash hooks or fixups for associated flash chips.
That sounds to me like what drivers are for. But we still need some sort of API for it to be accessible.
Signed-off-by: Simon Glass sjg@chromium.org ---
drivers/mtd/spi/sf-uclass.c | 9 +++++++++ drivers/mtd/spi/sf_internal.h | 4 ++++ drivers/mtd/spi/sf_probe.c | 8 ++++++++ drivers/mtd/spi/spi-nor-core.c | 11 +++++++++++ drivers/mtd/spi/spi-nor-tiny.c | 6 ++++++ include/spi_flash.h | 27 +++++++++++++++++++++++++++ test/dm/sf.c | 10 +++++++++- 7 files changed, 74 insertions(+), 1 deletion(-)
Applied to u-boot-dm/next, thanks!

The _SUPPORT suffix is from an earlier time and interferes with use of the CONFIG_IS_ENABLED() macro. Rename the option to drop the suffix.
Tidy up the TODO that prompted this.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/riscv/cpu/ax25/Kconfig | 2 +- arch/riscv/cpu/fu540/Kconfig | 2 +- arch/riscv/cpu/generic/Kconfig | 2 +- arch/x86/lib/spl.c | 2 +- common/spl/Kconfig | 2 +- configs/chromebook_coral_defconfig | 2 +- configs/chromebook_link64_defconfig | 2 +- configs/qemu-x86_64_defconfig | 2 +- drivers/Makefile | 2 +- drivers/timer/timer-uclass.c | 6 +----- 10 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig index 327b74e20a0..941d963ece4 100644 --- a/arch/riscv/cpu/ax25/Kconfig +++ b/arch/riscv/cpu/ax25/Kconfig @@ -6,7 +6,7 @@ config RISCV_NDS imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) imply ANDES_PLIC if (RISCV_MMODE || SPL_RISCV_MMODE) imply ANDES_PLMT_TIMER if (RISCV_MMODE || SPL_RISCV_MMODE) - imply SPL_CPU_SUPPORT + imply SPL_CPU imply SPL_OPENSBI imply SPL_LOAD_FIT help diff --git a/arch/riscv/cpu/fu540/Kconfig b/arch/riscv/cpu/fu540/Kconfig index 61bd5c426ed..616b25650f0 100644 --- a/arch/riscv/cpu/fu540/Kconfig +++ b/arch/riscv/cpu/fu540/Kconfig @@ -13,7 +13,7 @@ config SIFIVE_FU540 imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE) imply CMD_CPU - imply SPL_CPU_SUPPORT + imply SPL_CPU imply SPL_OPENSBI imply SPL_LOAD_FIT imply SMP diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig index f4c2e2643c9..198e36e969b 100644 --- a/arch/riscv/cpu/generic/Kconfig +++ b/arch/riscv/cpu/generic/Kconfig @@ -10,6 +10,6 @@ config GENERIC_RISCV imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE) imply CMD_CPU - imply SPL_CPU_SUPPORT + imply SPL_CPU imply SPL_OPENSBI imply SPL_LOAD_FIT diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 1bae1f4f321..b18c1cd6092 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -96,7 +96,7 @@ static int x86_spl_init(void) } #endif preloader_console_init(); -#ifndef CONFIG_TPL +#if !defined(CONFIG_TPL) && !CONFIG_IS_ENABLED(CPU) ret = print_cpuinfo(); if (ret) { debug("%s: print_cpuinfo() failed\n", __func__); diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 774541c02bc..2bd02210bab 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -487,7 +487,7 @@ config SPL_CACHE_SUPPORT future requests for that data can be served faster. Enable this option to build the drivers in drivers/cache as part of an SPL build.
-config SPL_CPU_SUPPORT +config SPL_CPU bool "Support CPU drivers" help Enable this to support CPU drivers in SPL. These drivers can set diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index ab73a0a88ce..a8be3498cfb 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -42,7 +42,7 @@ CONFIG_BLOBLIST_ADDR=0x100000 CONFIG_HANDOFF=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y -CONFIG_SPL_CPU_SUPPORT=y +CONFIG_SPL_CPU=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_PCI=y # CONFIG_SPL_SPI_FLASH_TINY is not set diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 8f56ee3476d..872e33d7571 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -31,7 +31,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_CPU_SUPPORT=y +CONFIG_SPL_CPU=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 99a489cab42..4815d8af4e6 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -31,7 +31,7 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_PCI_INIT_R=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -CONFIG_SPL_CPU_SUPPORT=y +CONFIG_SPL_CPU=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_NET_SUPPORT=y diff --git a/drivers/Makefile b/drivers/Makefile index c562a719f74..3510daba29f 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -38,7 +38,7 @@ ifdef CONFIG_SPL_BUILD
obj-$(CONFIG_SPL_BOOTCOUNT_LIMIT) += bootcount/ obj-$(CONFIG_SPL_CACHE_SUPPORT) += cache/ -obj-$(CONFIG_SPL_CPU_SUPPORT) += cpu/ +obj-$(CONFIG_SPL_CPU) += cpu/ obj-$(CONFIG_SPL_CRYPTO_SUPPORT) += crypto/ obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT) += ddr/fsl/ obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/ diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c index 6f00a5d0dba..73b4a5cd27f 100644 --- a/drivers/timer/timer-uclass.c +++ b/drivers/timer/timer-uclass.c @@ -83,11 +83,7 @@ static int timer_post_probe(struct udevice *dev) return 0; }
-/* - * TODO: should be CONFIG_IS_ENABLED(CPU), but the SPL config has _SUPPORT on - * the end... - */ -#if defined(CONFIG_CPU) || defined(CONFIG_SPL_CPU_SUPPORT) +#if CONFIG_IS_ENABLED(CPU) int timer_timebase_fallback(struct udevice *dev) { struct udevice *cpu;

Export this function always so it can be used behind IS_ENABLED() instead of requiring an #ifdef.
Signed-off-by: Simon Glass sjg@chromium.org ---
include/malloc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/malloc.h b/include/malloc.h index e15e528a2e3..024b18be00e 100644 --- a/include/malloc.h +++ b/include/malloc.h @@ -880,6 +880,8 @@ extern Void_t* sbrk();
#else
+void malloc_simple_info(void); + #if CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) #define malloc malloc_simple #define realloc realloc_simple @@ -887,7 +889,6 @@ extern Void_t* sbrk(); static inline void free(void *ptr) {} void *calloc(size_t nmemb, size_t size); void *realloc_simple(void *ptr, size_t size); -void malloc_simple_info(void); #else
# ifdef USE_DL_PREFIX

Export this function always so it can be used behind IS_ENABLED() instead of requiring an #ifdef.
Signed-off-by: Simon Glass sjg@chromium.org ---
include/malloc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Applied to u-boot-dm/next, thanks!

Move this documentation over to reST. Move the example files into a files/ directory so they are still separate.
Do a few minor updates while we are here: - Tidy up sandbox build instructions - Update my github account name - Add some talks and links
Signed-off-by: Simon Glass sjg@chromium.org ---
.../chainload.rst} | 80 ++++++++++------ doc/chromium/{ => files}/chromebook_jerry.its | 0 .../{ => files}/devkeys/kernel.keyblock | Bin .../devkeys/kernel_data_key.vbprivk | Bin doc/chromium/{ => files}/nyan-big.its | 0 doc/chromium/index.rst | 14 +++ doc/chromium/overview.rst | 74 ++++++++++++++ .../run_vboot.rst} | 90 ++++++++---------- doc/index.rst | 8 ++ 9 files changed, 183 insertions(+), 83 deletions(-) rename doc/{README.chromium-chainload => chromium/chainload.rst} (79%) rename doc/chromium/{ => files}/chromebook_jerry.its (100%) rename doc/chromium/{ => files}/devkeys/kernel.keyblock (100%) rename doc/chromium/{ => files}/devkeys/kernel_data_key.vbprivk (100%) rename doc/chromium/{ => files}/nyan-big.its (100%) create mode 100644 doc/chromium/index.rst create mode 100644 doc/chromium/overview.rst rename doc/{README.chromium => chromium/run_vboot.rst} (68%)
diff --git a/doc/README.chromium-chainload b/doc/chromium/chainload.rst similarity index 79% rename from doc/README.chromium-chainload rename to doc/chromium/chainload.rst index 45eaeced2da..7b6bb10d36d 100644 --- a/doc/README.chromium-chainload +++ b/doc/chromium/chainload.rst @@ -1,3 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright 2020 Google LLC + Running U-Boot from coreboot on Chromebooks ===========================================
@@ -15,7 +18,7 @@ replace the ROM unless you have a servo board and cable to restore it with.
For all of these the standard U-Boot build instructions apply. For example on -ARM: +ARM::
sudo apt install gcc-arm-linux-gnueabi mkdir b @@ -37,14 +40,17 @@ https://www.chromium.org/chromium-os/firmware-porting-guide/using-nv-u-boot-... Nyan-big --------
-Compiled based on information here: -https://lists.denx.de/pipermail/u-boot/2015-March/209530.html -https://git.collabora.com/cgit/user/tomeu/u-boot.git/commit/?h=nyan-big -https://lists.denx.de/pipermail/u-boot/2017-May/289491.html -https://github.com/chromeos-nvidia-androidtv/gnu-linux-on-acer-chromebook-13... +Compiled based on information here:: + + https://lists.denx.de/pipermail/u-boot/2015-March/209530.html + https://git.collabora.com/cgit/user/tomeu/u-boot.git/commit/?h=nyan-big + https://lists.denx.de/pipermail/u-boot/2017-May/289491.html + https://github.com/chromeos-nvidia-androidtv/gnu-linux-on-acer-chromebook-13...
1. Build U-Boot
+Steps:: + mkdir b make -j8 O=b/nyan-big CROSS_COMPILE=arm-linux-gnueabi- nyan-big_defconfig all
@@ -61,16 +67,21 @@ kernel, and crashes if it is not present.
3. Build and sign an image
- ./b/nyan-big/tools/mkimage -f doc/chromium/nyan-big.its u-boot-chromium.fit +Steps:: + + ./b/nyan-big/tools/mkimage -f doc/chromium/files/nyan-big.its u-boot-chromium.fit echo test >dummy.txt - vbutil_kernel --arch arm --keyblock doc/chromium/devkeys/kernel.keyblock \ - --signprivate doc/chromium/devkeys/kernel_data_key.vbprivk \ - --version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \ - --bootloader dummy.txt --pack u-boot.kpart + vbutil_kernel --arch arm \ + --keyblock doc/chromium/files/devkeys/kernel.keyblock \ + --signprivate doc/chromium/files/devkeys/kernel_data_key.vbprivk \ + --version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \ + --bootloader dummy.txt --pack u-boot.kpart
4. Prepare an SD card
+Steps:: + DISK=/dev/sdc # Replace with your actual SD card device sudo cgpt create $DISK sudo cgpt add -b 34 -s 32768 -P 1 -S 1 -t kernel $DISK @@ -80,6 +91,8 @@ kernel, and crashes if it is not present.
5. Write U-Boot to the SD card
+Steps:: + sudo dd if=u-boot.kpart of=/dev/sdc1; sync
@@ -90,7 +103,7 @@ do this, login as root (via Ctrl-Alt-forward_arrow) and type 'enable_dev_usb_boot'. You only need to do this once.
Reboot the device with the SD card inserted. Press Clrl-U at the developer -mode screen. It should show something like the following on the display: +mode screen. It should show something like the following on the display::
U-Boot 2017.07-00637-g242eb42-dirty (May 22 2017 - 06:14:21 -0600)
@@ -104,9 +117,9 @@ mode screen. It should show something like the following on the display:
7. Known problems
-On the serial console the word MMC is chopped at the start of the line: +On the serial console the word MMC is chopped at the start of the line::
-C: sdhci@700b0000: 2, sdhci@700b0400: 1, sdhci@700b0600: 0 + C: sdhci@700b0000: 2, sdhci@700b0400: 1, sdhci@700b0600: 0
This is likely due to some problem with change-over of the serial driver during relocation (or perhaps updating the clock setup in board_init()). @@ -116,7 +129,7 @@ during relocation (or perhaps updating the clock setup in board_init()).
To check that you copied the u-boot.its file correctly, use these commands. You should see that the data at 0x100 in u-boot-chromium.fit is the first few -bytes of U-Boot: +bytes of U-Boot::
hd u-boot-chromium.fit |head -20 ... @@ -141,34 +154,39 @@ The instruction are similar to those for Nyan with changes as noted below:
Open include/configs/rk3288_common.h
-Change: +Change::
-#define CONFIG_SYS_TEXT_BASE 0x00100000 + #define CONFIG_SYS_TEXT_BASE 0x00100000
-to: +to::
-#define CONFIG_SYS_TEXT_BASE 0x02000100 + #define CONFIG_SYS_TEXT_BASE 0x02000100
2. Build U-Boot
+Steps:: + mkdir b make -j8 O=b/chromebook_jerry CROSS_COMPILE=arm-linux-gnueabi- \ - chromebook_jerry_defconfig all + chromebook_jerry_defconfig all
3. See above
4. Build and sign an image
+Steps:: + ./b/chromebook_jerry/tools/mkimage -f doc/chromium/chromebook_jerry.its \ - u-boot-chromium.fit + u-boot-chromium.fit echo test >dummy.txt - vbutil_kernel --arch arm --keyblock doc/chromium/devkeys/kernel.keyblock \ - --signprivate doc/chromium/devkeys/kernel_data_key.vbprivk \ - --version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \ - --bootloader dummy.txt --pack u-boot.kpart + vbutil_kernel --arch arm \ + --keyblock doc/chromium/files/devkeys/kernel.keyblock \ + --signprivate doc/chromium/files/devkeys/kernel_data_key.vbprivk \ + --version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \ + --bootloader dummy.txt --pack u-boot.kpart
5. See above @@ -182,7 +200,7 @@ do this, login as root (via Ctrl-Alt-forward_arrow) and type 'enable_dev_usb_boot'. You only need to do this once.
Reboot the device with the SD card inserted. Press Clrl-U at the developer -mode screen. It should show something like the following on the display: +mode screen. It should show something like the following on the display::
U-Boot 2017.05-00649-g72acdbf-dirty (May 29 2017 - 14:57:05 -0600)
@@ -203,18 +221,18 @@ None as yet.
Other notes -=========== +-----------
flashrom --------- +~~~~~~~~
- Used to make a backup of your firmware, or to replace it. +Used to make a backup of your firmware, or to replace it.
- See: https://www.chromium.org/chromium-os/packages/cros-flashrom +See: https://www.chromium.org/chromium-os/packages/cros-flashrom
coreboot --------- +~~~~~~~~
Coreboot itself is not designed to actually boot an OS. Instead, a program called Depthcharge is used. This originally came out of U-Boot and was then diff --git a/doc/chromium/chromebook_jerry.its b/doc/chromium/files/chromebook_jerry.its similarity index 100% rename from doc/chromium/chromebook_jerry.its rename to doc/chromium/files/chromebook_jerry.its diff --git a/doc/chromium/devkeys/kernel.keyblock b/doc/chromium/files/devkeys/kernel.keyblock similarity index 100% rename from doc/chromium/devkeys/kernel.keyblock rename to doc/chromium/files/devkeys/kernel.keyblock diff --git a/doc/chromium/devkeys/kernel_data_key.vbprivk b/doc/chromium/files/devkeys/kernel_data_key.vbprivk similarity index 100% rename from doc/chromium/devkeys/kernel_data_key.vbprivk rename to doc/chromium/files/devkeys/kernel_data_key.vbprivk diff --git a/doc/chromium/nyan-big.its b/doc/chromium/files/nyan-big.its similarity index 100% rename from doc/chromium/nyan-big.its rename to doc/chromium/files/nyan-big.its diff --git a/doc/chromium/index.rst b/doc/chromium/index.rst new file mode 100644 index 00000000000..0722c250033 --- /dev/null +++ b/doc/chromium/index.rst @@ -0,0 +1,14 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright 2020 Google LLC + +Chromium OS-specific doc +======================== + +This provides some information about Chromium OS and U-Boot. + +.. toctree:: + :maxdepth: 2 + + overview + run_vboot + chainload diff --git a/doc/chromium/overview.rst b/doc/chromium/overview.rst new file mode 100644 index 00000000000..5498ed9c16c --- /dev/null +++ b/doc/chromium/overview.rst @@ -0,0 +1,74 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright 2020 Google LLC + +Chromium OS Support in U-Boot +============================= + +Introduction +------------ + +This describes how to use U-Boot with Chromium OS. Several options are +available: + + - Running U-Boot from the 'altfw' feature, which is available on selected + Chromebooks from 2019 onwards (initially Grunt). Press '1' from the + developer-mode screen to get into U-Boot. See here for details: + https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_mode.md + + - Running U-Boot from the disk partition. This involves signing U-Boot and + placing it on the disk, for booting as a 'kernel'. See + :doc:`chainload` for information on this. This is the only + option on non-U-Boot Chromebooks from 2013 to 2018 and is somewhat + more involved. + + - Running U-Boot with Chromium OS verified boot. This allows U-Boot to be + used instead of either or both of depthcharge (a bootloader which forked + from U-Boot in 2013) and coreboot. See :doc:`run_vboot` for more + information on this. + + - Running U-Boot from coreboot. This allows U-Boot to run on more devices + since many of them only support coreboot as the bootloader and have + no bare-metal support in U-Boot. For this, use the 'coreboot' target. + + - Running U-Boot and booting into a Chrome OS image, but without verified + boot. This can be useful for testing. + + +Talks and documents +------------------- + +Here is some material relevant to Chromium OS verified boot with U-Boot: + + - "U-Boot with Chrome OS and firmware packaging" + + - Author: Simon Glass + - Presented at Open Source Firmware Conference 2018, Erlangen + - Describes the work in progress as at the end of 2018 + - Slides at `OSFC https://2018.osfc.io/uploads/talk/paper/26/U-Boot_with_Chrome_OS_and_firmware_packaging.pdf`_ + - Video on `Youtube https://www.youtube.com/watch?v=1jknxUvmwpo`_ + + - "Verified Boot in Chrome OS and how to make it work for you" + + - Author: Simon Glass + - Presented at ELCE 2013, Edinburgh + - Describes the original 2013 implementation as shipped on snow (first + `ARM Chromebook was a Samsung Chromebook https://www.cnet.com/products/samsung-series-3-chromebook-xe303c12-11-6-exynos-5250-2-gb-ram-16-gb-ssd-bilingual-english-french/`_ + with Samsung Exynos5250 `review https://www.cnet.com/reviews/samsung-chromebook-series-3-review/`_), + spring (`HP Chromebook 11 https://www.cnet.com/products/hp-chromebook-11-g2-11-6-exynos-5250-4-gb-ram-16-gb-emmc/`_) + and pit/pi (`Samsung Chromebook 2 https://www.cnet.com/products/samsung-chromebook-2-xe503c12-11-6-exynos-5-octa-4-gb-ram-16-gb-ssd/`_ + with Exynos 5 Octa 5420 in 2014). + - Slides at `Google research https://research.google/pubs/pub42038/`_ + - Video at `Youtube https://www.youtube.com/watch?v=kdpZC9jFzZA`_ + + - "Chrome University 2018: Chrome OS Firmware and Verified Boot 201" + + - Author: Duncan Laurie + - Describes Chrome OS firmware as of 2018 and includes a wide range of + topics. This has no U-Boot information, but does cover coreboot and also + talks about the Chrome OS EC and Security chip. This is probably the + best introduction talk. + - Video at `YouTube https://www.youtube.com/watch?v=WY2sWpuda2g`_ + + - `Chromium OS U-Boot https://www.chromium.org/developers/u-boot`_ + + - `Firmware porting Guide https://www.chromium.org/chromium-os/firmware-porting-guide`_ diff --git a/doc/README.chromium b/doc/chromium/run_vboot.rst similarity index 68% rename from doc/README.chromium rename to doc/chromium/run_vboot.rst index 75f2f24042c..41b4f631835 100644 --- a/doc/README.chromium +++ b/doc/chromium/run_vboot.rst @@ -1,42 +1,14 @@ -Chromium OS Support in U-Boot -============================= - -Introduction ------------- - -This describes how to use U-Boot with Chromium OS. Several options are -available: - - - Running U-Boot from the 'altfw' feature, which is available on selected - Chromebooks from 2019 onwards (initially Grunt). Press '1' from the - developer-mode screen to get into U-Boot. See here for details: - https://sites.google.com/a/chromium.org/dev/chromium-os/poking-around-your-c... - - - Running U-Boot from the disk partition. This involves signing U-Boot and - placing it on the disk, for booting as a 'kernel'. See - README.chromium-chainload for information on this. This is the only - option on non-U-Boot Chromebooks from 2013 to 2018 and is somewhat - more involved. - - - Running U-Boot with Chromium OS verified boot. This allows U-Boot to be - used instead of either or both of depthcharge (a bootloader which forked - from U-Boot in 2013) and coreboot. See below for more information on - this. - - - Running U-Boot from coreboot. This allows U-Boot to run on more devices - since many of them only support coreboot as the bootloader and have - no bare-metal support in U-Boot. For this, use the 'coreboot' target. - - - Running U-Boot and booting into a Chrome OS image, but without verified - boot. This can be useful for testing. +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright 2020 Google LLC +.. sectionauthor:: Simon Glass sjg@chromium.org
-U-Boot with Chromium OS verified boot -------------------------------------- +Running U-Boot with Chromium OS verified boot +=============================================
-To obtain: +To obtain::
- git clone https://github.com/sglass68/u-boot.git + git clone https://github.com/sjg20/u-boot.git cd u-boot git checkout cros-master
@@ -46,28 +18,35 @@ To obtain: git checkout 45964294 # futility: updater: Correct output version for Snow
-To build for sandbox: +To build for sandbox::
UB=/tmp/b/chromeos_sandbox # U-Boot build directory cd u-boot make O=$UB chromeos_sandbox_defconfig make O=$UB -j20 -s VBOOT_SOURCE=/path/to/vboot_reference \ - MAKEFLAGS_VBOOT=DEBUG=1 QUIET=1 + MAKEFLAGS_VBOOT=DEBUG=1 QUIET=1
Replace sandbox with another supported target.
This produces $UB/image.bin which contains the firmware binaries in a SPI flash image.
-To run on sandbox: +To run on sandbox::
+ CROS=~/cosarm + IMG=$CROS/src/build/images/coral/latest/chromiumos_image.bin $UB/tpl/u-boot-tpl -d $UB/u-boot.dtb.out \ - -L6 -c "host bind 0 $CROS/src/build/images/cheza/latest/chromiumos_image.bin; vboot go auto" \ - -l -w -s state.dtb -r + -L6 -c "host bind 0 $IMG; vboot go auto" \ + -l -w -s state.dtb -r -n -m $UB/ram + + $UB/tpl/u-boot-tpl -d $UB/u-boot.dtb.out -L6 -l \ + -c "host bind 0 $IMG; vboot go auto" -w -s $UB/state.dtb -r -n -m $UB/mem +
To run on other boards: - Install image.bin in the SPI flash of your device - Boot your system + + - Install image.bin in the SPI flash of your device + - Boot your system
Sandbox @@ -83,7 +62,7 @@ a device tree and binding a Chromium OS disk image for use to find kernels phases into state.dtb and will automatically ensure that memory is shared between all phases. TPL will jump to SPL and then on to U-Boot proper.
-It is possible to run with debugging on, e.g. +It is possible to run with debugging on, e.g.::
gdb --args $UB/tpl/u-boot-tpl -d ....
@@ -95,7 +74,7 @@ Samus -----
Basic support is available for samus, using the chromeos_samus target. If you -have an em100, use: +have an em100, use::
sudo em100 -s -c W25Q128FW -d $UB/image.bin -t -r
@@ -119,11 +98,20 @@ New uclasses
Several uclasses are provided in cros/:
- UCLASS_CROS_AUX_FW Chrome OS auxiliary firmware - UCLASS_CROS_FWSTORE Chrome OS firmware storage - UCLASS_CROS_NVDATA Chrome OS non-volatile data device - UCLASS_CROS_VBOOT_EC Chrome OS vboot EC operations - UCLASS_CROS_VBOOT_FLAG Chrome OS verified boot flag +UCLASS_CROS_AUX_FW + Chrome OS auxiliary firmware + +UCLASS_CROS_FWSTORE + Chrome OS firmware storage + +UCLASS_CROS_NVDATA + Chrome OS non-volatile data device + +UCLASS_CROS_VBOOT_EC + Chrome OS vboot EC operations + +UCLASS_CROS_VBOOT_FLAG + Chrome OS verified boot flag
The existing UCLASS_CROS_EC is also used.
@@ -181,7 +169,7 @@ detect problems that affect the flow or particular vboot features. U-Boot without Chromium OS verified boot ----------------------------------------
-The following script can be used to boot a Chrome OS image on coral: +The following script can be used to boot a Chrome OS image on coral::
# Read the image header and obtain the address of the kernel # The offset 4f0 is defined by verified boot and may change for other @@ -213,6 +201,4 @@ TO DO Get the full ACPI tables working with Coral
-Simon Glass -sjg@chromium.org 7 October 2018 diff --git a/doc/index.rst b/doc/index.rst index 4c44955d67f..ce91a2a41ef 100644 --- a/doc/index.rst +++ b/doc/index.rst @@ -110,6 +110,14 @@ Android-specific features available in U-Boot.
android/index
+Chromium OS-specific doc +------------------------ + +.. toctree:: + :maxdepth: 2 + + chromium/index + Indices and tables ==================

On 3/15/21 6:11 AM, Simon Glass wrote:
Move this documentation over to reST. Move the example files into a files/ directory so they are still separate.
Do a few minor updates while we are here:
- Tidy up sandbox build instructions
- Update my github account name
- Add some talks and links
Signed-off-by: Simon Glass sjg@chromium.org
.../chainload.rst} | 80 ++++++++++------ doc/chromium/{ => files}/chromebook_jerry.its | 0 .../{ => files}/devkeys/kernel.keyblock | Bin .../devkeys/kernel_data_key.vbprivk | Bin doc/chromium/{ => files}/nyan-big.its | 0 doc/chromium/index.rst | 14 +++ doc/chromium/overview.rst | 74 ++++++++++++++ .../run_vboot.rst} | 90 ++++++++---------- doc/index.rst | 8 ++ 9 files changed, 183 insertions(+), 83 deletions(-) rename doc/{README.chromium-chainload => chromium/chainload.rst} (79%) rename doc/chromium/{ => files}/chromebook_jerry.its (100%) rename doc/chromium/{ => files}/devkeys/kernel.keyblock (100%) rename doc/chromium/{ => files}/devkeys/kernel_data_key.vbprivk (100%) rename doc/chromium/{ => files}/nyan-big.its (100%) create mode 100644 doc/chromium/index.rst create mode 100644 doc/chromium/overview.rst rename doc/{README.chromium => chromium/run_vboot.rst} (68%)
diff --git a/doc/README.chromium-chainload b/doc/chromium/chainload.rst similarity index 79% rename from doc/README.chromium-chainload rename to doc/chromium/chainload.rst index 45eaeced2da..7b6bb10d36d 100644 --- a/doc/README.chromium-chainload +++ b/doc/chromium/chainload.rst @@ -1,3 +1,6 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright 2020 Google LLC
Running U-Boot from coreboot on Chromebooks
@@ -15,7 +18,7 @@ replace the ROM unless you have a servo board and cable to restore it with.
For all of these the standard U-Boot build instructions apply. For example on -ARM: +ARM::
sudo apt install gcc-arm-linux-gnueabi mkdir b
@@ -37,14 +40,17 @@ https://www.chromium.org/chromium-os/firmware-porting-guide/using-nv-u-boot-... Nyan-big
-Compiled based on information here: -https://lists.denx.de/pipermail/u-boot/2015-March/209530.html -https://git.collabora.com/cgit/user/tomeu/u-boot.git/commit/?h=nyan-big -https://lists.denx.de/pipermail/u-boot/2017-May/289491.html -https://github.com/chromeos-nvidia-androidtv/gnu-linux-on-acer-chromebook-13... +Compiled based on information here::
https://lists.denx.de/pipermail/u-boot/2015-March/209530.html
https://git.collabora.com/cgit/user/tomeu/u-boot.git/commit/?h=nyan-big
https://github.com/chromeos-nvidia-androidtv/gnu-linux-on-acer-chromebook-13...
- Build U-Boot
+Steps::
- mkdir b make -j8 O=b/nyan-big CROSS_COMPILE=arm-linux-gnueabi- nyan-big_defconfig all
@@ -61,16 +67,21 @@ kernel, and crashes if it is not present.
- Build and sign an image
- ./b/nyan-big/tools/mkimage -f doc/chromium/nyan-big.its u-boot-chromium.fit
+Steps::
- ./b/nyan-big/tools/mkimage -f doc/chromium/files/nyan-big.its u-boot-chromium.fit echo test >dummy.txt
- vbutil_kernel --arch arm --keyblock doc/chromium/devkeys/kernel.keyblock \
- --signprivate doc/chromium/devkeys/kernel_data_key.vbprivk \
- --version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \
- --bootloader dummy.txt --pack u-boot.kpart
vbutil_kernel --arch arm \
--keyblock doc/chromium/files/devkeys/kernel.keyblock \
--signprivate doc/chromium/files/devkeys/kernel_data_key.vbprivk \
--version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \
--bootloader dummy.txt --pack u-boot.kpart
- Prepare an SD card
+Steps::
- DISK=/dev/sdc # Replace with your actual SD card device sudo cgpt create $DISK sudo cgpt add -b 34 -s 32768 -P 1 -S 1 -t kernel $DISK
@@ -80,6 +91,8 @@ kernel, and crashes if it is not present.
- Write U-Boot to the SD card
+Steps::
- sudo dd if=u-boot.kpart of=/dev/sdc1; sync
@@ -90,7 +103,7 @@ do this, login as root (via Ctrl-Alt-forward_arrow) and type 'enable_dev_usb_boot'. You only need to do this once.
Reboot the device with the SD card inserted. Press Clrl-U at the developer -mode screen. It should show something like the following on the display: +mode screen. It should show something like the following on the display::
U-Boot 2017.07-00637-g242eb42-dirty (May 22 2017 - 06:14:21 -0600)
@@ -104,9 +117,9 @@ mode screen. It should show something like the following on the display:
- Known problems
-On the serial console the word MMC is chopped at the start of the line: +On the serial console the word MMC is chopped at the start of the line::
-C: sdhci@700b0000: 2, sdhci@700b0400: 1, sdhci@700b0600: 0
C: sdhci@700b0000: 2, sdhci@700b0400: 1, sdhci@700b0600: 0
This is likely due to some problem with change-over of the serial driver during relocation (or perhaps updating the clock setup in board_init()).
@@ -116,7 +129,7 @@ during relocation (or perhaps updating the clock setup in board_init()).
To check that you copied the u-boot.its file correctly, use these commands. You should see that the data at 0x100 in u-boot-chromium.fit is the first few -bytes of U-Boot: +bytes of U-Boot::
hd u-boot-chromium.fit |head -20 ...
@@ -141,34 +154,39 @@ The instruction are similar to those for Nyan with changes as noted below:
Open include/configs/rk3288_common.h
-Change: +Change::
-#define CONFIG_SYS_TEXT_BASE 0x00100000
- #define CONFIG_SYS_TEXT_BASE 0x00100000
-to: +to::
-#define CONFIG_SYS_TEXT_BASE 0x02000100
#define CONFIG_SYS_TEXT_BASE 0x02000100
- Build U-Boot
+Steps::
- mkdir b make -j8 O=b/chromebook_jerry CROSS_COMPILE=arm-linux-gnueabi- \
- chromebook_jerry_defconfig all
chromebook_jerry_defconfig all
See above
Build and sign an image
+Steps::
- ./b/chromebook_jerry/tools/mkimage -f doc/chromium/chromebook_jerry.its \
- u-boot-chromium.fit
echo test >dummy.txtu-boot-chromium.fit
- vbutil_kernel --arch arm --keyblock doc/chromium/devkeys/kernel.keyblock \
- --signprivate doc/chromium/devkeys/kernel_data_key.vbprivk \
- --version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \
- --bootloader dummy.txt --pack u-boot.kpart
vbutil_kernel --arch arm \
--keyblock doc/chromium/files/devkeys/kernel.keyblock \
--signprivate doc/chromium/files/devkeys/kernel_data_key.vbprivk \
--version 1 --config dummy.txt --vmlinuz u-boot-chromium.fit \
--bootloader dummy.txt --pack u-boot.kpart
- See above
@@ -182,7 +200,7 @@ do this, login as root (via Ctrl-Alt-forward_arrow) and type 'enable_dev_usb_boot'. You only need to do this once.
Reboot the device with the SD card inserted. Press Clrl-U at the developer -mode screen. It should show something like the following on the display: +mode screen. It should show something like the following on the display::
U-Boot 2017.05-00649-g72acdbf-dirty (May 29 2017 - 14:57:05 -0600)
@@ -203,18 +221,18 @@ None as yet.
Other notes
+-----------
flashrom
+~~~~~~~~
- Used to make a backup of your firmware, or to replace it.
+Used to make a backup of your firmware, or to replace it.
+See: https://www.chromium.org/chromium-os/packages/cros-flashrom
coreboot
+~~~~~~~~
Coreboot itself is not designed to actually boot an OS. Instead, a program called Depthcharge is used. This originally came out of U-Boot and was then diff --git a/doc/chromium/chromebook_jerry.its b/doc/chromium/files/chromebook_jerry.its similarity index 100% rename from doc/chromium/chromebook_jerry.its rename to doc/chromium/files/chromebook_jerry.its diff --git a/doc/chromium/devkeys/kernel.keyblock b/doc/chromium/files/devkeys/kernel.keyblock similarity index 100% rename from doc/chromium/devkeys/kernel.keyblock rename to doc/chromium/files/devkeys/kernel.keyblock diff --git a/doc/chromium/devkeys/kernel_data_key.vbprivk b/doc/chromium/files/devkeys/kernel_data_key.vbprivk similarity index 100% rename from doc/chromium/devkeys/kernel_data_key.vbprivk rename to doc/chromium/files/devkeys/kernel_data_key.vbprivk diff --git a/doc/chromium/nyan-big.its b/doc/chromium/files/nyan-big.its similarity index 100% rename from doc/chromium/nyan-big.its rename to doc/chromium/files/nyan-big.its diff --git a/doc/chromium/index.rst b/doc/chromium/index.rst new file mode 100644 index 00000000000..0722c250033 --- /dev/null +++ b/doc/chromium/index.rst @@ -0,0 +1,14 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright 2020 Google LLC
+Chromium OS-specific doc +========================
+This provides some information about Chromium OS and U-Boot.
+.. toctree::
- :maxdepth: 2
- overview
- run_vboot
- chainload
diff --git a/doc/chromium/overview.rst b/doc/chromium/overview.rst new file mode 100644 index 00000000000..5498ed9c16c --- /dev/null +++ b/doc/chromium/overview.rst @@ -0,0 +1,74 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright 2020 Google LLC
+Chromium OS Support in U-Boot +=============================
+Introduction +------------
+This describes how to use U-Boot with Chromium OS. Several options are +available:
- Running U-Boot from the 'altfw' feature, which is available on selected
Chromebooks from 2019 onwards (initially Grunt). Press '1' from the
developer-mode screen to get into U-Boot. See here for details:
https://chromium.googlesource.com/chromiumos/docs/+/HEAD/developer_mode.md
- Running U-Boot from the disk partition. This involves signing U-Boot and
placing it on the disk, for booting as a 'kernel'. See
:doc:`chainload` for information on this. This is the only
option on non-U-Boot Chromebooks from 2013 to 2018 and is somewhat
more involved.
- Running U-Boot with Chromium OS verified boot. This allows U-Boot to be
used instead of either or both of depthcharge (a bootloader which forked
from U-Boot in 2013) and coreboot. See :doc:`run_vboot` for more
information on this.
- Running U-Boot from coreboot. This allows U-Boot to run on more devices
since many of them only support coreboot as the bootloader and have
no bare-metal support in U-Boot. For this, use the 'coreboot' target.
- Running U-Boot and booting into a Chrome OS image, but without verified
boot. This can be useful for testing.
+Talks and documents +-------------------
+Here is some material relevant to Chromium OS verified boot with U-Boot:
- "U-Boot with Chrome OS and firmware packaging"
- Author: Simon Glass
- Presented at Open Source Firmware Conference 2018, Erlangen
- Describes the work in progress as at the end of 2018
- Slides at `OSFC <https://2018.osfc.io/uploads/talk/paper/26/U-Boot_with_Chrome_OS_and_firmware_packaging.pdf>`_
- Video on `Youtube <https://www.youtube.com/watch?v=1jknxUvmwpo>`_
With this patch applied to U-Boot master 'make htmldocs' generates an error:
Warning, treated as error: doc/chromium/overview.rst:5:Duplicate explicit target name: "youtube".
This seems to relate to:
doc/chromium/overview.rst:48: - Video on `Youtube https://www.youtube.com/watch?v=1jknxUvmwpo`_ doc/chromium/overview.rst:61: - Video at `Youtube https://www.youtube.com/watch?v=kdpZC9jFzZA`_ doc/chromium/overview.rst:70: - Video at `YouTube https://www.youtube.com/watch?v=WY2sWpuda2g`_
Best regards
Heinrich
- "Verified Boot in Chrome OS and how to make it work for you"
- Author: Simon Glass
- Presented at ELCE 2013, Edinburgh
- Describes the original 2013 implementation as shipped on snow (first
`ARM Chromebook was a Samsung Chromebook <https://www.cnet.com/products/samsung-series-3-chromebook-xe303c12-11-6-exynos-5250-2-gb-ram-16-gb-ssd-bilingual-english-french/>`_
with Samsung Exynos5250 `review <https://www.cnet.com/reviews/samsung-chromebook-series-3-review/>`_),
spring (`HP Chromebook 11 <https://www.cnet.com/products/hp-chromebook-11-g2-11-6-exynos-5250-4-gb-ram-16-gb-emmc/>`_)
and pit/pi (`Samsung Chromebook 2 <https://www.cnet.com/products/samsung-chromebook-2-xe503c12-11-6-exynos-5-octa-4-gb-ram-16-gb-ssd/>`_
with Exynos 5 Octa 5420 in 2014).
- Slides at `Google research <https://research.google/pubs/pub42038/>`_
- Video at `Youtube <https://www.youtube.com/watch?v=kdpZC9jFzZA>`_
- "Chrome University 2018: Chrome OS Firmware and Verified Boot 201"
- Author: Duncan Laurie
- Describes Chrome OS firmware as of 2018 and includes a wide range of
topics. This has no U-Boot information, but does cover coreboot and also
talks about the Chrome OS EC and Security chip. This is probably the
best introduction talk.
- Video at `YouTube <https://www.youtube.com/watch?v=WY2sWpuda2g>`_
- `Chromium OS U-Boot https://www.chromium.org/developers/u-boot`_
- `Firmware porting Guide https://www.chromium.org/chromium-os/firmware-porting-guide`_
diff --git a/doc/README.chromium b/doc/chromium/run_vboot.rst similarity index 68% rename from doc/README.chromium rename to doc/chromium/run_vboot.rst index 75f2f24042c..41b4f631835 100644 --- a/doc/README.chromium +++ b/doc/chromium/run_vboot.rst @@ -1,42 +1,14 @@
-Chromium OS Support in U-Boot
-Introduction
-This describes how to use U-Boot with Chromium OS. Several options are -available:
- Running U-Boot from the 'altfw' feature, which is available on selected
Chromebooks from 2019 onwards (initially Grunt). Press '1' from the
developer-mode screen to get into U-Boot. See here for details:
https://sites.google.com/a/chromium.org/dev/chromium-os/poking-around-your-chrome-os-device?pli=1
- Running U-Boot from the disk partition. This involves signing U-Boot and
placing it on the disk, for booting as a 'kernel'. See
README.chromium-chainload for information on this. This is the only
option on non-U-Boot Chromebooks from 2013 to 2018 and is somewhat
more involved.
- Running U-Boot with Chromium OS verified boot. This allows U-Boot to be
used instead of either or both of depthcharge (a bootloader which forked
from U-Boot in 2013) and coreboot. See below for more information on
this.
- Running U-Boot from coreboot. This allows U-Boot to run on more devices
since many of them only support coreboot as the bootloader and have
no bare-metal support in U-Boot. For this, use the 'coreboot' target.
- Running U-Boot and booting into a Chrome OS image, but without verified
boot. This can be useful for testing.
+.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright 2020 Google LLC +.. sectionauthor:: Simon Glass sjg@chromium.org
-U-Boot with Chromium OS verified boot
+Running U-Boot with Chromium OS verified boot +=============================================
-To obtain: +To obtain::
- git clone https://github.com/sglass68/u-boot.git
- git clone https://github.com/sjg20/u-boot.git cd u-boot git checkout cros-master
@@ -46,28 +18,35 @@ To obtain: git checkout 45964294 # futility: updater: Correct output version for Snow
-To build for sandbox: +To build for sandbox::
UB=/tmp/b/chromeos_sandbox # U-Boot build directory cd u-boot make O=$UB chromeos_sandbox_defconfig make O=$UB -j20 -s VBOOT_SOURCE=/path/to/vboot_reference \
- MAKEFLAGS_VBOOT=DEBUG=1 QUIET=1
MAKEFLAGS_VBOOT=DEBUG=1 QUIET=1
Replace sandbox with another supported target.
This produces $UB/image.bin which contains the firmware binaries in a SPI flash image.
-To run on sandbox: +To run on sandbox::
- CROS=~/cosarm
- IMG=$CROS/src/build/images/coral/latest/chromiumos_image.bin $UB/tpl/u-boot-tpl -d $UB/u-boot.dtb.out \
- -L6 -c "host bind 0 $CROS/src/build/images/cheza/latest/chromiumos_image.bin; vboot go auto" \
- -l -w -s state.dtb -r
-L6 -c "host bind 0 $IMG; vboot go auto" \
-l -w -s state.dtb -r -n -m $UB/ram
$UB/tpl/u-boot-tpl -d $UB/u-boot.dtb.out -L6 -l \
-c "host bind 0 $IMG; vboot go auto" -w -s $UB/state.dtb -r -n -m $UB/mem
To run on other boards:
- Install image.bin in the SPI flash of your device
- Boot your system
- Install image.bin in the SPI flash of your device
- Boot your system
Sandbox
@@ -83,7 +62,7 @@ a device tree and binding a Chromium OS disk image for use to find kernels phases into state.dtb and will automatically ensure that memory is shared between all phases. TPL will jump to SPL and then on to U-Boot proper.
-It is possible to run with debugging on, e.g. +It is possible to run with debugging on, e.g.::
gdb --args $UB/tpl/u-boot-tpl -d ....
@@ -95,7 +74,7 @@ Samus
Basic support is available for samus, using the chromeos_samus target. If you -have an em100, use: +have an em100, use::
sudo em100 -s -c W25Q128FW -d $UB/image.bin -t -r
@@ -119,11 +98,20 @@ New uclasses
Several uclasses are provided in cros/:
- UCLASS_CROS_AUX_FW Chrome OS auxiliary firmware
- UCLASS_CROS_FWSTORE Chrome OS firmware storage
- UCLASS_CROS_NVDATA Chrome OS non-volatile data device
- UCLASS_CROS_VBOOT_EC Chrome OS vboot EC operations
- UCLASS_CROS_VBOOT_FLAG Chrome OS verified boot flag
+UCLASS_CROS_AUX_FW
- Chrome OS auxiliary firmware
+UCLASS_CROS_FWSTORE
- Chrome OS firmware storage
+UCLASS_CROS_NVDATA
- Chrome OS non-volatile data device
+UCLASS_CROS_VBOOT_EC
- Chrome OS vboot EC operations
+UCLASS_CROS_VBOOT_FLAG
Chrome OS verified boot flag
The existing UCLASS_CROS_EC is also used.
@@ -181,7 +169,7 @@ detect problems that affect the flow or particular vboot features. U-Boot without Chromium OS verified boot
-The following script can be used to boot a Chrome OS image on coral: +The following script can be used to boot a Chrome OS image on coral::
# Read the image header and obtain the address of the kernel # The offset 4f0 is defined by verified boot and may change for other
@@ -213,6 +201,4 @@ TO DO Get the full ACPI tables working with Coral
-Simon Glass -sjg@chromium.org 7 October 2018 diff --git a/doc/index.rst b/doc/index.rst index 4c44955d67f..ce91a2a41ef 100644 --- a/doc/index.rst +++ b/doc/index.rst @@ -110,6 +110,14 @@ Android-specific features available in U-Boot.
android/index
+Chromium OS-specific doc +------------------------
+.. toctree::
- :maxdepth: 2
- chromium/index
Indices and tables

On 3/15/21 6:11 AM, Simon Glass wrote:
Move this documentation over to reST. Move the example files into a files/ directory so they are still separate.
Do a few minor updates while we are here:
- Tidy up sandbox build instructions
- Update my github account name
- Add some talks and links
Signed-off-by: Simon Glass sjg@chromium.org
.../chainload.rst} | 80 ++++++++++------ doc/chromium/{ => files}/chromebook_jerry.its | 0 .../{ => files}/devkeys/kernel.keyblock | Bin .../devkeys/kernel_data_key.vbprivk | Bin doc/chromium/{ => files}/nyan-big.its | 0 doc/chromium/index.rst | 14 +++ doc/chromium/overview.rst | 74 ++++++++++++++ .../run_vboot.rst} | 90 ++++++++---------- doc/index.rst | 8 ++ 9 files changed, 183 insertions(+), 83 deletions(-) rename doc/{README.chromium-chainload => chromium/chainload.rst} (79%) rename doc/chromium/{ => files}/chromebook_jerry.its (100%) rename doc/chromium/{ => files}/devkeys/kernel.keyblock (100%) rename doc/chromium/{ => files}/devkeys/kernel_data_key.vbprivk (100%) rename doc/chromium/{ => files}/nyan-big.its (100%) create mode 100644 doc/chromium/index.rst create mode 100644 doc/chromium/overview.rst rename doc/{README.chromium => chromium/run_vboot.rst} (68%)
Applied to u-boot-dm/next, thanks!

The U_BOOT_CMDREP_COMPLETE() macro produces a build error if CONFIG_CMDLINE is not enabled. Fix this by updating the macro to provide the 'repeatable' arugment in this case.
Signed-off-by: Simon Glass sjg@chromium.org ---
include/command.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/include/command.h b/include/command.h index 747f8f80958..137cfbc3231 100644 --- a/include/command.h +++ b/include/command.h @@ -389,6 +389,14 @@ int run_command_list(const char *cmd, int len, int flag); return 0; \ }
+#define _CMD_REMOVE_REP(_name, _cmd) \ + int __remove_ ## _name(void) \ + { \ + if (0) \ + _cmd(NULL, 0, 0, NULL, NULL); \ + return 0; \ + } + #define U_BOOT_CMDREP_MKENT_COMPLETE(_name, _maxargs, _cmd_rep, \ _usage, _help, _comp) \ { #_name, _maxargs, 0 ? _cmd_rep : NULL, NULL, _usage, \ @@ -405,7 +413,7 @@ int run_command_list(const char *cmd, int len, int flag);
#define U_BOOT_CMDREP_COMPLETE(_name, _maxargs, _cmd_rep, _usage, \ _help, _comp) \ - _CMD_REMOVE(sub_ ## _name, _cmd_rep) + _CMD_REMOVE_REP(sub_ ## _name, _cmd_rep)
#endif /* CONFIG_CMDLINE */

The U_BOOT_CMDREP_COMPLETE() macro produces a build error if CONFIG_CMDLINE is not enabled. Fix this by updating the macro to provide the 'repeatable' arugment in this case.
Signed-off-by: Simon Glass sjg@chromium.org ---
include/command.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
Applied to u-boot-dm/next, thanks!

Add an extra condition here since we cannot put x86 tables in a bloblist when bloblists are not supported.
Signed-off-by: Simon Glass sjg@chromium.org ---
lib/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/Kconfig b/lib/Kconfig index b35a71ac368..705196aef89 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -640,7 +640,7 @@ menu "System tables"
config BLOBLIST_TABLES bool "Put tables in a bloblist" - depends on X86 + depends on X86 && BLOBLIST help Normally tables are placed at address 0xf0000 and can be up to 64KB long. With this option, tables are instead placed in the bloblist

Add an extra condition here since we cannot put x86 tables in a bloblist when bloblists are not supported.
Signed-off-by: Simon Glass sjg@chromium.org ---
lib/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to u-boot-dm/next, thanks!

When there is no command line, we cannot enable this feature. Add a check to avoid a build error.
Signed-off-by: Simon Glass sjg@chromium.org ---
common/bootm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/common/bootm.c b/common/bootm.c index dab7c3619fd..ea71522d0c9 100644 --- a/common/bootm.c +++ b/common/bootm.c @@ -583,7 +583,8 @@ int bootm_process_cmdline(char *buf, int maxlen, int flags) if (ret) return log_msg_ret("silent", ret); } - if (IS_ENABLED(CONFIG_BOOTARGS_SUBST) && (flags & BOOTM_CL_SUBST)) { + if (IS_ENABLED(CONFIG_BOOTARGS_SUBST) && IS_ENABLED(CONFIG_CMDLINE) && + (flags & BOOTM_CL_SUBST)) { ret = process_subst(buf, maxlen); if (ret) return log_msg_ret("subst", ret);

It is not possible to remove the state before driver model is uninited, since the devices are allocated in the memory buffer. Also it is not possible to uninit driver model afterwards, since the RAM has been freed.
Drop the uninit altogether, since it is not actually necessary.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/sandbox/cpu/cpu.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index edd48e2c1b7..48636ab6391 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -6,7 +6,6 @@ #include <common.h> #include <bootstage.h> #include <cpu_func.h> -#include <dm.h> #include <errno.h> #include <log.h> #include <asm/global_data.h> @@ -17,7 +16,6 @@ #include <asm/malloc.h> #include <asm/setjmp.h> #include <asm/state.h> -#include <dm/root.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -34,10 +32,8 @@ void sandbox_exit(void) { /* Do this here while it still has an effect */ os_fd_restore(); - if (state_uninit()) - os_exit(2);
- if (dm_uninit()) + if (state_uninit()) os_exit(2);
/* This is considered normal termination for now */

It is not possible to remove the state before driver model is uninited, since the devices are allocated in the memory buffer. Also it is not possible to uninit driver model afterwards, since the RAM has been freed.
Drop the uninit altogether, since it is not actually necessary.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/sandbox/cpu/cpu.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-)
Applied to u-boot-dm/next, thanks!
participants (3)
-
Heinrich Schuchardt
-
Sean Anderson
-
Simon Glass