[U-Boot] 11/12 Multiadapter/multibus I2C, configs part 4
Signed-off-by: Sergey Kubushyn ksi@koi8.net --- diff -purN u-boot-i2c.orig/include/configs/barco.h u-boot-i2c/include/configs/barco.h --- u-boot-i2c.orig/include/configs/barco.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/barco.h 2009-02-12 10:46:00.000000000 -0800 @@ -197,6 +197,11 @@
#ifdef CONFIG_SOFT_I2C #error "Soft I2C is not configured properly. Please review!" +#define CONFIG_NEW_I2C +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 50000 +#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} #define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000) #define I2C_TRISTATE (iop->pdir &= ~0x00010000) diff -purN u-boot-i2c.orig/include/configs/bf533-ezkit.h u-boot-i2c/include/configs/bf533-ezkit.h --- u-boot-i2c.orig/include/configs/bf533-ezkit.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/bf533-ezkit.h 2009-02-12 10:46:00.000000000 -0800 @@ -168,7 +168,12 @@ * I2C settings * By default PF1 is used as SDA and PF0 as SCL on the Stamp board */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ +#define CONFIG_NEW_I2C +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 50000 +#define CONFIG_SYS_SOFT_I2C_SLAVE 0 +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} /* * Software (bit-bang) I2C driver configuration */ @@ -197,9 +202,6 @@ } #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
-#define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0 - #define CONFIG_SYS_BOOTM_LEN 0x4000000 /* Large Image Length, set to 64 Meg */
#define CONFIG_EBIU_SDRRC_VAL 0x398 diff -purN u-boot-i2c.orig/include/configs/bf533-stamp.h u-boot-i2c/include/configs/bf533-stamp.h --- u-boot-i2c.orig/include/configs/bf533-stamp.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/bf533-stamp.h 2009-02-12 10:46:00.000000000 -0800 @@ -27,14 +27,6 @@ /* FLASH/ETHERNET uses the same address range */ #define SHARED_RESOURCES 1
-/* Is I2C bit-banged? */ -#define CONFIG_SOFT_I2C 1 - -/* - * Software (bit-bang) I2C driver configuration - */ -#define PF_SCL PF3 -#define PF_SDA PF2
/* * Video splash screen support @@ -178,6 +170,41 @@ #define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ #endif
+/* I2C */ +#define CONFIG_NEW_I2C +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 50000 +#define CONFIG_SYS_SOFT_I2C_SLAVE 0 +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} +/* + * Software (bit-bang) I2C driver configuration + */ +#define PF_SCL PF3 +#define PF_SDA PF2 +#define I2C_INIT (*pFIO_DIR |= PF_SCL); asm("ssync;") +#define I2C_ACTIVE (*pFIO_DIR |= PF_SDA); *pFIO_INEN &= ~PF_SDA; asm("ssync;") +#define I2C_TRISTATE (*pFIO_DIR &= ~PF_SDA); *pFIO_INEN |= PF_SDA; asm("ssync;") +#define I2C_READ ((volatile)(*pFIO_FLAG_D & PF_SDA) != 0); asm("ssync;") +#define I2C_SDA(bit) if(bit) { \ + *pFIO_FLAG_S = PF_SDA; \ + asm("ssync;"); \ + } \ + else { \ + *pFIO_FLAG_C = PF_SDA; \ + asm("ssync;"); \ + } +#define I2C_SCL(bit) if(bit) { \ + *pFIO_FLAG_S = PF_SCL; \ + asm("ssync;"); \ + } \ + else { \ + *pFIO_FLAG_C = PF_SCL; \ + asm("ssync;"); \ + } +#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ + + /* * Command settings */ @@ -213,13 +240,6 @@ "cp.b $(loadaddr) 0x20000000 $(filesize)\0" \ ""
-#ifdef CONFIG_SOFT_I2C -#if (!CONFIG_SOFT_I2C) -#undef CONFIG_SOFT_I2C -#endif -#endif - - /* * BOOTP options */ @@ -244,7 +264,7 @@ #define CONFIG_CMD_PING #endif
-#if (CONFIG_SOFT_I2C) +#if defined(CONFIG_SOFT_I2C) #define CONFIG_CMD_I2C #endif
@@ -271,37 +291,6 @@
#define CONFIG_LOADS_ECHO 1
-/* - * I2C settings - * By default PF2 is used as SDA and PF3 as SCL on the Stamp board - */ -#if (CONFIG_SOFT_I2C) - -#define I2C_INIT (*pFIO_DIR |= PF_SCL); asm("ssync;") -#define I2C_ACTIVE (*pFIO_DIR |= PF_SDA); *pFIO_INEN &= ~PF_SDA; asm("ssync;") -#define I2C_TRISTATE (*pFIO_DIR &= ~PF_SDA); *pFIO_INEN |= PF_SDA; asm("ssync;") -#define I2C_READ ((volatile)(*pFIO_FLAG_D & PF_SDA) != 0); asm("ssync;") -#define I2C_SDA(bit) if(bit) { \ - *pFIO_FLAG_S = PF_SDA; \ - asm("ssync;"); \ - } \ - else { \ - *pFIO_FLAG_C = PF_SDA; \ - asm("ssync;"); \ - } -#define I2C_SCL(bit) if(bit) { \ - *pFIO_FLAG_S = PF_SCL; \ - asm("ssync;"); \ - } \ - else { \ - *pFIO_FLAG_C = PF_SCL; \ - asm("ssync;"); \ - } -#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ - -#define CONFIG_SYS_I2C_SPEED 50000 -#define CONFIG_SYS_I2C_SLAVE 0 -#endif /* CONFIG_SOFT_I2C */
/* * Compact Flash settings diff -purN u-boot-i2c.orig/include/configs/bf537-stamp.h u-boot-i2c/include/configs/bf537-stamp.h --- u-boot-i2c.orig/include/configs/bf537-stamp.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/bf537-stamp.h 2009-02-12 10:46:00.000000000 -0800 @@ -306,10 +306,11 @@ /* * I2C settings */ -#define CONFIG_HARD_I2C 1 -#define CONFIG_BFIN_TWI_I2C 1 -#define CFG_I2C_SPEED 50000 -#define CFG_I2C_SLAVE 0 +#define CONFIG_NEW_I2C +#define CONFIG_BFIN_TWI_I2C +#define CONFIG_SYS_BFIN_TWI_I2C_SPEED 50000 /* I2C speed and slave address */ +#define CONFIG_SYS_BFIN_TWI_I2C_SLAVE 0 +#define CONFIG_SYS_I2C_ADAPTERS {&bfin_twi_i2c_adap}
#define CONFIG_EBIU_SDRRC_VAL 0x306 #define CONFIG_EBIU_SDGCTL_VAL 0x91114d diff -purN u-boot-i2c.orig/include/configs/debris.h u-boot-i2c/include/configs/debris.h --- u-boot-i2c.orig/include/configs/debris.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/debris.h 2009-02-12 10:46:00.000000000 -0800 @@ -280,6 +280,11 @@
#ifdef CONFIG_SOFT_I2C #error "Soft I2C is not configured properly. Please review!" +#define CONFIG_NEW_I2C +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 50000 +#define CONFIG_SYS_SOFT_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} #define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000) #define I2C_TRISTATE (iop->pdir &= ~0x00010000) diff -purN u-boot-i2c.orig/include/configs/ep8260.h u-boot-i2c/include/configs/ep8260.h --- u-boot-i2c.orig/include/configs/ep8260.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/ep8260.h 2009-02-12 10:46:00.000000000 -0800 @@ -226,14 +226,20 @@ * configuration items that the driver uses to drive the port pins. */ #undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ +#define CONFIG_SOFT_I2C /* I2C bit-banged */ + #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_SLAVE 0x7F /* This is for HARD, must go */
/* * Software (bit-bang) I2C driver configuration */ #ifdef CONFIG_SOFT_I2C +#define CONFIG_NEW_I2C +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 50000 +#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} #define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */ #define I2C_ACTIVE (iop->pdir |= 0x00010000) #define I2C_TRISTATE (iop->pdir &= ~0x00010000) diff -purN u-boot-i2c.orig/include/configs/imx31_phycore.h u-boot-i2c/include/configs/imx31_phycore.h --- u-boot-i2c.orig/include/configs/imx31_phycore.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/imx31_phycore.h 2009-02-12 10:46:00.000000000 -0800 @@ -58,11 +58,19 @@ * Hardware drivers */
-#define CONFIG_HARD_I2C 1 -#define CONFIG_I2C_MXC 1 -#define CONFIG_SYS_I2C_MX31_PORT2 1 -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 0xfe +/* + * CONFIG_SYS_MXC_I2C_BASE for the port used: + * + * 1: 0x43f80000 + * 2: 0x43f98000 + * 3: 0x43f84000 + */ +#define CONFIG_NEW_I2C +#define CONFIG_MXC_I2C +#define CONFIG_SYS_MXC_I2C_SPEED 100000 /* I2C speed and slave address */ +#define CONFIG_SYS_MXC_I2C_SLAVE 0xfe +#define CONFIG_SYS_MXC_I2C_BASE 0x43f98000 +#define CONFIG_SYS_I2C_ADAPTERS {&mxc_i2c_adap[0]}
#define CONFIG_MX31_UART 1 #define CONFIG_SYS_MX31_UART1 1 diff -purN u-boot-i2c.orig/include/configs/lwmon.h u-boot-i2c/include/configs/lwmon.h --- u-boot-i2c.orig/include/configs/lwmon.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/lwmon.h 2009-02-12 10:46:00.000000000 -0800 @@ -144,12 +144,12 @@
/* enable I2C and select the hardware/software driver */ #undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_NEW_I2C +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 93000 /* 93 kHz is supposed to work */ +#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} /* * Software (bit-bang) I2C driver configuration */ @@ -165,7 +165,6 @@ #define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL #define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */
#define CONFIG_RTC_PCF8563 /* use Philips PCF8563 RTC */ diff -purN u-boot-i2c.orig/include/configs/TASREG.h u-boot-i2c/include/configs/TASREG.h --- u-boot-i2c.orig/include/configs/TASREG.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/TASREG.h 2009-02-12 10:46:00.000000000 -0800 @@ -137,19 +137,13 @@ /*----------------------------------------------------------------------- * I2C */ -#define CONFIG_SOFT_I2C -#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC32 */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ -/* mask of address bits that overflow into the "EEPROM chip address" */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x01 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */ - /* 32 byte page write mode using*/ - /* last 5 bits of the address */ -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ +#define CONFIG_NEW_I2C +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 100000 +#define CONFIG_SYS_SOFT_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]}
-#if defined (CONFIG_SOFT_I2C) #if 0 /* push-pull */ #define SDA 0x00800000 #define SCL 0x00000008 @@ -183,7 +177,15 @@ #define I2C_ACTIVE {DIR1|=SDA;} #define I2C_TRISTATE {DIR1&=~SDA;} #endif -#endif + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT28WC32 */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ +/* mask of address bits that overflow into the "EEPROM chip address" */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x01 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */ + /* 32 byte page write mode using*/ + /* last 5 bits of the address */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
/*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) diff -purN u-boot-i2c.orig/include/configs/TK885D.h u-boot-i2c/include/configs/TK885D.h --- u-boot-i2c.orig/include/configs/TK885D.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/TK885D.h 2009-02-12 10:46:00.000000000 -0800 @@ -102,12 +102,12 @@
/* enable I2C and select the hardware/software driver */ #undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_NEW_I2C +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 93000 /* 93 kHz is supposed to work */ +#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} /* * Software (bit-bang) I2C driver configuration */ @@ -123,7 +123,6 @@ #define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL #define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C?? */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* two byte address */ diff -purN u-boot-i2c.orig/include/configs/TOP5200.h u-boot-i2c/include/configs/TOP5200.h --- u-boot-i2c.orig/include/configs/TOP5200.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/TOP5200.h 2009-02-12 10:46:00.000000000 -0800 @@ -196,9 +196,15 @@ #define CONFIG_MISC_INIT_R
#undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C with softwate support */ +#define CONFIG_SOFT_I2C /* I2C bit-banged */
#if defined (CONFIG_SOFT_I2C) +# define CONFIG_NEW_I2C +# define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +# define CONFIG_SYS_SOFT_I2C_SPEED 100000 +# define CONFIG_SYS_SOFT_I2C_SLAVE 0x7F +# define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} +/**/ # define SDA0 0x40 # define SCL0 0x80 # define GPIOE0 *((volatile uchar*)(CONFIG_SYS_MBAR+0x0c00)) @@ -213,8 +219,7 @@ # define I2C_DELAY {udelay(5);} # define I2C_ACTIVE {DDR0|=SDA0;} # define I2C_TRISTATE {DDR0&=~SDA0;} -# define CONFIG_SYS_I2C_SPEED 100000 -# define CONFIG_SYS_I2C_SLAVE 0x7F + #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 #define CONFIG_SYS_I2C_FACT_ADDR 0x57 #endif diff -purN u-boot-i2c.orig/include/configs/TOP860.h u-boot-i2c/include/configs/TOP860.h --- u-boot-i2c.orig/include/configs/TOP860.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/TOP860.h 2009-02-12 10:46:00.000000000 -0800 @@ -159,7 +159,6 @@ * Environment handler * only the first 6k in EEPROM are available for user. Of that we use 256b */ -#define CONFIG_SOFT_I2C #define CONFIG_ENV_IS_IN_EEPROM 1 /* turn on EEPROM env feature */ #define CONFIG_ENV_OFFSET 0x1000 #define CONFIG_ENV_SIZE 0x0700 @@ -170,13 +169,17 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 #define CONFIG_SYS_EEPROM_SIZE 0x2000 -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SLAVE 0xFE #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 12 #define CONFIG_ENV_OVERWRITE #define CONFIG_MISC_INIT_R
-#if defined (CONFIG_SOFT_I2C) +#define CONFIG_NEW_I2C +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 100000 +#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} +/**/ #define SDA 0x00010 #define SCL 0x00020 #define __I2C_DIR immr->im_cpm.cp_pbdir @@ -193,7 +196,6 @@ #define I2C_DELAY { udelay(5); } #define I2C_ACTIVE { __I2C_DIR |= SDA; } #define I2C_TRISTATE { __I2C_DIR &= ~SDA; } -#endif
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
diff -purN u-boot-i2c.orig/include/configs/TQM8260.h u-boot-i2c/include/configs/TQM8260.h --- u-boot-i2c.orig/include/configs/TQM8260.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/TQM8260.h 2009-02-12 10:46:00.000000000 -0800 @@ -88,9 +88,12 @@
/* enable I2C and select the hardware/software driver */ #undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F +#define CONFIG_NEW_I2C +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 400000 +#define CONFIG_SYS_SOFT_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]}
/* * Software (bit-bang) I2C driver configuration diff -purN u-boot-i2c.orig/include/configs/TQM8272.h u-boot-i2c/include/configs/TQM8272.h --- u-boot-i2c.orig/include/configs/TQM8272.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/TQM8272.h 2009-02-12 10:46:00.000000000 -0800 @@ -96,10 +96,12 @@ #if CONFIG_I2C /* enable I2C and select the hardware/software driver */ #undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F - +#define CONFIG_NEW_I2C +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 400000 +#define CONFIG_SYS_SOFT_I2C_SLAVE 0x7F +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} /* * Software (bit-bang) I2C driver configuration */ diff -purN u-boot-i2c.orig/include/configs/TQM834x.h u-boot-i2c/include/configs/TQM834x.h --- u-boot-i2c.orig/include/configs/TQM834x.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/TQM834x.h 2009-02-12 10:46:00.000000000 -0800 @@ -201,12 +201,12 @@ extern int tqm834x_num_flash_banks; /* * I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C /* I2C bit-banged */ +#define CONFIG_NEW_I2C #define CONFIG_FSL_I2C -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed: 400KHz */ -#define CONFIG_SYS_I2C_SLAVE 0x7F /* slave address */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_ADAPTERS {&fsl_i2c_adap[0]}
/* I2C EEPROM, configuration for onboard EEPROMs 24C256 and 24C32 */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */ diff -purN u-boot-i2c.orig/include/configs/TQM855M.h u-boot-i2c/include/configs/TQM855M.h --- u-boot-i2c.orig/include/configs/TQM855M.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/TQM855M.h 2009-02-12 10:46:00.000000000 -0800 @@ -93,12 +93,12 @@
/* enable I2C and select the hardware/software driver */ #undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_NEW_I2C +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 93000 /* 93 kHz is supposed to work */ +#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} /* * Software (bit-bang) I2C driver configuration */ @@ -114,7 +114,6 @@ #define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL #define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* two byte address */ diff -purN u-boot-i2c.orig/include/configs/TQM85xx.h u-boot-i2c/include/configs/TQM85xx.h --- u-boot-i2c.orig/include/configs/TQM85xx.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/TQM85xx.h 2009-02-12 10:46:00.000000000 -0800 @@ -302,13 +302,13 @@ /* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#undef CONFIG_SOFT_I2C /* I2C bit-banged */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_NOPROBES {0x48} /* Don't probe these addrs */ -#define CONFIG_SYS_I2C_OFFSET 0x3000 +#define CONFIG_NEW_I2C +#define CONFIG_FSL_I2C +#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_I2C_ADAPTERS {&fsl_i2c_adap[0]} +#define CONFIG_SYS_I2C_NOPROBES {0x48} /* Don't probe these addrs */
/* I2C RTC */ #define CONFIG_RTC_DS1337 /* Use ds1337 rtc via i2c */ diff -purN u-boot-i2c.orig/include/configs/TQM866M.h u-boot-i2c/include/configs/TQM866M.h --- u-boot-i2c.orig/include/configs/TQM866M.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/TQM866M.h 2009-02-12 10:46:00.000000000 -0800 @@ -105,12 +105,12 @@
/* enable I2C and select the hardware/software driver */ #undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_NEW_I2C +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 93000 /* 93 kHz is supposed to work */ +#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} /* * Software (bit-bang) I2C driver configuration */ @@ -126,7 +126,6 @@ #define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL #define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C256 */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* two byte address */ diff -purN u-boot-i2c.orig/include/configs/TQM885D.h u-boot-i2c/include/configs/TQM885D.h --- u-boot-i2c.orig/include/configs/TQM885D.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/TQM885D.h 2009-02-12 10:46:00.000000000 -0800 @@ -99,12 +99,12 @@
/* enable I2C and select the hardware/software driver */ #undef CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */ - -#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */ -#define CONFIG_SYS_I2C_SLAVE 0xFE - -#ifdef CONFIG_SOFT_I2C +#define CONFIG_NEW_I2C +#define CONFIG_SOFT_I2C /* I2C bit-banged */ +#define I2C_SOFT_DECLARATIONS I2C_SOFT_DEFS +#define CONFIG_SYS_SOFT_I2C_SPEED 93000 /* 93 kHz is supposed to work */ +#define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE +#define CONFIG_SYS_I2C_ADAPTERS {&soft_i2c_adap[0]} /* * Software (bit-bang) I2C driver configuration */ @@ -120,7 +120,6 @@ #define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ else immr->im_cpm.cp_pbdat &= ~PB_SCL #define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */ -#endif /* CONFIG_SOFT_I2C */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C?? */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* two byte address */ diff -purN u-boot-i2c.orig/include/configs/XPEDITE5200.h u-boot-i2c/include/configs/XPEDITE5200.h --- u-boot-i2c.orig/include/configs/XPEDITE5200.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/XPEDITE5200.h 2009-02-12 10:46:00.000000000 -0800 @@ -219,14 +219,16 @@ /* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE +#define CONFIG_NEW_I2C +#define CONFIG_SYS_NUM_I2C_ADAPTERS 2 +#define CONFIG_FSL_I2C +#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_ADAPTERS {&fsl_i2c_adap[0], &fsl_i2c_adap[1]}
/* I2C EEPROM */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 diff -purN u-boot-i2c.orig/include/configs/XPEDITE5370.h u-boot-i2c/include/configs/XPEDITE5370.h --- u-boot-i2c.orig/include/configs/XPEDITE5370.h 2009-02-12 10:43:41.000000000 -0800 +++ u-boot-i2c/include/configs/XPEDITE5370.h 2009-02-12 10:46:00.000000000 -0800 @@ -237,14 +237,16 @@ extern unsigned long get_board_ddr_clk(u /* * I2C */ -#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ -#define CONFIG_HARD_I2C /* I2C with hardware support */ -#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_OFFSET 0x3000 -#define CONFIG_SYS_I2C2_OFFSET 0x3100 -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE +#define CONFIG_NEW_I2C +#define CONFIG_SYS_NUM_I2C_ADAPTERS 2 +#define CONFIG_FSL_I2C +#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C2_SPEED 400000 /* I2C speed and slave address */ +#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_I2C_ADAPTERS {&fsl_i2c_adap[0], &fsl_i2c_adap[1]}
/* PEX8518 slave I2C interface */ #define CONFIG_SYS_I2C_PEX8518_ADDR 0x70
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