This patch adds the read_mpidr() function which returns the MPIDR_EL1 register value

Signed-off-by: Sergey Temerkhanov s.temerkhanov@gmail.com Signed-off-by: Radha Mohan Chintakuntla rchintakuntla@cavium.com

Reviewed-by: Simon Glass sjg@chromium.org ---

Changes in v4: None Changes in v3: None Changes in v2: None

arch/arm/include/asm/system.h | 11 +++++++++++ 1 file changed, 11 insertions(+)

diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 868ea54..323c43e 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -71,6 +71,17 @@ static inline void set_sctlr(unsigned int val) asm volatile("isb"); }

+static inline unsigned long read_mpidr(void) +{ + unsigned long val; + + asm volatile("mrs %0, mpidr_el1" : "=r" (val)); + + return val; +} + +#define BSP_COREID 0 + void __asm_flush_dcache_all(void); void __asm_invalidate_dcache_all(void); void __asm_flush_dcache_range(u64 start, u64 end);

This commit adds functions issuing calls to secure monitor or hypervisore. This allows using services such as Power State Coordination Interface (PSCI) provided by firmware, e.g. ARM Trusted Firmware (ATF)

The SMC call can destroy all registers declared temporary by the calling conventions. The clobber list is "x0..x17" because of this

Signed-off-by: Sergey Temerkhanov s.temerkhanov@gmail.com Signed-off-by: Corey Minyard cminyard@mvista.com Signed-off-by: Radha Mohan Chintakuntla rchintakuntla@cavium.com

---

Changes in v4: - Document FW calls

Changes in v3: - Fixed clobber lists (thanks to Corey)

Changes in v2: None

arch/arm/cpu/armv8/Makefile | 1 + arch/arm/cpu/armv8/fwcall.c | 75 +++++++++++++++++++++++++++++++++++++++++++ arch/arm/include/asm/system.h | 21 ++++++++++++ 3 files changed, 97 insertions(+) create mode 100644 arch/arm/cpu/armv8/fwcall.c

diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile index adb11b3..7579ea7 100644 --- a/arch/arm/cpu/armv8/Makefile +++ b/arch/arm/cpu/armv8/Makefile @@ -14,6 +14,7 @@ obj-y += exceptions.o obj-y += cache.o obj-y += tlb.o obj-y += transition.o +obj-y += fwcall.o

obj-$(CONFIG_FSL_LSCH3) += fsl-lsch3/ obj-$(CONFIG_ARCH_ZYNQMP) += zynqmp/ diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c new file mode 100644 index 0000000..9efcc5a --- /dev/null +++ b/arch/arm/cpu/armv8/fwcall.c @@ -0,0 +1,75 @@ +/** + * (C) Copyright 2014, Cavium Inc. + * + * SPDX-License-Identifier: GPL-2.0+ +**/ + +#include <asm-offsets.h> +#include <config.h> +#include <version.h> +#include <asm/macro.h> +#include <asm/system.h> + +/* + * Issue the hypervisor call + * + * x0~x7: input arguments + * x0~x3: output arguments + */ +void hvc_call(struct pt_regs *args) +{ + asm volatile( + "ldr x0, %0\n" + "ldr x1, %1\n" + "ldr x2, %2\n" + "ldr x3, %3\n" + "ldr x4, %4\n" + "ldr x5, %5\n" + "ldr x6, %6\n" + "ldr x7, %7\n" + "hvc #0\n" + "str x0, %0\n" + "str x1, %1\n" + "str x2, %2\n" + "str x3, %3\n" + : "+m" (args->regs[0]), "+m" (args->regs[1]), + "+m" (args->regs[2]), "+m" (args->regs[3]) + : "m" (args->regs[4]), "m" (args->regs[5]), + "m" (args->regs[6]), "m" (args->regs[7]) + : "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", + "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", + "x16", "x17"); +} + +/* + * void smc_call(arg0, arg1...arg7) + * + * issue the secure monitor call + * + * x0~x7: input arguments + * x0~x3: output arguments + */ + +void smc_call(struct pt_regs *args) +{ + asm volatile( + "ldr x0, %0\n" + "ldr x1, %1\n" + "ldr x2, %2\n" + "ldr x3, %3\n" + "ldr x4, %4\n" + "ldr x5, %5\n" + "ldr x6, %6\n" + "smc #0\n" + "str x0, %0\n" + "str x1, %1\n" + "str x2, %2\n" + "str x3, %3\n" + : "+m" (args->regs[0]), "+m" (args->regs[1]), + "+m" (args->regs[2]), "+m" (args->regs[3]) + : "m" (args->regs[4]), "m" (args->regs[5]), + "m" (args->regs[6]) + : "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", + "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", + "x16", "x17"); +} diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 9288541..f3e2d1b 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -1,6 +1,9 @@ #ifndef __ASM_ARM_SYSTEM_H #define __ASM_ARM_SYSTEM_H

+#include <common.h> +#include <linux/compiler.h> + #ifdef CONFIG_ARM64

/* @@ -104,6 +107,24 @@ void smp_kick_all_cpus(void);

void flush_l3_cache(void);

+/* + *Issue a hypervisor call in accordance with ARM "SMC Calling convention", + * DEN0028A + * + * @args: input and output arguments + * + */ +void hvc_call(struct pt_regs *args); + +/* + *Issue a secure monitor call in accordance with ARM "SMC Calling convention", + * DEN0028A + * + * @args: input and output arguments + * + */ +void smc_call(struct pt_regs *args); + #endif /* __ASSEMBLY__ */

#else /* CONFIG_ARM64 */

This commit adds the psci.h header file from Linux kernel which contains definitions related to the PSCI interface provided by firmware

Signed-off-by: Sergey Temerkhanov s.temerkhanov@gmail.com Signed-off-by: Radha Mohan Chintakuntla rchintakuntla@cavium.com ---

Changes in v4: None Changes in v3: None Changes in v2: None

include/linux/psci.h | 90 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) create mode 100644 include/linux/psci.h

diff --git a/include/linux/psci.h b/include/linux/psci.h new file mode 100644 index 0000000..310d83e --- /dev/null +++ b/include/linux/psci.h @@ -0,0 +1,90 @@ +/* + * ARM Power State and Coordination Interface (PSCI) header + * + * This header holds common PSCI defines and macros shared + * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 and user space. + * + * Copyright (C) 2014 Linaro Ltd. + * Author: Anup Patel anup.patel@linaro.org + */ + +#ifndef _UAPI_LINUX_PSCI_H +#define _UAPI_LINUX_PSCI_H + +/* + * PSCI v0.1 interface + * + * The PSCI v0.1 function numbers are implementation defined. + * + * Only PSCI return values such as: SUCCESS, NOT_SUPPORTED, + * INVALID_PARAMS, and DENIED defined below are applicable + * to PSCI v0.1. + */ + +/* PSCI v0.2 interface */ +#define PSCI_0_2_FN_BASE 0x84000000 +#define PSCI_0_2_FN(n) (PSCI_0_2_FN_BASE + (n)) +#define PSCI_0_2_64BIT 0x40000000 +#define PSCI_0_2_FN64_BASE \ + (PSCI_0_2_FN_BASE + PSCI_0_2_64BIT) +#define PSCI_0_2_FN64(n) (PSCI_0_2_FN64_BASE + (n)) + +#define PSCI_0_2_FN_PSCI_VERSION PSCI_0_2_FN(0) +#define PSCI_0_2_FN_CPU_SUSPEND PSCI_0_2_FN(1) +#define PSCI_0_2_FN_CPU_OFF PSCI_0_2_FN(2) +#define PSCI_0_2_FN_CPU_ON PSCI_0_2_FN(3) +#define PSCI_0_2_FN_AFFINITY_INFO PSCI_0_2_FN(4) +#define PSCI_0_2_FN_MIGRATE PSCI_0_2_FN(5) +#define PSCI_0_2_FN_MIGRATE_INFO_TYPE PSCI_0_2_FN(6) +#define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU PSCI_0_2_FN(7) +#define PSCI_0_2_FN_SYSTEM_OFF PSCI_0_2_FN(8) +#define PSCI_0_2_FN_SYSTEM_RESET PSCI_0_2_FN(9) + +#define PSCI_0_2_FN64_CPU_SUSPEND PSCI_0_2_FN64(1) +#define PSCI_0_2_FN64_CPU_ON PSCI_0_2_FN64(3) +#define PSCI_0_2_FN64_AFFINITY_INFO PSCI_0_2_FN64(4) +#define PSCI_0_2_FN64_MIGRATE PSCI_0_2_FN64(5) +#define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU PSCI_0_2_FN64(7) + +/* PSCI v0.2 power state encoding for CPU_SUSPEND function */ +#define PSCI_0_2_POWER_STATE_ID_MASK 0xffff +#define PSCI_0_2_POWER_STATE_ID_SHIFT 0 +#define PSCI_0_2_POWER_STATE_TYPE_SHIFT 16 +#define PSCI_0_2_POWER_STATE_TYPE_MASK \ + (0x1 << PSCI_0_2_POWER_STATE_TYPE_SHIFT) +#define PSCI_0_2_POWER_STATE_AFFL_SHIFT 24 +#define PSCI_0_2_POWER_STATE_AFFL_MASK \ + (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT) + +/* PSCI v0.2 affinity level state returned by AFFINITY_INFO */ +#define PSCI_0_2_AFFINITY_LEVEL_ON 0 +#define PSCI_0_2_AFFINITY_LEVEL_OFF 1 +#define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING 2 + +/* PSCI v0.2 multicore support in Trusted OS returned by MIGRATE_INFO_TYPE */ +#define PSCI_0_2_TOS_UP_MIGRATE 0 +#define PSCI_0_2_TOS_UP_NO_MIGRATE 1 +#define PSCI_0_2_TOS_MP 2 + +/* PSCI version decoding (independent of PSCI version) */ +#define PSCI_VERSION_MAJOR_SHIFT 16 +#define PSCI_VERSION_MINOR_MASK \ + ((1U << PSCI_VERSION_MAJOR_SHIFT) - 1) +#define PSCI_VERSION_MAJOR_MASK ~PSCI_VERSION_MINOR_MASK +#define PSCI_VERSION_MAJOR(ver) \ + (((ver) & PSCI_VERSION_MAJOR_MASK) >> PSCI_VERSION_MAJOR_SHIFT) +#define PSCI_VERSION_MINOR(ver) \ + ((ver) & PSCI_VERSION_MINOR_MASK) + +/* PSCI return values (inclusive of all PSCI versions) */ +#define PSCI_RET_SUCCESS 0 +#define PSCI_RET_NOT_SUPPORTED -1 +#define PSCI_RET_INVALID_PARAMS -2 +#define PSCI_RET_DENIED -3 +#define PSCI_RET_ALREADY_ON -4 +#define PSCI_RET_ON_PENDING -5 +#define PSCI_RET_INTERNAL_FAILURE -6 +#define PSCI_RET_NOT_PRESENT -7 +#define PSCI_RET_DISABLED -8 + +#endif /* _UAPI_LINUX_PSCI_H */

This commit adds basic Cavium ThunderX 88xx board definitions and support.

Signed-off-by: Sergey Temerkhanov s.temerkhanov@gmail.com Signed-off-by: Radha Mohan Chintakuntla rchintakuntla@cavium.com

---

Changes in v4: - Moved CONFIG_SYS_PROMPT to configs/thunderx_88xx_defconfig - Add proper DM_SERIAL definitions

Changes in v3: - Fixed formatting - Added MAINTAINERS - Moved command definitions to defconfig

Changes in v2: None

arch/arm/Kconfig | 4 + board/cavium/thunderx/Kconfig | 19 +++++ board/cavium/thunderx/MAINTAINERS | 6 ++ board/cavium/thunderx/Makefile | 8 ++ board/cavium/thunderx/thunderx.c | 86 ++++++++++++++++++++++ configs/thunderx_88xx_defconfig | 28 +++++++ include/configs/thunderx_88xx.h | 149 ++++++++++++++++++++++++++++++++++++++ 7 files changed, 300 insertions(+) create mode 100644 board/cavium/thunderx/Kconfig create mode 100644 board/cavium/thunderx/MAINTAINERS create mode 100644 board/cavium/thunderx/Makefile create mode 100644 board/cavium/thunderx/thunderx.c create mode 100644 configs/thunderx_88xx_defconfig create mode 100644 include/configs/thunderx_88xx.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ee9a1b3..873a9b9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -830,6 +830,9 @@ config TARGET_STM32F429_DISCOVERY bool "Support STM32F429 Discovery" select CPU_V7M

+config TARGET_THUNDERX_88XX + bool "Support ThunderX 88xx" + endchoice

source "arch/arm/mach-at91/Kconfig" @@ -1001,6 +1004,7 @@ source "board/woodburn/Kconfig" source "board/work-microwave/work_92105/Kconfig" source "board/xaeniax/Kconfig" source "board/zipitz2/Kconfig" +source "board/cavium/thunderx/Kconfig"

source "arch/arm/Kconfig.debug"

diff --git a/board/cavium/thunderx/Kconfig b/board/cavium/thunderx/Kconfig new file mode 100644 index 0000000..3e62abf --- /dev/null +++ b/board/cavium/thunderx/Kconfig @@ -0,0 +1,19 @@ +if TARGET_THUNDERX_88XX + +config SYS_CPU + string + default "armv8" + +config SYS_BOARD + string + default "thunderx" + +config SYS_VENDOR + string + default "cavium" + +config SYS_CONFIG_NAME + string + default "thunderx_88xx" + +endif diff --git a/board/cavium/thunderx/MAINTAINERS b/board/cavium/thunderx/MAINTAINERS new file mode 100644 index 0000000..c84d3b5 --- /dev/null +++ b/board/cavium/thunderx/MAINTAINERS @@ -0,0 +1,6 @@ +THUNDERX BOARD +M: Sergey Temerkhanov s.temerkhanov@gmail.com +S: Maintained +F: board/cavium/thunderx/ +F: include/configs/thunderx_88xx.h +F: configs/thunderx_88xx_defconfig diff --git a/board/cavium/thunderx/Makefile b/board/cavium/thunderx/Makefile new file mode 100644 index 0000000..306044a --- /dev/null +++ b/board/cavium/thunderx/Makefile @@ -0,0 +1,8 @@ +# +# +# (C) Copyright 2014, Cavium Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := thunderx.o diff --git a/board/cavium/thunderx/thunderx.c b/board/cavium/thunderx/thunderx.c new file mode 100644 index 0000000..c478dd7 --- /dev/null +++ b/board/cavium/thunderx/thunderx.c @@ -0,0 +1,86 @@ +/** + * (C) Copyright 2014, Cavium Inc. + * + * SPDX-License-Identifier: GPL-2.0+ +**/ + +#include <common.h> +#include <malloc.h> +#include <errno.h> +#include <linux/compiler.h> + +#include <dm/platdata.h> +#include <dm/platform_data/serial_pl01x.h> + +static const struct pl01x_serial_platdata serial0 = { + .base = CONFIG_SYS_SERIAL0, + .type = TYPE_PL011, + .clock = 0, + .flags = PL0x_PREINITIALIZED, +}; + +U_BOOT_DEVICE(thunderx_serial0) = { + .name = "serial_pl01x", + .platdata = &serial0, +}; + +static const struct pl01x_serial_platdata serial1 = { + .base = CONFIG_SYS_SERIAL1, + .type = TYPE_PL011, + .clock = 0, + .flags = PL0x_PREINITIALIZED, +}; + +U_BOOT_DEVICE(thunderx_serial1) = { + .name = "serial_pl01x", + .platdata = &serial1, +}; + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + /* + * Clear spin table so that secondary processors + * observe the correct value after waken up from wfe. + */ + *(unsigned long *)CPU_RELEASE_ADDR = 0; + + gd->ram_size = PHYS_SDRAM_1_SIZE; + return 0; +} + +int timer_init(void) +{ + return 0; +} + +/* + * Board specific reset that is system reset. + */ +void reset_cpu(ulong addr) +{ +} + +/* + * Board specific ethernet initialization routine. + */ +int board_eth_init(bd_t *bis) +{ + int rc = 0; + + return rc; +} + +#ifdef CONFIG_PCI +void pci_init_board(void) +{ + printf("DEBUG: PCI Init TODO *****\n"); +} +#endif + diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig new file mode 100644 index 0000000..9f97174 --- /dev/null +++ b/configs/thunderx_88xx_defconfig @@ -0,0 +1,28 @@ +CONFIG_SYS_EXTRA_OPTIONS="ARM64" +CONFIG_ARM=y +CONFIG_TARGET_THUNDERX_88XX=y +CONFIG_SYS_PROMPT="ThunderX_88XX> " + +CONFIG_DM=y +CONFIG_DM_SERIAL=y +CONFIG_DM_STDIO=y + +CONFIG_CMD_CACHE=y +CONFIG_CMD_BDI=y +CONFIG_CMD_DIAG=y +CONFIG_CMD_ENV=y +CONFIG_CMD_IMI=y +CONFIG_CMD_MEMORY=y +CONFIG_CMD_RUN=y +CONFIG_CMD_BOOTD=y +CONFIG_CMD_ECHO=y +CONFIG_CMD_SOURCE=y + +CONFIG_CMD_LOADB=y +CONFIG_CMD_LOADS=y +CONFIG_CMD_SAVES=y + +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_IMLS is not set + +CONFIG_CMD_ATF=y diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h new file mode 100644 index 0000000..1973ca5 --- /dev/null +++ b/include/configs/thunderx_88xx.h @@ -0,0 +1,149 @@ +/** + * (C) Copyright 2014, Cavium Inc. + * + * SPDX-License-Identifier: GPL-2.0+ +**/ + +#ifndef __THUNDERX_88XX_H__ +#define __THUNDERX_88XX_H__ + +#define CONFIG_REMAKE_ELF + +/*#define CONFIG_GICV3*/ + +/*#define CONFIG_ARMV8_SWITCH_TO_EL1*/ + +#define CONFIG_SYS_GENERIC_BOARD + +#define CONFIG_SYS_64BIT + +#define CONFIG_SYS_NO_FLASH + +/*#define CONFIG_SUPPORT_RAW_INITRD */ + + +#define CONFIG_IDENT_STRING \ + " for Cavium Thunder CN88XX ARM v8 Multi-Core" +#define CONFIG_BOOTP_VCI_STRING "Diagnostics" + +#define MEM_BASE 0x00500000 + +#define CONFIG_COREID_MASK 0xffffff + +#define CONFIG_SYS_FULL_VA + +#define CONFIG_SYS_MEM_MAP {{0x000000000000UL, 0x40000000000UL, \ + MT_NORMAL}, \ + {0x800000000000UL, 0x40000000000UL, \ + MT_DEVICE_NGNRNE}, \ + {0x840000000000UL, 0x40000000000UL, \ + MT_DEVICE_NGNRNE}, \ + {0xffffffffffffUL, 0xfffffffffffUL, \ + MT_DEVICE_NGNRNE},} + +#define CONFIG_SYS_MEM_MAP_SIZE 3 + +#define CONFIG_SYS_VA_BITS 48 +#define CONFIG_SYS_PTL2_BITS 42 +#define CONFIG_SYS_BLOCK_SHIFT 29 +#define CONFIG_SYS_PTL1_ENTRIES 64 +#define CONFIG_SYS_PTL2_ENTRIES 8192 + +#define CONFIG_SYS_PGTABLE_SIZE \ + ((CONFIG_SYS_PTL1_ENTRIES + \ + CONFIG_SYS_MEM_MAP_SIZE * CONFIG_SYS_PTL2_ENTRIES) * 8) +#define CONFIG_SYS_TCR_EL1_IPS_BITS (5UL << 32) +#define CONFIG_SYS_TCR_EL2_IPS_BITS (5 << 16) +#define CONFIG_SYS_TCR_EL3_IPS_BITS (5 << 16) + +/* Link Definitions */ +#define CONFIG_SYS_TEXT_BASE 0x00500000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) + +/* Flat Device Tree Definitions */ +#define CONFIG_OF_LIBFDT + +/* SMP Spin Table Definitions */ +#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) + + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */ + + +#define CONFIG_SYS_MEMTEST_START MEM_BASE +#define CONFIG_SYS_MEMTEST_END (MEM_BASE + PHYS_SDRAM_1_SIZE) + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) + +/* PL011 Serial Configuration */ + +#define CONFIG_PL01X_SERIAL +#define CONFIG_PL011_CLOCK 24000000 +#define CONFIG_CONS_INDEX 1 + +/* Generic Interrupt Controller Definitions */ +#define GICD_BASE (0x801000000000) +#define GICR_BASE (0x801000002000) +#define CONFIG_SYS_SERIAL0 0x87e024000000 +#define CONFIG_SYS_SERIAL1 0x87e025000000 + +#define CONFIG_BAUDRATE 115200 + +/* Command line configuration */ +#define CONFIG_MENU + +/* BOOTP options */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_PXE +#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LOAD_ADDR (MEM_BASE) + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 + + +/* Initial environment variables */ +#define UBOOT_IMG_HEAD_SIZE 0x40 +/* C80000 - 0x40 */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr=08007ffc0\0" \ + "fdt_addr=0x94C00000\0" \ + "fdt_high=0x9fffffff\0" + +#define CONFIG_BOOTARGS \ + "console=ttyAMA0,115200n8 " \ + "earlycon=pl011,0x87e024000000 " \ + "debug maxcpus=48 rootwait rw "\ + "root=/dev/sda2 coherent_pool=16M" +#define CONFIG_BOOTDELAY 5 + +/* Do not preserve environment */ +#define CONFIG_ENV_IS_NOWHERE 1 +#define CONFIG_ENV_SIZE 0x1000 + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_LONGHELP +#define CONFIG_CMDLINE_EDITING 1 +#define CONFIG_SYS_MAXARGS 64 /* max command args */ +#define CONFIG_NO_RELOCATION 1 +#define CONFIG_LIB_RAND +#define PLL_REF_CLK 50000000 /* 50 MHz */ +#define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK) + +#endif /* __THUNDERX_88XX_H__ */

This commit adds functions issuing calls to the product-specific ATF services

Signed-off-by: Sergey Temerkhanov s.temerkhanov@gmail.com Signed-off-by: Radha Mohan Chintakuntla rchintakuntla@cavium.com ---

Changes in v4: None Changes in v3: None Changes in v2: None

board/cavium/thunderx/Makefile | 2 +- board/cavium/thunderx/atf.c | 312 ++++++++++++++++++++++++++++++++++++++++ include/cavium/atf.h | 22 +++ include/cavium/atf_part.h | 26 ++++ include/cavium/thunderx_svc.h | 67 +++++++++ include/configs/thunderx_88xx.h | 2 + 6 files changed, 430 insertions(+), 1 deletion(-) create mode 100644 board/cavium/thunderx/atf.c create mode 100644 include/cavium/atf.h create mode 100644 include/cavium/atf_part.h create mode 100644 include/cavium/thunderx_svc.h

diff --git a/board/cavium/thunderx/Makefile b/board/cavium/thunderx/Makefile index 306044a..c78c414 100644 --- a/board/cavium/thunderx/Makefile +++ b/board/cavium/thunderx/Makefile @@ -5,4 +5,4 @@ # SPDX-License-Identifier: GPL-2.0+ #

-obj-y := thunderx.o +obj-y := thunderx.o atf.o diff --git a/board/cavium/thunderx/atf.c b/board/cavium/thunderx/atf.c new file mode 100644 index 0000000..6ab9de9 --- /dev/null +++ b/board/cavium/thunderx/atf.c @@ -0,0 +1,312 @@ +/** + * (C) Copyright 2014, Cavium Inc. + * + * SPDX-License-Identifier: GPL-2.0+ +**/ + +#include <common.h> +#include <asm/io.h> + +#include <asm/system.h> +#include <cavium/thunderx_svc.h> +#include <cavium/atf.h> +#include <cavium/atf_part.h> + +#include <asm/psci.h> + +#include <malloc.h> + +DECLARE_GLOBAL_DATA_PTR; + +ssize_t atf_read_mmc(uintptr_t offset, void *buffer, size_t size) +{ + struct pt_regs regs; + regs.regs[0] = THUNDERX_MMC_READ; + regs.regs[1] = offset; + regs.regs[2] = size; + regs.regs[3] = (uintptr_t)buffer; + + smc_call(&regs); + + return regs.regs[0]; +} + +ssize_t atf_read_nor(uintptr_t offset, void *buffer, size_t size) +{ + struct pt_regs regs; + regs.regs[0] = THUNDERX_NOR_READ; + regs.regs[1] = offset; + regs.regs[2] = size; + regs.regs[3] = (uintptr_t)buffer; + + smc_call(&regs); + + return regs.regs[0]; +} + +ssize_t atf_get_pcount(void) +{ + struct pt_regs regs; + regs.regs[0] = THUNDERX_PART_COUNT; + + smc_call(&regs); + + return regs.regs[0]; +} + +ssize_t atf_get_part(struct storage_partition *part, unsigned int index) +{ + struct pt_regs regs; + regs.regs[0] = THUNDERX_GET_PART; + regs.regs[1] = (uintptr_t)part; + regs.regs[2] = index; + + smc_call(&regs); + + return regs.regs[0]; +} + +ssize_t atf_erase_nor(uintptr_t offset, size_t size) +{ + struct pt_regs regs; + + regs.regs[0] = THUNDERX_NOR_ERASE; + regs.regs[1] = offset; + + smc_call(&regs); + + return regs.regs[0]; +} + +ssize_t atf_write_nor(uintptr_t offset, const void *buffer, size_t size) +{ + struct pt_regs regs; + + regs.regs[0] = THUNDERX_NOR_WRITE; + regs.regs[1] = offset; + regs.regs[2] = size; + regs.regs[3] = (uintptr_t)buffer; + + smc_call(&regs); + + return regs.regs[0]; +} + +ssize_t atf_write_mmc(uintptr_t offset, const void *buffer, size_t size) +{ + struct pt_regs regs; + + regs.regs[0] = THUNDERX_MMC_WRITE; + regs.regs[1] = offset; + regs.regs[2] = size; + regs.regs[3] = (uintptr_t)buffer; + + smc_call(&regs); + + return regs.regs[0]; +} + +ssize_t atf_dram_size(unsigned int node) +{ + struct pt_regs regs; + regs.regs[0] = THUNDERX_DRAM_SIZE; + regs.regs[1] = node; + + smc_call(&regs); + + return regs.regs[0]; +} + +ssize_t atf_node_count(void) +{ + struct pt_regs regs; + regs.regs[0] = THUNDERX_NODE_COUNT; + + smc_call(&regs); + + return regs.regs[0]; +} + +ssize_t atf_env_count(void) +{ + struct pt_regs regs; + regs.regs[0] = THUNDERX_ENV_COUNT; + + smc_call(&regs); + + return regs.regs[0]; +} + +ssize_t atf_env_string(size_t index, char *str) +{ + uint64_t *buf = (void *)str; + struct pt_regs regs; + regs.regs[0] = THUNDERX_ENV_STRING; + regs.regs[1] = index; + + smc_call(&regs); + + if (regs.regs > 0) { + buf[0] = regs.regs[0]; + buf[1] = regs.regs[1]; + buf[2] = regs.regs[2]; + buf[3] = regs.regs[3]; + + return 1; + } else { + return regs.regs[0]; + } +} + +#ifdef CONFIG_CMD_ATF + +static void atf_print_ver(void) +{ + struct pt_regs regs; + regs.regs[0] = ARM_STD_SVC_VERSION; + + smc_call(&regs); + + printf("ARM Std FW version: %ld.%ld\n", regs.regs[0], regs.regs[1]); + + regs.regs[0] = THUNDERX_SVC_VERSION; + + smc_call(&regs); + + printf("ThunderX OEM ver: %ld.%ld\n", regs.regs[0], regs.regs[1]); +} + +static void atf_print_uid(void) +{ +} + +static void atf_print_part_table(void) +{ + size_t pcount; + unsigned long i; + int ret; + char *ptype; + + struct storage_partition *part = (void *)CONFIG_SYS_LOWMEM_BASE; + + pcount = atf_get_pcount(); + + printf("Partition count: %lu\n\n", pcount); + printf("%10s %10s %10s\n", "Type", "Size", "Offset"); + + for (i = 0; i < pcount; i++) { + ret = atf_get_part(part, i); + + if (ret < 0) { + printf("Uknown error while reading partition: %d\n", + ret); + return; + } + + switch (part->type) { + case PARTITION_NBL1FW_REST: + ptype = "NBL1FW"; + break; + case PARTITION_BL2_BL31: + ptype = "BL2_BL31"; + break; + case PARTITION_UBOOT: + ptype = "BOOTLDR"; + break; + case PARTITION_KERNEL: + ptype = "KERNEL"; + break; + case PARTITION_DEVICE_TREE: + ptype = "DEVTREE"; + break; + default: + ptype = "UNKNOWN"; + } + printf("%10s %10d %10lx\n", ptype, part->size, part->offset); + } +} + +int do_atf(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + ssize_t ret; + size_t size, offset; + void *buffer = 0; + unsigned int index, node; + char str[4 * sizeof(uint64_t)]; + + if ((argc == 5) && !strcmp(argv[1], "readmmc")) { + buffer = (void *)simple_strtoul(argv[2], NULL, 16); + offset = simple_strtoul(argv[3], NULL, 10); + size = simple_strtoul(argv[4], NULL, 10); + + ret = atf_read_mmc(offset, buffer, size); + } else if ((argc == 5) && !strcmp(argv[1], "readnor")) { + buffer = (void *)simple_strtoul(argv[2], NULL, 16); + offset = simple_strtoul(argv[3], NULL, 10); + size = simple_strtoul(argv[4], NULL, 10); + + ret = atf_read_nor(offset, buffer, size); + } else if ((argc == 5) && !strcmp(argv[1], "writemmc")) { + buffer = (void *)simple_strtoul(argv[2], NULL, 16); + offset = simple_strtoul(argv[3], NULL, 10); + size = simple_strtoul(argv[4], NULL, 10); + + ret = atf_write_mmc(offset, buffer, size); + } else if ((argc == 5) && !strcmp(argv[1], "writenor")) { + buffer = (void *)simple_strtoul(argv[2], NULL, 16); + offset = simple_strtoul(argv[3], NULL, 10); + size = simple_strtoul(argv[4], NULL, 10); + + ret = atf_write_nor(offset, buffer, size); + } else if ((argc == 2) && !strcmp(argv[1], "part")) { + atf_print_part_table(); + } else if ((argc == 4) && !strcmp(argv[1], "erasenor")) { + offset = simple_strtoul(argv[2], NULL, 10); + size = simple_strtoul(argv[3], NULL, 10); + + ret = atf_erase_nor(offset, size); + } else if ((argc == 2) && !strcmp(argv[1], "envcount")) { + ret = atf_env_count(); + printf("Number of environment strings: %zd\n", ret); + } else if ((argc == 3) && !strcmp(argv[1], "envstring")) { + index = simple_strtoul(argv[2], NULL, 10); + ret = atf_env_string(index, str); + if (ret > 0) + printf("Environment string %d: %s\n", index, str); + else + printf("Return code: %zd\n", ret); + } else if ((argc == 3) && !strcmp(argv[1], "dramsize")) { + node = simple_strtoul(argv[2], NULL, 10); + ret = atf_dram_size(node); + printf("DRAM size: %zd Mbytes\n", ret >> 20); + } else if ((argc == 2) && !strcmp(argv[1], "nodes")) { + ret = atf_node_count(); + printf("Nodes count: %zd\n", ret); + } else if ((argc == 2) && !strcmp(argv[1], "ver")) { + atf_print_ver(); + } else if ((argc == 2) && !strcmp(argv[1], "uid")) { + atf_print_uid(); + } else { + return CMD_RET_USAGE; + } + + return 0; +} + +U_BOOT_CMD( + atf, 10, 1, do_atf, + "issue calls to ATF", + "\t readmmc addr offset size - read MMC card\n" + "\t readnor addr offset size - read NOR flash\n" + "\t writemmc addr offset size - write MMC card\n" + "\t writenor addr offset size - write NOR flash\n" + "\t erasenor offset size - erase NOR flash\n" + "\t nodes - number of nodes\n" + "\t dramsize node - size of DRAM attached to node\n" + "\t envcount - number of environment strings\n" + "\t envstring index - print the environment string\n" + "\t part - print MMC partition table\n" + "\t ver - print ATF call set versions\n" +); + +#endif diff --git a/include/cavium/atf.h b/include/cavium/atf.h new file mode 100644 index 0000000..0a53c2f --- /dev/null +++ b/include/cavium/atf.h @@ -0,0 +1,22 @@ +/** + * (C) Copyright 2014, Cavium Inc. + * + * SPDX-License-Identifier: GPL-2.0+ +**/ +#ifndef __ATF_H__ +#define __ATF_H__ +#include <cavium/atf_part.h> + +ssize_t atf_read_mmc(uintptr_t offset, void *buffer, size_t size); +ssize_t atf_read_nor(uintptr_t offset, void *buffer, size_t size); +ssize_t atf_get_pcount(void); +ssize_t atf_get_part(struct storage_partition *part, unsigned int index); +ssize_t atf_erase_nor(uintptr_t offset, size_t size); +ssize_t atf_write_nor(uintptr_t offset, const void *buffer, size_t size); +ssize_t atf_write_mmc(uintptr_t offset, const void *buffer, size_t size); +ssize_t atf_dram_size(unsigned int node); +ssize_t atf_node_count(void); +ssize_t atf_env_count(void); +ssize_t atf_env_string(size_t index, char *str); + +#endif diff --git a/include/cavium/atf_part.h b/include/cavium/atf_part.h new file mode 100644 index 0000000..182f6f4 --- /dev/null +++ b/include/cavium/atf_part.h @@ -0,0 +1,26 @@ +/** + * (C) Copyright 2014, Cavium Inc. + * + * SPDX-License-Identifier: GPL-2.0+ +**/ + +#ifndef __ATF_PART_H__ +#define __ATF_PART_H__ + +struct storage_partition { + unsigned int type; + unsigned int size; + unsigned long offset; +}; + +enum { + PARTITION_NBL1FW_REST = 0, + PARTITION_BL2_BL31 = 1, + PARTITION_UBOOT = 2, + PARTITION_UEFI = 2, + PARTITION_KERNEL = 3, + PARTITION_DEVICE_TREE = 4, + PARTITION_LAST, +}; + +#endif diff --git a/include/cavium/thunderx_svc.h b/include/cavium/thunderx_svc.h new file mode 100644 index 0000000..416ce3c --- /dev/null +++ b/include/cavium/thunderx_svc.h @@ -0,0 +1,67 @@ +/** + * (C) Copyright 2014, Cavium Inc. + * + * SPDX-License-Identifier: GPL-2.0+ +**/ + +#ifndef __THUNDERX_SVC_H__ +#define __THUNDERX_SVC_H__ + +/* SMC function IDs for general purpose queries */ + +#define THUNDERX_SVC_CALL_COUNT 0x4300ff00 +#define THUNDERX_SVC_UID 0x4300ff01 + +#define THUNDERX_SVC_VERSION 0x4300ff03 + +#define ARM_STD_SVC_VERSION 0x8400ff03 + +/* ThunderX Service Calls version numbers */ +#define THUNDERX_VERSION_MAJOR 0x0 +#define THUNDERX_VERSION_MINOR 0x1 + +#define THUNDERX_MMC_READ 0x43000101 +/* x1 - block address + * x2 - size + * x3 - buffer address + */ +#define THUNDERX_MMC_WRITE 0x43000102 +/* x1 - block address + * x2 - size + * x3 - buffer address + */ + +#define THUNDERX_NOR_READ 0x43000111 +/* x1 - block address + * x2 - size + * x3 - buffer address + */ +#define THUNDERX_NOR_WRITE 0x43000112 +/* x1 - block address + * x2 - size + * x3 - buffer address + */ +#define THUNDERX_NOR_ERASE 0x43000113 +/* x1 - block address + */ + +#define THUNDERX_PART_COUNT 0x43000201 +#define THUNDERX_GET_PART 0x43000202 +/* x1 - pointer to the buffer + * x2 - index + */ + +#define THUNDERX_DRAM_SIZE 0x43000301 +/* x1 - node number + */ + +#define THUNDERX_GTI_SYNC 0x43000401 + +#define THUNDERX_ENV_COUNT 0x43000501 +#define THUNDERX_ENV_STRING 0x43000502 +/* x1 - index + */ + +#define THUNDERX_NODE_COUNT 0x43000601 + +#endif /* __THUNDERX_SVC_H__ */ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 1973ca5..6fc92f0 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -32,6 +32,8 @@

#define CONFIG_SYS_FULL_VA

+#define CONFIG_SYS_LOWMEM_BASE MEM_BASE + #define CONFIG_SYS_MEM_MAP {{0x000000000000UL, 0x40000000000UL, \ MT_NORMAL}, \ {0x800000000000UL, 0x40000000000UL, \