[U-Boot] [PATCH] bouncebuf: add feature to support buffer only available in DRAM

Some DMA which inside peripheral controller can only access space in DRAM area, the target address outside DRAM is not available. eg. Rockchip MMC contrller's internal DMA can only access DRAM area.
Add Kconfig option and driver for people who need it.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
common/bouncebuf.c | 9 +++++++++ drivers/mmc/Kconfig | 6 ++++++ 2 files changed, 15 insertions(+)
diff --git a/common/bouncebuf.c b/common/bouncebuf.c index a7098e2caf..7ff2f488a4 100644 --- a/common/bouncebuf.c +++ b/common/bouncebuf.c @@ -10,6 +10,8 @@ #include <errno.h> #include <bouncebuf.h>
+DECLARE_GLOBAL_DATA_PTR; + static int addr_aligned(struct bounce_buffer *state) { const ulong align_mask = ARCH_DMA_MINALIGN - 1; @@ -26,6 +28,13 @@ static int addr_aligned(struct bounce_buffer *state) return 0; }
+#ifdef MMC_BUF_IN_DRAM + if (((ulong)state->user_buffer < CONFIG_SYS_SDRAM_BASE) || + ((ulong)state->user_buffer > gd->ram_top)) { + debug("Not support buffer address %p\n", state->user_buffer); + return 0; + } +#endif /* Aligned */ return 1; } diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..e852ee6175 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs.
+config MMC_BUF_IN_DRAM + bool "Only buffer in DRAM is available" + help + This selects support those controller whose internal DMA can only + access SDRAM spaces and other spaces are not available. + endmenu
config SYS_FSL_ERRATUM_ESDHC111

On Tue, May 7, 2019 at 3:53 PM Kever Yang kever.yang@rock-chips.com wrote:
Some DMA which inside peripheral controller can only access space in DRAM area, the target address outside DRAM is not available. eg. Rockchip MMC contrller's internal DMA can only access DRAM area.
Add Kconfig option and driver for people who need it.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
common/bouncebuf.c | 9 +++++++++ drivers/mmc/Kconfig | 6 ++++++ 2 files changed, 15 insertions(+)
diff --git a/common/bouncebuf.c b/common/bouncebuf.c index a7098e2caf..7ff2f488a4 100644 --- a/common/bouncebuf.c +++ b/common/bouncebuf.c @@ -10,6 +10,8 @@ #include <errno.h> #include <bouncebuf.h>
+DECLARE_GLOBAL_DATA_PTR;
static int addr_aligned(struct bounce_buffer *state) { const ulong align_mask = ARCH_DMA_MINALIGN - 1; @@ -26,6 +28,13 @@ static int addr_aligned(struct bounce_buffer *state) return 0; }
+#ifdef MMC_BUF_IN_DRAM
That again seems misplaced here. Why do we need MMC things in such a central file?
Regards, Simon
if (((ulong)state->user_buffer < CONFIG_SYS_SDRAM_BASE) ||
((ulong)state->user_buffer > gd->ram_top)) {
debug("Not support buffer address %p\n", state->user_buffer);
return 0;
}
+#endif /* Aligned */ return 1; } diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..e852ee6175 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs.
+config MMC_BUF_IN_DRAM
bool "Only buffer in DRAM is available"
help
This selects support those controller whose internal DMA can only
access SDRAM spaces and other spaces are not available.
endmenu
config SYS_FSL_ERRATUM_ESDHC111
2.20.1
U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot

On 07.05.19 15:51, Kever Yang wrote:
Some DMA which inside peripheral controller can only access space in DRAM area, the target address outside DRAM is not available. eg. Rockchip MMC contrller's internal DMA can only access DRAM area.
Add Kconfig option and driver for people who need it.
Hi Kever,
I've addressed this in a different way:
https://lists.denx.de/pipermail/u-boot/2019-May/368307.html https://lists.denx.de/pipermail/u-boot/2019-May/368305.html https://lists.denx.de/pipermail/u-boot/2019-May/368306.html
BR Christoph
Signed-off-by: Kever Yang kever.yang@rock-chips.com
common/bouncebuf.c | 9 +++++++++ drivers/mmc/Kconfig | 6 ++++++ 2 files changed, 15 insertions(+)
diff --git a/common/bouncebuf.c b/common/bouncebuf.c index a7098e2caf..7ff2f488a4 100644 --- a/common/bouncebuf.c +++ b/common/bouncebuf.c @@ -10,6 +10,8 @@ #include <errno.h> #include <bouncebuf.h>
+DECLARE_GLOBAL_DATA_PTR;
static int addr_aligned(struct bounce_buffer *state) { const ulong align_mask = ARCH_DMA_MINALIGN - 1; @@ -26,6 +28,13 @@ static int addr_aligned(struct bounce_buffer *state) return 0; }
+#ifdef MMC_BUF_IN_DRAM
- if (((ulong)state->user_buffer < CONFIG_SYS_SDRAM_BASE) ||
((ulong)state->user_buffer > gd->ram_top)) {
debug("Not support buffer address %p\n", state->user_buffer);
return 0;
- }
+#endif /* Aligned */ return 1; } diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..e852ee6175 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs.
+config MMC_BUF_IN_DRAM
- bool "Only buffer in DRAM is available"
- help
This selects support those controller whose internal DMA can only
access SDRAM spaces and other spaces are not available.
endmenu
config SYS_FSL_ERRATUM_ESDHC111

Hi Kever,
Subject: [PATCH] bouncebuf: add feature to support buffer only available in DRAM
Some DMA which inside peripheral controller can only access space in DRAM area, the target address outside DRAM is not available. eg. Rockchip MMC contrller's internal DMA can only access DRAM area.
Add Kconfig option and driver for people who need it.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
common/bouncebuf.c | 9 +++++++++ drivers/mmc/Kconfig | 6 ++++++ 2 files changed, 15 insertions(+)
diff --git a/common/bouncebuf.c b/common/bouncebuf.c index a7098e2caf..7ff2f488a4 100644 --- a/common/bouncebuf.c +++ b/common/bouncebuf.c @@ -10,6 +10,8 @@ #include <errno.h> #include <bouncebuf.h>
+DECLARE_GLOBAL_DATA_PTR;
static int addr_aligned(struct bounce_buffer *state) { const ulong align_mask = ARCH_DMA_MINALIGN - 1; @@ -26,6 +28,13 @@ static int addr_aligned(struct bounce_buffer *state) return 0; }
+#ifdef MMC_BUF_IN_DRAM
- if (((ulong)state->user_buffer < CONFIG_SYS_SDRAM_BASE) ||
((ulong)state->user_buffer > gd->ram_top)) {
debug("Not support buffer address %p\n", state->user_buffer);
return 0;
- }
+#endif /* Aligned */ return 1; } diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..e852ee6175 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs.
+config MMC_BUF_IN_DRAM
- bool "Only buffer in DRAM is available"
- help
This selects support those controller whose internal DMA can only
access SDRAM spaces and other spaces are not available.
I think introduce a new GEN_BB_FORCE flags might be better, no need to introduce new kconfig entry, and it will be easier for others to use, if there are other controllers has same limitation.
Regards, Peng.
endmenu
config SYS_FSL_ERRATUM_ESDHC111
2.20.1

On 5/8/19 7:26 AM, Peng Fan wrote:
Hi Kever,
Subject: [PATCH] bouncebuf: add feature to support buffer only available in DRAM
Some DMA which inside peripheral controller can only access space in DRAM area, the target address outside DRAM is not available. eg. Rockchip MMC contrller's internal DMA can only access DRAM area.
Add Kconfig option and driver for people who need it.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
common/bouncebuf.c | 9 +++++++++ drivers/mmc/Kconfig | 6 ++++++ 2 files changed, 15 insertions(+)
diff --git a/common/bouncebuf.c b/common/bouncebuf.c index a7098e2caf..7ff2f488a4 100644 --- a/common/bouncebuf.c +++ b/common/bouncebuf.c @@ -10,6 +10,8 @@ #include <errno.h> #include <bouncebuf.h>
+DECLARE_GLOBAL_DATA_PTR;
static int addr_aligned(struct bounce_buffer *state) { const ulong align_mask = ARCH_DMA_MINALIGN - 1; @@ -26,6 +28,13 @@ static int addr_aligned(struct bounce_buffer *state) return 0; }
+#ifdef MMC_BUF_IN_DRAM
- if (((ulong)state->user_buffer < CONFIG_SYS_SDRAM_BASE) ||
((ulong)state->user_buffer > gd->ram_top)) {
debug("Not support buffer address %p\n", state->user_buffer);
return 0;
- }
+#endif /* Aligned */ return 1; } diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..e852ee6175 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs.
+config MMC_BUF_IN_DRAM
- bool "Only buffer in DRAM is available"
- help
This selects support those controller whose internal DMA can only
access SDRAM spaces and other spaces are not available.
I think introduce a new GEN_BB_FORCE flags might be better, no need to introduce new kconfig entry, and it will be easier for others to use, if there are other controllers has same limitation.
Is the bounce buffer really the right place to put per-driver DMA restrictions ?

On 08.05.19 12:52, Marek Vasut wrote:
On 5/8/19 7:26 AM, Peng Fan wrote:
Hi Kever,
Subject: [PATCH] bouncebuf: add feature to support buffer only available in DRAM
Some DMA which inside peripheral controller can only access space in DRAM area, the target address outside DRAM is not available. eg. Rockchip MMC contrller's internal DMA can only access DRAM area.
Add Kconfig option and driver for people who need it.
Signed-off-by: Kever Yang kever.yang@rock-chips.com
common/bouncebuf.c | 9 +++++++++ drivers/mmc/Kconfig | 6 ++++++ 2 files changed, 15 insertions(+)
diff --git a/common/bouncebuf.c b/common/bouncebuf.c index a7098e2caf..7ff2f488a4 100644 --- a/common/bouncebuf.c +++ b/common/bouncebuf.c @@ -10,6 +10,8 @@ #include <errno.h> #include <bouncebuf.h>
+DECLARE_GLOBAL_DATA_PTR;
static int addr_aligned(struct bounce_buffer *state) { const ulong align_mask = ARCH_DMA_MINALIGN - 1; @@ -26,6 +28,13 @@ static int addr_aligned(struct bounce_buffer *state) return 0; }
+#ifdef MMC_BUF_IN_DRAM
- if (((ulong)state->user_buffer < CONFIG_SYS_SDRAM_BASE) ||
((ulong)state->user_buffer > gd->ram_top)) {
debug("Not support buffer address %p\n", state->user_buffer);
return 0;
- }
+#endif /* Aligned */ return 1; } diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c23299ea96..e852ee6175 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -671,6 +671,12 @@ config FSL_ESDHC This selects support for the eSDHC (enhanced secure digital host controller) found on numerous Freescale/NXP SoCs.
+config MMC_BUF_IN_DRAM
- bool "Only buffer in DRAM is available"
- help
This selects support those controller whose internal DMA can only
access SDRAM spaces and other spaces are not available.
I think introduce a new GEN_BB_FORCE flags might be better, no need to introduce new kconfig entry, and it will be easier for others to use, if there are other controllers has same limitation.
Is the bounce buffer really the right place to put per-driver DMA restrictions ?
Also note that this patch addresses the exact same problem, that my bouncebuffer mach_is_dmaable() series tackles.
participants (5)
-
Christoph Müllner
-
Kever Yang
-
Marek Vasut
-
Peng Fan
-
Simon Goldschmidt