[U-Boot] [PATCH 1/2] mx6: Fix reset cause for Power On Reset case
After booting mx6qsabrelite from POR the following is reported:
CPU: Freescale i.MX61 family rev1.0 at 792 MHz Reset cause: unknown reset
This is because both the POR and WDOG bits are set after reset.
Fix this by also checking both bits in the POR case.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- arch/arm/cpu/armv7/imx-common/cpu.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/imx-common/cpu.c b/arch/arm/cpu/armv7/imx-common/cpu.c index 1e30ae5..6d7486b 100644 --- a/arch/arm/cpu/armv7/imx-common/cpu.c +++ b/arch/arm/cpu/armv7/imx-common/cpu.c @@ -44,6 +44,7 @@ static char *get_reset_cause(void)
switch (cause) { case 0x00001: + case 0x00011: return "POR"; case 0x00004: return "CSU";
Remove duplicate definition of ANATOP_BASE_ADDR.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- arch/arm/include/asm/arch-mx6/imx-regs.h | 1 - 1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 6a200bb..5ba5f39 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -115,7 +115,6 @@ #define USB_PHY0_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x49000) #define USB_PHY1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x4a000) #define CCM_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x44000) -#define ANATOP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x48000) #define SNVS_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x4C000) #define EPIT1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x50000) #define EPIT2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x54000)
On 13/03/2012 18:26, Fabio Estevam wrote:
Remove duplicate definition of ANATOP_BASE_ADDR.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
On 13/03/2012 18:26, Fabio Estevam wrote:
After booting mx6qsabrelite from POR the following is reported:
CPU: Freescale i.MX61 family rev1.0 at 792 MHz Reset cause: unknown reset
This is because both the POR and WDOG bits are set after reset.
Fix this by also checking both bits in the POR case.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot-imx, thanks.
Best regards, Stefano Babic
participants (2)
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Fabio Estevam -
Stefano Babic