Use the common config option for extracting the environment for embedding into LDR files and clarify the LDR-specific option.

Signed-off-by: Mike Frysinger vapier@gentoo.org --- Makefile | 2 +- include/asm-blackfin/config.h | 5 +++++ include/configs/bf518f-ezbrd.h | 2 +- include/configs/bf526-ezbrd.h | 2 +- include/configs/bf527-ezkit.h | 2 +- include/configs/bf533-stamp.h | 2 +- include/configs/bf537-minotaur.h | 2 +- include/configs/bf537-pnav.h | 2 +- include/configs/bf537-srv1.h | 2 +- include/configs/bf537-stamp.h | 2 +- include/configs/bf538f-ezkit.h | 2 +- include/configs/bf548-ezkit.h | 4 ++-- include/configs/bf561-ezkit.h | 2 +- include/configs/cm-bf527.h | 2 +- include/configs/cm-bf537e.h | 2 +- include/configs/cm-bf537u.h | 2 +- include/configs/cm-bf548.h | 2 +- include/configs/ibf-dsp561.h | 2 +- include/configs/tcm-bf537.h | 2 +- lib_blackfin/config.mk | 10 +++++++--- 20 files changed, 31 insertions(+), 22 deletions(-)

diff --git a/Makefile b/Makefile index 1abe64a..b7bf110 100644 --- a/Makefile +++ b/Makefile @@ -308,7 +308,7 @@ $(obj)u-boot.bin: $(obj)u-boot $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@

$(obj)u-boot.ldr: $(obj)u-boot - $(obj)tools/envcrc --binary > $(obj)env-ldr.o + $(CREATE_LDR_ENV) $(LDR) -T $(CONFIG_BFIN_CPU) -c $@ $< $(LDR_FLAGS)

$(obj)u-boot.ldr.hex: $(obj)u-boot.ldr diff --git a/include/asm-blackfin/config.h b/include/asm-blackfin/config.h index 327843d..fbfd598 100644 --- a/include/asm-blackfin/config.h +++ b/include/asm-blackfin/config.h @@ -79,6 +79,11 @@ # define CONFIG_ENV_SPI_CS BFIN_BOOT_SPI_SSEL #endif

+/* We need envcrc to embed the env into LDRs */ +#ifdef CONFIG_ENV_IS_EMBEDDED_IN_LDR +# define CONFIG_BUILD_ENVCRC +#endif + /* Default/common Blackfin memory layout */ #ifndef CONFIG_SYS_SDRAM_BASE # define CONFIG_SYS_SDRAM_BASE 0 diff --git a/include/configs/bf518f-ezbrd.h b/include/configs/bf518f-ezbrd.h index 3db8171..4928403 100644 --- a/include/configs/bf518f-ezbrd.h +++ b/include/configs/bf518f-ezbrd.h @@ -109,7 +109,7 @@ #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x2000 #endif -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR

/* diff --git a/include/configs/bf526-ezbrd.h b/include/configs/bf526-ezbrd.h index 97853af..711fa27 100644 --- a/include/configs/bf526-ezbrd.h +++ b/include/configs/bf526-ezbrd.h @@ -126,7 +126,7 @@ #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x2000 #endif -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR

/* diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h index 0d02354..5f3cb83 100644 --- a/include/configs/bf527-ezkit.h +++ b/include/configs/bf527-ezkit.h @@ -125,7 +125,7 @@ #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x2000 #endif -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR

/* diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h index 0006b02..083c030 100644 --- a/include/configs/bf533-stamp.h +++ b/include/configs/bf533-stamp.h @@ -117,7 +117,7 @@ #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) #define ENV_IS_EMBEDDED #else -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #endif #ifdef ENV_IS_EMBEDDED /* WARNING - the following is hand-optimized to fit within diff --git a/include/configs/bf537-minotaur.h b/include/configs/bf537-minotaur.h index 463b7d0..86aa1f6 100644 --- a/include/configs/bf537-minotaur.h +++ b/include/configs/bf537-minotaur.h @@ -115,7 +115,7 @@ #define CONFIG_ENV_OFFSET 0x10000 #define CONFIG_ENV_SIZE 0x10000 #define CONFIG_ENV_SECT_SIZE 0x10000 -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR

/* diff --git a/include/configs/bf537-pnav.h b/include/configs/bf537-pnav.h index 0f908ef..6627a04 100644 --- a/include/configs/bf537-pnav.h +++ b/include/configs/bf537-pnav.h @@ -94,7 +94,7 @@ * Env Storage Settings */ #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_OFFSET 0x4000 #else diff --git a/include/configs/bf537-srv1.h b/include/configs/bf537-srv1.h index 7368629..7e9dd36 100644 --- a/include/configs/bf537-srv1.h +++ b/include/configs/bf537-srv1.h @@ -115,7 +115,7 @@ #define CONFIG_ENV_OFFSET 0x10000 #define CONFIG_ENV_SIZE 0x10000 #define CONFIG_ENV_SECT_SIZE 0x10000 -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR

/* diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index 74b9ecd..017fb45 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -113,7 +113,7 @@ #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) #define ENV_IS_EMBEDDED #else -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #endif #ifdef ENV_IS_EMBEDDED /* WARNING - the following is hand-optimized to fit within diff --git a/include/configs/bf538f-ezkit.h b/include/configs/bf538f-ezkit.h index c4d899d..4ea2300 100644 --- a/include/configs/bf538f-ezkit.h +++ b/include/configs/bf538f-ezkit.h @@ -110,7 +110,7 @@ #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) #define ENV_IS_EMBEDDED #else -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #endif #ifdef ENV_IS_EMBEDDED /* WARNING - the following is hand-optimized to fit within diff --git a/include/configs/bf548-ezkit.h b/include/configs/bf548-ezkit.h index 5b9de16..d0a9e49 100644 --- a/include/configs/bf548-ezkit.h +++ b/include/configs/bf548-ezkit.h @@ -107,7 +107,7 @@ #define CONFIG_ENV_OFFSET 0x10000 #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x10000 -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x40000 @@ -118,7 +118,7 @@ #define CONFIG_ENV_OFFSET 0x2000 #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #endif

diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h index a1fa80b..8ab38bb 100644 --- a/include/configs/bf561-ezkit.h +++ b/include/configs/bf561-ezkit.h @@ -87,7 +87,7 @@ #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) #define ENV_IS_EMBEDDED #else -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #endif #ifdef ENV_IS_EMBEDDED /* WARNING - the following is hand-optimized to fit within diff --git a/include/configs/cm-bf527.h b/include/configs/cm-bf527.h index 1592719..3d41bd1 100644 --- a/include/configs/cm-bf527.h +++ b/include/configs/cm-bf527.h @@ -106,7 +106,7 @@ #define CONFIG_ENV_OFFSET 0x8000 #define CONFIG_ENV_SIZE 0x8000 #define CONFIG_ENV_SECT_SIZE 0x20000 -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR

/* diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h index 34d4299..b243e1a 100644 --- a/include/configs/cm-bf537e.h +++ b/include/configs/cm-bf537e.h @@ -92,7 +92,7 @@ #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) #define ENV_IS_EMBEDDED #else -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #endif #ifdef ENV_IS_EMBEDDED /* WARNING - the following is hand-optimized to fit within diff --git a/include/configs/cm-bf537u.h b/include/configs/cm-bf537u.h index d1870a8..0ed5960 100644 --- a/include/configs/cm-bf537u.h +++ b/include/configs/cm-bf537u.h @@ -96,7 +96,7 @@ #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) #define ENV_IS_EMBEDDED #else -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #endif #ifdef ENV_IS_EMBEDDED /* WARNING - the following is hand-optimized to fit within diff --git a/include/configs/cm-bf548.h b/include/configs/cm-bf548.h index b5cfc21..9630f7d 100644 --- a/include/configs/cm-bf548.h +++ b/include/configs/cm-bf548.h @@ -96,7 +96,7 @@ #define CONFIG_ENV_ADDR 0x20008000 #define CONFIG_ENV_OFFSET 0x8000 #define CONFIG_ENV_SIZE 0x8000 -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR

/* diff --git a/include/configs/ibf-dsp561.h b/include/configs/ibf-dsp561.h index 066859f..7c9f71e 100644 --- a/include/configs/ibf-dsp561.h +++ b/include/configs/ibf-dsp561.h @@ -75,7 +75,7 @@ #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) #define ENV_IS_EMBEDDED #else -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #endif #ifdef ENV_IS_EMBEDDED /* WARNING - the following is hand-optimized to fit within diff --git a/include/configs/tcm-bf537.h b/include/configs/tcm-bf537.h index 9794e1b..9615ced 100644 --- a/include/configs/tcm-bf537.h +++ b/include/configs/tcm-bf537.h @@ -93,7 +93,7 @@ #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) #define ENV_IS_EMBEDDED #else -#define ENV_IS_EMBEDDED_CUSTOM +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR #endif #ifdef ENV_IS_EMBEDDED /* WARNING - the following is hand-optimized to fit within diff --git a/lib_blackfin/config.mk b/lib_blackfin/config.mk index ce2fe67..323d28f 100644 --- a/lib_blackfin/config.mk +++ b/lib_blackfin/config.mk @@ -43,6 +43,11 @@ endif ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_BYPASS) ALL += $(obj)u-boot.ldr endif +ifeq ($(CONFIG_ENV_IS_EMBEDDED_IN_LDR),y) +CREATE_LDR_ENV = $(obj)tools/envcrc --binary > $(obj)env-ldr.o +else +CREATE_LDR_ENV = +endif

SYM_PREFIX = _

@@ -53,9 +58,8 @@ LDR_FLAGS += --bmode $(subst BFIN_BOOT_,,$(CONFIG_BFIN_BOOT_MODE)) LDR_FLAGS += --use-vmas LDR_FLAGS += --initcode $(obj)cpu/$(CPU)/initcode.o ifneq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_UART) -ifneq ($(ENV_IS_EMBEDDED_CUSTOM),ENV_IS_EMBEDDED_CUSTOM) -LDR_FLAGS += --punchit $$(($(CONFIG_ENV_OFFSET))):$$(($(CONFIG_ENV_SIZE))):$(obj)env-ldr.o -endif +LDR_FLAGS-$(CONFIG_ENV_IS_EMBEDDED_IN_LDR) += \ + --punchit $$(($(CONFIG_ENV_OFFSET))):$$(($(CONFIG_ENV_SIZE))):$(obj)env-ldr.o endif ifneq (,$(findstring s,$(MAKEFLAGS))) LDR_FLAGS += --quiet

Signed-off-by: Mike Frysinger vapier@gentoo.org --- include/configs/bf537-stamp.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index 017fb45..de2add7 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -145,7 +145,7 @@ * SPI_MMC Settings */ #define CONFIG_MMC -#define CONFIG_BFIN_SPI_MMC +#define CONFIG_SPI_MMC

/*

From: Valentin Yakovenkov yakovenkov@niistt.ru

Signed-off-by: Valentin Yakovenkov yakovenkov@niistt.ru Signed-off-by: Mike Frysinger vapier@gentoo.org --- MAINTAINERS | 5 + MAKEALL | 1 + Makefile | 2 +- board/bf561-acvilon/Makefile | 56 +++++++++++ board/bf561-acvilon/bf561-acvilon.c | 58 +++++++++++ board/bf561-acvilon/config.mk | 34 +++++++ include/configs/bf561-acvilon.h | 178 +++++++++++++++++++++++++++++++++++ 7 files changed, 333 insertions(+), 1 deletions(-) create mode 100644 board/bf561-acvilon/Makefile create mode 100644 board/bf561-acvilon/bf561-acvilon.c create mode 100644 board/bf561-acvilon/config.mk create mode 100644 include/configs/bf561-acvilon.h

diff --git a/MAINTAINERS b/MAINTAINERS index 48db504..f433cdd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -978,6 +978,11 @@ Blackfin Team u-boot-devel@blackfin.uclinux.org

IBF-DSP561 BF561

+Valentin Yakovenkov yakovenkov@niistt.ru +Anton Shurpin shurpin.aa@niistt.ru + + BF561-ACVILON BF561 + ######################################################################### # End of MAINTAINERS list # ######################################################################### diff --git a/MAKEALL b/MAKEALL index a6d0f20..cee1e1d 100755 --- a/MAKEALL +++ b/MAKEALL @@ -879,6 +879,7 @@ LIST_blackfin=" \ bf537-stamp \ bf538f-ezkit \ bf548-ezkit \ + bf561-acvilon \ bf561-ezkit \ blackstamp \ cm-bf527 \ diff --git a/Makefile b/Makefile index b7bf110..aac6a19 100644 --- a/Makefile +++ b/Makefile @@ -3531,7 +3531,7 @@ BFIN_BOARDS = bf518f-ezbrd bf526-ezbrd bf527-ezkit bf533-ezkit bf533-stamp \ BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf537u cm-bf548 cm-bf561 tcm-bf537

# Misc third party boards -BFIN_BOARDS += bf537-minotaur bf537-srv1 blackstamp +BFIN_BOARDS += bf537-minotaur bf537-srv1 bf561-acvilon blackstamp

# I-SYST Micromodule BFIN_BOARDS += ibf-dsp561 diff --git a/board/bf561-acvilon/Makefile b/board/bf561-acvilon/Makefile new file mode 100644 index 0000000..cc039a0 --- /dev/null +++ b/board/bf561-acvilon/Makefile @@ -0,0 +1,56 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2007 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2009 CJSC "NII STT", Russia, Smolensk +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/bf561-acvilon/bf561-acvilon.c b/board/bf561-acvilon/bf561-acvilon.c new file mode 100644 index 0000000..58a2768 --- /dev/null +++ b/board/bf561-acvilon/bf561-acvilon.c @@ -0,0 +1,58 @@ +/* + * File: board/bf561-acvilon/bf561-acvilon.c + * Based on: board/bf561-ezkit/bf561-ezkit.c + * Author: + * + * Created: 2009-06-23 + * Description: Acvilon System On Module board file + * + * Modified: + * Copyright 2009 CJSC "NII STT", http://www.niistt.ru/ + * Copyright (c) 2005-2008 Analog Devices Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * Bugs: + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <common.h> +#include <netdev.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: CJSC "NII STT"-=Acvilon Platform=- [U-Boot]\n"); + printf(" Support: http://www.niistt.ru/%5Cn"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#ifdef CONFIG_SMC911X +int board_eth_init(bd_t *bis) +{ + return smc911x_initialize(0, CONFIG_SMC911X_BASE); +} +#endif diff --git a/board/bf561-acvilon/config.mk b/board/bf561-acvilon/config.mk new file mode 100644 index 0000000..cfad21a --- /dev/null +++ b/board/bf561-acvilon/config.mk @@ -0,0 +1,34 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +CFLAGS_lib_generic += -O2 +CFLAGS_lzma += -O2 + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/include/configs/bf561-acvilon.h b/include/configs/bf561-acvilon.h new file mode 100644 index 0000000..0be170c --- /dev/null +++ b/include/configs/bf561-acvilon.h @@ -0,0 +1,178 @@ +/* + * U-boot - Configuration file for BF561 Acvilon System On Module + * For more information please go to http://www.niistt.ru/ + */ + +#ifndef __CONFIG_BF561_ACVILON_H__ +#define __CONFIG_BF561_ACVILON_H__ + +#include <asm/config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf561-0.5 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 12000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 50 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 5 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 10 +#define CONFIG_MEM_SIZE 128 + +#define CONFIG_EBIU_SDRRC_VAL 0x300 +#define CONFIG_EBIU_SDGCTL_VAL 0x00B11189 + +#define CONFIG_EBIU_AMGCTL_VAL 0x4e +#define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2 +#define CONFIG_EBIU_AMBCTL1_VAL 0x99b35554 + +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) + + +/* + * RTC Settings + */ +#define CONFIG_RTC_DS1337 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 + +/* I2C SYSMON (LM75, AD7414 is almost compatible) */ +#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */ +#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */ +#define CONFIG_SYS_I2C_DTT_ADDR 0x49 +/*#define CONFIG_SYS_DTT_MAX_TEMP 70 +#define CONFIG_SYS_DTT_LOW_TEMP -30 +#define CONFIG_SYS_DTT_HYSTERESIS 3*/ + + +/* + * Network Settings + */ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_NET_MULTI +#define CONFIG_CMD_NET +#define CONFIG_CMD_MII +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DTT + +#if defined(CONFIG_CMD_NET) + +#define CONFIG_SMC911X 1 +#define CONFIG_SMC911X_32_BIT +/* #define CONFIG_SMC911X_16_BIT */ +#define CONFIG_SMC911X_BASE 0x28000000 + +#endif /* (CONFIG_CMD_NET) */ + +#define CONFIG_HOSTNAME bf561-acvilon + +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_SYS_NO_FLASH + + +/* + * I2C Settings + */ +#define CONFIG_HARD_I2C +/* Use 300kHz speed by default */ +#define CONFIG_SYS_I2C_SPEED 0x00 +#define CONFIG_PCA9564_I2C +#define CONFIG_PCA9564_BASE 0x2c000000 + + +/* + * SPI Settings + */ +#define CONFIG_BFIN_SPI +#define CONFIG_ENV_SPI_MAX_HZ 10000000 +#define CONFIG_SF_DEFAULT_SPEED 10000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL + + +/* + * Env Storage Settings + */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +/* #define CONFIG_CMD_SAVEENV */ +#define CONFIG_ENV_SECT_SIZE (1056 * 8) +#define CONFIG_ENV_OFFSET ((16 + 256) * 1056) +#define CONFIG_ENV_SIZE (8 * 1056) +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) + + +/* + * NAND Settings + * We're using NAND_PLAT driver to make things simplier + */ +#define CONFIG_NAND_PLAT +#define CONFIG_CMD_NAND +#define CONFIG_SYS_NAND_BASE 0x24000000 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 + +#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2)) +#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 3)) +#define BFIN_NAND_READY PF10 +#define BFIN_NAND_WRITE(addr, cmd) \ + do { \ + bfin_write8(addr, cmd); \ + SSYNC(); \ + } while (0) + +#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd) +#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) +#define NAND_PLAT_DEV_READY(chip) (bfin_read_FIO0_FLAG_D() & BFIN_NAND_READY) +#define NAND_PLAT_INIT() \ + do { \ + bfin_write_FIO0_DIR(bfin_read_FIO0_DIR() & ~BFIN_NAND_READY); \ + bfin_write_FIO0_INEN(bfin_read_FIO0_INEN() | BFIN_NAND_READY); \ + } while (0) + + +/* + * Misc Settings + */ +#define CONFIG_UART_CONSOLE 0 +#define CONFIG_BAUDRATE 57600 +#define CONFIG_SYS_PROMPT "Acvilon> " + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#endif /* __CONFIG_BF561_ACVILON_H__ */

While the initdram() function makes sense on some arches, it doesn't for Blackfin systems as it's always implemented the same way.

Signed-off-by: Mike Frysinger vapier@gentoo.org --- board/bf518f-ezbrd/bf518f-ezbrd.c | 7 ------- board/bf526-ezbrd/bf526-ezbrd.c | 7 ------- board/bf527-ezkit/bf527-ezkit.c | 7 ------- board/bf533-ezkit/bf533-ezkit.c | 7 ------- board/bf533-stamp/bf533-stamp.c | 7 ------- board/bf537-minotaur/bf537-minotaur.c | 7 ------- board/bf537-pnav/bf537-pnav.c | 7 ------- board/bf537-srv1/bf537-srv1.c | 7 ------- board/bf537-stamp/bf537-stamp.c | 7 ------- board/bf538f-ezkit/bf538f-ezkit.c | 7 ------- board/bf548-ezkit/bf548-ezkit.c | 7 ------- board/bf561-acvilon/bf561-acvilon.c | 7 ------- board/bf561-ezkit/bf561-ezkit.c | 7 ------- board/blackstamp/blackstamp.c | 7 ------- board/cm-bf527/cm-bf527.c | 7 ------- board/cm-bf533/cm-bf533.c | 7 ------- board/cm-bf537e/cm-bf537e.c | 7 ------- board/cm-bf537u/cm-bf537u.c | 7 ------- board/cm-bf548/cm-bf548.c | 7 ------- board/cm-bf561/cm-bf561.c | 7 ------- board/ibf-dsp561/ibf-dsp561.c | 7 ------- board/tcm-bf537/tcm-bf537.c | 7 ------- lib_blackfin/board.c | 4 +++- 23 files changed, 3 insertions(+), 155 deletions(-)

diff --git a/board/bf518f-ezbrd/bf518f-ezbrd.c b/board/bf518f-ezbrd/bf518f-ezbrd.c index 63be7cf..279c55c 100644 --- a/board/bf518f-ezbrd/bf518f-ezbrd.c +++ b/board/bf518f-ezbrd/bf518f-ezbrd.c @@ -25,13 +25,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #if defined(CONFIG_BFIN_MAC) static void board_init_enetaddr(uchar *mac_addr) { diff --git a/board/bf526-ezbrd/bf526-ezbrd.c b/board/bf526-ezbrd/bf526-ezbrd.c index 1666bf6..52d82cd 100644 --- a/board/bf526-ezbrd/bf526-ezbrd.c +++ b/board/bf526-ezbrd/bf526-ezbrd.c @@ -24,13 +24,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_BFIN_MAC static void board_init_enetaddr(uchar *mac_addr) { diff --git a/board/bf527-ezkit/bf527-ezkit.c b/board/bf527-ezkit/bf527-ezkit.c index 2cbfa8d..a880066 100644 --- a/board/bf527-ezkit/bf527-ezkit.c +++ b/board/bf527-ezkit/bf527-ezkit.c @@ -24,13 +24,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_BFIN_MAC static void board_init_enetaddr(uchar *mac_addr) { diff --git a/board/bf533-ezkit/bf533-ezkit.c b/board/bf533-ezkit/bf533-ezkit.c index 8727dee..b1aa7b7 100644 --- a/board/bf533-ezkit/bf533-ezkit.c +++ b/board/bf533-ezkit/bf533-ezkit.c @@ -39,13 +39,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - /* miscellaneous platform dependent initialisations */ int misc_init_r(void) { diff --git a/board/bf533-stamp/bf533-stamp.c b/board/bf533-stamp/bf533-stamp.c index a226910..7a63c52 100644 --- a/board/bf533-stamp/bf533-stamp.c +++ b/board/bf533-stamp/bf533-stamp.c @@ -39,13 +39,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - /* PF0 and PF1 are used to switch between the ethernet and flash: * PF0 PF1 * flash: 0 0 diff --git a/board/bf537-minotaur/bf537-minotaur.c b/board/bf537-minotaur/bf537-minotaur.c index 71b452a..920429c 100644 --- a/board/bf537-minotaur/bf537-minotaur.c +++ b/board/bf537-minotaur/bf537-minotaur.c @@ -23,13 +23,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_BFIN_MAC static void board_init_enetaddr(uchar *mac_addr) { diff --git a/board/bf537-pnav/bf537-pnav.c b/board/bf537-pnav/bf537-pnav.c index 12cfefa..c512528 100644 --- a/board/bf537-pnav/bf537-pnav.c +++ b/board/bf537-pnav/bf537-pnav.c @@ -23,13 +23,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_BFIN_MAC static void board_init_enetaddr(uchar *mac_addr) { diff --git a/board/bf537-srv1/bf537-srv1.c b/board/bf537-srv1/bf537-srv1.c index 5ad39cc..04d3891 100644 --- a/board/bf537-srv1/bf537-srv1.c +++ b/board/bf537-srv1/bf537-srv1.c @@ -23,13 +23,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_BFIN_MAC static void board_init_enetaddr(uchar *mac_addr) { diff --git a/board/bf537-stamp/bf537-stamp.c b/board/bf537-stamp/bf537-stamp.c index 28597c9..3911be6 100644 --- a/board/bf537-stamp/bf537-stamp.c +++ b/board/bf537-stamp/bf537-stamp.c @@ -43,13 +43,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - void board_reset(void) { /* workaround for weak pull ups on ssel */ diff --git a/board/bf538f-ezkit/bf538f-ezkit.c b/board/bf538f-ezkit/bf538f-ezkit.c index 15916fa..49d30e7 100644 --- a/board/bf538f-ezkit/bf538f-ezkit.c +++ b/board/bf538f-ezkit/bf538f-ezkit.c @@ -20,13 +20,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_SMC91111 int board_eth_init(bd_t *bis) { diff --git a/board/bf548-ezkit/bf548-ezkit.c b/board/bf548-ezkit/bf548-ezkit.c index 88a0cd4..29c2e92 100644 --- a/board/bf548-ezkit/bf548-ezkit.c +++ b/board/bf548-ezkit/bf548-ezkit.c @@ -21,13 +21,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - int board_early_init_f(void) { /* Port H: PH8 - PH13 == A4 - A9 diff --git a/board/bf561-acvilon/bf561-acvilon.c b/board/bf561-acvilon/bf561-acvilon.c index 58a2768..483758e 100644 --- a/board/bf561-acvilon/bf561-acvilon.c +++ b/board/bf561-acvilon/bf561-acvilon.c @@ -43,13 +43,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_SMC911X int board_eth_init(bd_t *bis) { diff --git a/board/bf561-ezkit/bf561-ezkit.c b/board/bf561-ezkit/bf561-ezkit.c index e5d7eb3..b2411b6 100644 --- a/board/bf561-ezkit/bf561-ezkit.c +++ b/board/bf561-ezkit/bf561-ezkit.c @@ -38,13 +38,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_SMC91111 int board_eth_init(bd_t *bis) { diff --git a/board/blackstamp/blackstamp.c b/board/blackstamp/blackstamp.c index f55ab97..6355c10 100644 --- a/board/blackstamp/blackstamp.c +++ b/board/blackstamp/blackstamp.c @@ -24,13 +24,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef SHARED_RESOURCES void swap_to(int device_id) { diff --git a/board/cm-bf527/cm-bf527.c b/board/cm-bf527/cm-bf527.c index db1cf90..b6815b1 100644 --- a/board/cm-bf527/cm-bf527.c +++ b/board/cm-bf527/cm-bf527.c @@ -24,13 +24,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_BFIN_MAC static void board_init_enetaddr(uchar *mac_addr) { diff --git a/board/cm-bf533/cm-bf533.c b/board/cm-bf533/cm-bf533.c index ab0bf3b..a863195 100644 --- a/board/cm-bf533/cm-bf533.c +++ b/board/cm-bf533/cm-bf533.c @@ -18,13 +18,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_SMC91111 int board_eth_init(bd_t *bis) { diff --git a/board/cm-bf537e/cm-bf537e.c b/board/cm-bf537e/cm-bf537e.c index d1ca0a4..1e350dc 100644 --- a/board/cm-bf537e/cm-bf537e.c +++ b/board/cm-bf537e/cm-bf537e.c @@ -24,13 +24,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_BFIN_MAC static void board_init_enetaddr(uchar *mac_addr) { diff --git a/board/cm-bf537u/cm-bf537u.c b/board/cm-bf537u/cm-bf537u.c index 9628e0f..92fa5a0 100644 --- a/board/cm-bf537u/cm-bf537u.c +++ b/board/cm-bf537u/cm-bf537u.c @@ -24,13 +24,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_BFIN_MAC static void board_init_enetaddr(uchar *mac_addr) { diff --git a/board/cm-bf548/cm-bf548.c b/board/cm-bf548/cm-bf548.c index 796263d..3627586 100644 --- a/board/cm-bf548/cm-bf548.c +++ b/board/cm-bf548/cm-bf548.c @@ -21,13 +21,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - int board_early_init_f(void) { /* Port H: PH8 - PH13 == A4 - A9 diff --git a/board/cm-bf561/cm-bf561.c b/board/cm-bf561/cm-bf561.c index f21a015..80cfff7 100644 --- a/board/cm-bf561/cm-bf561.c +++ b/board/cm-bf561/cm-bf561.c @@ -18,13 +18,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_SMC91111 int board_eth_init(bd_t *bis) { diff --git a/board/ibf-dsp561/ibf-dsp561.c b/board/ibf-dsp561/ibf-dsp561.c index 551fc29..b5bebd4 100644 --- a/board/ibf-dsp561/ibf-dsp561.c +++ b/board/ibf-dsp561/ibf-dsp561.c @@ -16,10 +16,3 @@ int checkboard(void) printf(" Support: http://www.i-syst.com/%5Cn"); return 0; } - -phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} diff --git a/board/tcm-bf537/tcm-bf537.c b/board/tcm-bf537/tcm-bf537.c index 573387d..60742df 100644 --- a/board/tcm-bf537/tcm-bf537.c +++ b/board/tcm-bf537/tcm-bf537.c @@ -24,13 +24,6 @@ int checkboard(void) return 0; }

-phys_size_t initdram(int board_type) -{ - gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; - return gd->bd->bi_memsize; -} - #ifdef CONFIG_BFIN_MAC static void board_init_enetaddr(uchar *mac_addr) { diff --git a/lib_blackfin/board.c b/lib_blackfin/board.c index 6cade7d..b414b2a 100644 --- a/lib_blackfin/board.c +++ b/lib_blackfin/board.c @@ -239,6 +239,8 @@ void board_init_f(ulong bootflag) bd->bi_vco = get_vco(); bd->bi_cclk = get_cclk(); bd->bi_sclk = get_sclk(); + bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;

/* Initialize */ serial_early_puts("IRQ init\n"); @@ -262,7 +264,7 @@ void board_init_f(ulong bootflag) printf("System: %s MHz\n", strmhz(buf, get_sclk()));

printf("RAM: "); - print_size(initdram(0), "\n"); + print_size(bd->bi_memsize, "\n"); #if defined(CONFIG_POST) post_init_f(); post_bootmode_init();

The single initcode function was growing unwieldy, so split it up the distinct steps into their own function. This should making digesting the result much easier on people.

Signed-off-by: Mike Frysinger vapier@gentoo.org --- cpu/blackfin/initcode.c | 221 ++++++++++++++++++++++++++++++++++++----------- 1 files changed, 169 insertions(+), 52 deletions(-)

diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c index a039cbb..bb58898 100644 --- a/cpu/blackfin/initcode.c +++ b/cpu/blackfin/initcode.c @@ -9,6 +9,8 @@ * Licensed under the GPL-2 or later. */

+#define BFIN_IN_INITCODE + #include <config.h> #include <asm/blackfin.h> #include <asm/mach-common/bits/bootrom.h> @@ -17,7 +19,6 @@ #include <asm/mach-common/bits/pll.h> #include <asm/mach-common/bits/uart.h>

-#define BFIN_IN_INITCODE #include "serial.h"

__attribute__((always_inline)) @@ -213,6 +214,7 @@ static inline void serial_putc(char c) # define CONFIG_HAS_VR 1 #endif

+#if CONFIG_MEM_SIZE #ifndef EBIU_RSTCTL /* Blackfin with SDRAM */ #ifndef CONFIG_EBIU_SDBCTL_VAL @@ -245,6 +247,7 @@ static inline void serial_putc(char c) # define CONFIG_EBIU_SDBCTL_VAL (CONFIG_EBCAW_VAL | CONFIG_EBSZ_VAL | EBE) #endif #endif +#endif

/* Conflicting Column Address Widths Causes SDRAM Errors: * EB2CAW and EB3CAW must be the same @@ -255,28 +258,21 @@ static inline void serial_putc(char c) # endif #endif

-BOOTROM_CALLED_FUNC_ATTR -void initcode(ADI_BOOT_DATA *bootstruct) +__attribute__((always_inline)) static inline void +program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint *divB, uint *vcoB) { - ADI_BOOT_DATA bootstruct_scratch; + serial_putc('a');

/* Save the clock pieces that are used in baud rate calculation */ - unsigned int sdivB, divB, vcoB; - serial_init(); if (BFIN_DEBUG_EARLY_SERIAL || CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) { - sdivB = bfin_read_PLL_DIV() & 0xf; - vcoB = (bfin_read_PLL_CTL() >> 9) & 0x3f; - divB = serial_early_get_div(); + serial_putc('b'); + *sdivB = bfin_read_PLL_DIV() & 0xf; + *vcoB = (bfin_read_PLL_CTL() >> 9) & 0x3f; + *divB = serial_early_get_div(); + serial_putc('c'); }

- serial_putc('A'); - - /* If the bootstruct is NULL, then it's because we're loading - * dynamically and not via LDR (bootrom). So set the struct to - * some scratch space. - */ - if (!bootstruct) - bootstruct = &bootstruct_scratch; + serial_putc('d');

#ifdef CONFIG_HW_WATCHDOG # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE @@ -289,41 +285,69 @@ void initcode(ADI_BOOT_DATA *bootstruct) * timeout, so don't clobber that. */ if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) { + serial_putc('e'); bfin_write_WDOG_CNT(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE)); bfin_write_WDOG_CTL(0); + serial_putc('f'); } #endif

- serial_putc('B'); + serial_putc('g'); + + /* Blackfin bootroms use the SPI slow read opcode instead of the SPI + * fast read, so we need to slow down the SPI clock a lot more during + * boot. Once we switch over to u-boot's SPI flash driver, we'll + * increase the speed appropriately. + */ + if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) { + serial_putc('h'); + if (BOOTROM_SUPPORTS_SPI_FAST_READ && CONFIG_SPI_BAUD_INITBLOCK < 4) + bs->dFlags |= BFLAG_FASTREAD; + bfin_write_SPI_BAUD(CONFIG_SPI_BAUD_INITBLOCK); + serial_putc('i'); + } + + serial_putc('j'); +} + +__attribute__((always_inline)) static inline bool +maybe_self_refresh(ADI_BOOT_DATA *bs) +{ + serial_putc('a'); + + if (!CONFIG_MEM_SIZE) + return false;

/* If external memory is enabled, put it into self refresh first. */ - bool put_into_srfs = false; #ifdef EBIU_RSTCTL if (bfin_read_EBIU_RSTCTL() & DDR_SRESET) { + serial_putc('b'); bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() | SRREQ); - put_into_srfs = true; + return true; } #else if (bfin_read_EBIU_SDBCTL() & EBE) { + serial_putc('b'); bfin_write_EBIU_SDGCTL(bfin_read_EBIU_SDGCTL() | SRFS); - put_into_srfs = true; + return true; } #endif

- serial_putc('C'); + serial_putc('c');

- /* Blackfin bootroms use the SPI slow read opcode instead of the SPI - * fast read, so we need to slow down the SPI clock a lot more during - * boot. Once we switch over to u-boot's SPI flash driver, we'll - * increase the speed appropriately. - */ - if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) { - if (BOOTROM_SUPPORTS_SPI_FAST_READ && CONFIG_SPI_BAUD_INITBLOCK < 4) - bootstruct->dFlags |= BFLAG_FASTREAD; - bfin_write_SPI_BAUD(CONFIG_SPI_BAUD_INITBLOCK); - } + return false; +}

- serial_putc('D'); +__attribute__((always_inline)) static inline u16 +program_clocks(ADI_BOOT_DATA *bs, bool put_into_srfs) +{ + u16 vr_ctl; + + serial_putc('a'); + + vr_ctl = bfin_read_VR_CTL(); + + serial_putc('b');

/* If we're entering self refresh, make sure it has happened. */ if (put_into_srfs) @@ -334,15 +358,14 @@ void initcode(ADI_BOOT_DATA *bootstruct) #endif continue;

- serial_putc('E'); + serial_putc('c');

/* With newer bootroms, we use the helper function to set up * the memory controller. Older bootroms lacks such helpers * so we do it ourselves. */ - uint16_t vr_ctl = bfin_read_VR_CTL(); if (!ANOMALY_05000386) { - serial_putc('F'); + serial_putc('d');

/* Always programming PLL_LOCKCNT avoids Anomaly 05000430 */ ADI_SYSCTRL_VALUES memory_settings; @@ -362,7 +385,9 @@ void initcode(ADI_BOOT_DATA *bootstruct) #if ANOMALY_05000432 bfin_write_SIC_IWR1(0); #endif + serial_putc('e'); bfrom_SysControl(actions, &memory_settings, NULL); + serial_putc('f'); #if ANOMALY_05000432 bfin_write_SIC_IWR1(-1); #endif @@ -370,8 +395,9 @@ void initcode(ADI_BOOT_DATA *bootstruct) bfin_write_SICA_IWR0(-1); bfin_write_SICA_IWR1(-1); #endif + serial_putc('g'); } else { - serial_putc('G'); + serial_putc('h');

/* Disable all peripheral wakeups except for the PLL event. */ #ifdef SIC_IWR0 @@ -387,38 +413,40 @@ void initcode(ADI_BOOT_DATA *bootstruct) bfin_write_SIC_IWR(1); #endif

- serial_putc('H'); + serial_putc('i');

/* Always programming PLL_LOCKCNT avoids Anomaly 05000430 */ bfin_write_PLL_LOCKCNT(CONFIG_PLL_LOCKCNT_VAL);

- serial_putc('I'); + serial_putc('j');

/* Only reprogram when needed to avoid triggering unnecessary * PLL relock sequences. */ if (vr_ctl != CONFIG_VR_CTL_VAL) { - serial_putc('!'); + serial_putc('?'); bfin_write_VR_CTL(CONFIG_VR_CTL_VAL); asm("idle;"); + serial_putc('!'); }

- serial_putc('J'); + serial_putc('k');

bfin_write_PLL_DIV(CONFIG_PLL_DIV_VAL);

- serial_putc('K'); + serial_putc('l');

/* Only reprogram when needed to avoid triggering unnecessary * PLL relock sequences. */ if (ANOMALY_05000242 || bfin_read_PLL_CTL() != CONFIG_PLL_CTL_VAL) { - serial_putc('!'); + serial_putc('?'); bfin_write_PLL_CTL(CONFIG_PLL_CTL_VAL); asm("idle;"); + serial_putc('!'); }

- serial_putc('L'); + serial_putc('m');

/* Restore all peripheral wakeups. */ #ifdef SIC_IWR0 @@ -433,9 +461,19 @@ void initcode(ADI_BOOT_DATA *bootstruct) #else bfin_write_SIC_IWR(-1); #endif + + serial_putc('n'); }

- serial_putc('M'); + serial_putc('o'); + + return vr_ctl; +} + +__attribute__((always_inline)) static inline void +update_serial_clocks(ADI_BOOT_DATA *bs, uint sdivB, uint divB, uint vcoB) +{ + serial_putc('a');

/* Since we've changed the SCLK above, we may need to update * the UART divisors (UART baud rates are based on SCLK). @@ -443,6 +481,7 @@ void initcode(ADI_BOOT_DATA *bootstruct) * for dividing which means we'd generate a libgcc reference. */ if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_UART) { + serial_putc('b'); unsigned int sdivR, vcoR; sdivR = bfin_read_PLL_DIV() & 0xf; vcoR = (bfin_read_PLL_CTL() >> 9) & 0x3f; @@ -452,20 +491,38 @@ void initcode(ADI_BOOT_DATA *bootstruct) for (quotient = 0; dividend > 0; ++quotient) dividend -= divisor; serial_early_put_div(quotient - ANOMALY_05000230); + serial_putc('c'); }

- serial_putc('N'); + serial_putc('d'); +} + +__attribute__((always_inline)) static inline void +program_memory_controller(ADI_BOOT_DATA *bs, bool put_into_srfs) +{ + serial_putc('a'); + + if (!CONFIG_MEM_SIZE) + return; + + serial_putc('b');

/* Program the external memory controller before we come out of * self-refresh. This only works with our SDRAM controller. */ #ifndef EBIU_RSTCTL +# ifdef CONFIG_EBIU_SDRRC_VAL bfin_write_EBIU_SDRRC(CONFIG_EBIU_SDRRC_VAL); +# endif +# ifdef CONFIG_EBIU_SDBCTL_VAL bfin_write_EBIU_SDBCTL(CONFIG_EBIU_SDBCTL_VAL); +# endif +# ifdef CONFIG_EBIU_SDGCTL_VAL bfin_write_EBIU_SDGCTL(CONFIG_EBIU_SDGCTL_VAL); +# endif #endif

- serial_putc('O'); + serial_putc('c');

/* Now that we've reprogrammed, take things out of self refresh. */ if (put_into_srfs) @@ -475,7 +532,7 @@ void initcode(ADI_BOOT_DATA *bootstruct) bfin_write_EBIU_SDGCTL(bfin_read_EBIU_SDGCTL() & ~(SRFS)); #endif

- serial_putc('P'); + serial_putc('d');

/* Our DDR controller sucks and cannot be programmed while in * self-refresh. So we have to pull it out before programming. @@ -494,7 +551,18 @@ void initcode(ADI_BOOT_DATA *bootstruct) # endif #endif

- serial_putc('Q'); + serial_putc('e'); +} + +__attribute__((always_inline)) static inline void +check_hibernation(ADI_BOOT_DATA *bs, u16 vr_ctl, bool put_into_srfs) +{ + serial_putc('a'); + + if (!CONFIG_MEM_SIZE) + return; + + serial_putc('b');

/* Are we coming out of hibernate (suspend to memory) ? * The memory layout is: @@ -508,7 +576,7 @@ void initcode(ADI_BOOT_DATA *bootstruct) uint32_t *hibernate_magic = 0; __builtin_bfin_ssync(); /* make sure memory controller is done */ if (hibernate_magic[0] == 0xDEADBEEF) { - serial_putc('R'); + serial_putc('c'); bfin_write_EVT15(hibernate_magic[1]); bfin_write_IMASK(EVT_IVG15); __asm__ __volatile__ ( @@ -525,15 +593,24 @@ void initcode(ADI_BOOT_DATA *bootstruct) : "p"(hibernate_magic), "d"(0x2000 /* jump.s 0 */) ); } + serial_putc('d'); }

- serial_putc('S'); + serial_putc('e'); +} + +__attribute__((always_inline)) static inline void +program_async_controller(ADI_BOOT_DATA *bs) +{ + serial_putc('a');

/* Program the async banks controller. */ bfin_write_EBIU_AMBCTL0(CONFIG_EBIU_AMBCTL0_VAL); bfin_write_EBIU_AMBCTL1(CONFIG_EBIU_AMBCTL1_VAL); bfin_write_EBIU_AMGCTL(CONFIG_EBIU_AMGCTL_VAL);

+ serial_putc('b'); + #ifdef EBIU_MODE /* Not all parts have these additional MMRs. */ bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTL_VAL); @@ -541,9 +618,49 @@ void initcode(ADI_BOOT_DATA *bootstruct) bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTL_VAL); #endif

- serial_putc('T'); + serial_putc('c'); +} + +BOOTROM_CALLED_FUNC_ATTR +void initcode(ADI_BOOT_DATA *bs) +{ + ADI_BOOT_DATA bootstruct_scratch; + + serial_init(); + + serial_putc('A'); + + /* If the bootstruct is NULL, then it's because we're loading + * dynamically and not via LDR (bootrom). So set the struct to + * some scratch space. + */ + if (!bs) + bs = &bootstruct_scratch; + + serial_putc('B'); + bool put_into_srfs = maybe_self_refresh(bs); + + serial_putc('C'); + uint sdivB, divB, vcoB; + program_early_devices(bs, &sdivB, &divB, &vcoB); + + serial_putc('D'); + u16 vr_ctl = program_clocks(bs, put_into_srfs); + + serial_putc('E'); + update_serial_clocks(bs, sdivB, divB, vcoB); + + serial_putc('F'); + program_memory_controller(bs, put_into_srfs); + + serial_putc('G'); + check_hibernation(bs, vr_ctl, put_into_srfs); + + serial_putc('H'); + program_async_controller(bs);

#ifdef CONFIG_BFIN_BOOTROM_USES_EVT1 + serial_putc('I'); /* tell the bootrom where our entry point is */ if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) bfin_write_EVT1(CONFIG_SYS_MONITOR_BASE);

Signed-off-by: Mike Frysinger vapier@gentoo.org --- include/configs/bf527-ezkit.h | 11 ++++++++--- include/configs/bf548-ezkit.h | 1 - include/configs/bfin_adi_common.h | 2 +- 3 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h index 5f3cb83..c7322b8 100644 --- a/include/configs/bf527-ezkit.h +++ b/include/configs/bf527-ezkit.h @@ -61,7 +61,8 @@ * (can't be used same time as ethernet) */ #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) -#define CONFIG_BFIN_NFC +# define CONFIG_BFIN_NFC +# define CONFIG_BFIN_NFC_BOOTROM_ECC #endif #ifdef CONFIG_BFIN_NFC #define CONFIG_BFIN_NFC_CTL_VAL 0x0033 @@ -69,7 +70,6 @@ #define CONFIG_SYS_NAND_BASE 0 /* not actually used */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define NAND_MAX_CHIPS 1 -#define CONFIG_CMD_NAND #endif

@@ -118,14 +118,19 @@ #define CONFIG_ENV_OFFSET 0x10000 #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x10000 +#define CONFIG_ENV_IS_EMBEDDED_IN_LDR +#elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0x40000 +#define CONFIG_ENV_SIZE 0x20000 #else #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_OFFSET 0x4000 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x2000 -#endif #define CONFIG_ENV_IS_EMBEDDED_IN_LDR +#endif

/* diff --git a/include/configs/bf548-ezkit.h b/include/configs/bf548-ezkit.h index d0a9e49..297c3fd 100644 --- a/include/configs/bf548-ezkit.h +++ b/include/configs/bf548-ezkit.h @@ -133,7 +133,6 @@ #define CONFIG_SYS_NAND_BASE 0 /* not actually used */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define NAND_MAX_CHIPS 1 -#define CONFIG_CMD_NAND

/* diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index 42f4cbc..db10ccc 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -45,7 +45,7 @@ # define CONFIG_CMD_USB_STORAGE # define CONFIG_DOS_PARTITION # endif -# ifdef CONFIG_NAND_PLAT +# if defined(CONFIG_NAND_PLAT) || defined(CONFIG_DRIVER_NAND_BFIN) # define CONFIG_CMD_NAND # endif # ifdef CONFIG_POST

Signed-off-by: Mike Frysinger vapier@gentoo.org --- cpu/blackfin/Makefile | 2 +- cpu/blackfin/watchdog.c | 4 +--- 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/cpu/blackfin/Makefile b/cpu/blackfin/Makefile index 5eef6a3..211b8d5 100644 --- a/cpu/blackfin/Makefile +++ b/cpu/blackfin/Makefile @@ -24,7 +24,7 @@ COBJS-y += os_log.o COBJS-y += reset.o COBJS-y += serial.o COBJS-y += traps.o -COBJS-y += watchdog.o +COBJS-$(CONFIG_HW_WATCHDOG) += watchdog.o

ifeq ($(CONFIG_BFIN_BOOT_MODE),BFIN_BOOT_BYPASS) COBJS-y += initcode.o diff --git a/cpu/blackfin/watchdog.c b/cpu/blackfin/watchdog.c index b47c6b6..1886bda 100644 --- a/cpu/blackfin/watchdog.c +++ b/cpu/blackfin/watchdog.c @@ -1,7 +1,7 @@ /* * watchdog.c - driver for Blackfin on-chip watchdog * - * Copyright (c) 2007-2008 Analog Devices Inc. + * Copyright (c) 2007-2009 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ @@ -10,7 +10,6 @@ #include <watchdog.h> #include <asm/blackfin.h>

-#ifdef CONFIG_HW_WATCHDOG void hw_watchdog_reset(void) { bfin_write_WDOG_STAT(0); @@ -22,4 +21,3 @@ void hw_watchdog_init(void) hw_watchdog_reset(); bfin_write_WDOG_CTL(0x0); } -#endif

Signed-off-by: Mike Frysinger vapier@gentoo.org --- include/asm-blackfin/string.h | 5 +---- 1 files changed, 1 insertions(+), 4 deletions(-)

diff --git a/include/asm-blackfin/string.h b/include/asm-blackfin/string.h index 18306dd..117f44c 100644 --- a/include/asm-blackfin/string.h +++ b/include/asm-blackfin/string.h @@ -29,9 +29,6 @@

#ifdef __KERNEL__ /* only set these up for kernel code */

-#include <config.h> -#include <asm/blackfin.h> - #define __HAVE_ARCH_STRCPY #define __HAVE_ARCH_STRNCPY #define __HAVE_ARCH_STRCMP @@ -47,7 +44,7 @@ extern int strcmp(const char *cs, const char *ct); extern int strncmp(const char *cs, const char *ct, size_t count); extern void *memcpy(void *dest, const void *src, size_t count); extern void *memset(void *s, int c, size_t count); -extern int memcmp(const void *, const void *, __kernel_size_t); +extern int memcmp(const void *, const void *, size_t); extern void *memmove(void *dest, const void *src, size_t count);

#else /* KERNEL */

From: Cliff Cai cliff.cai@analog.com

Signed-off-by: Cliff Cai cliff.cai@analog.com Signed-off-by: Mike Frysinger vapier@gentoo.org --- board/bf518f-ezbrd/bf518f-ezbrd.c | 8 + board/bf548-ezkit/bf548-ezkit.c | 8 + drivers/mmc/bfin_sdh.c | 519 +++++++++---------------------------- drivers/mmc/bfin_sdh.h | 59 ----- include/asm-blackfin/mmc.h | 1 - include/asm-blackfin/sdh.h | 17 ++ include/configs/bf518f-ezbrd.h | 1 + include/configs/bf548-ezkit.h | 1 + lib_blackfin/board.c | 6 + 9 files changed, 161 insertions(+), 459 deletions(-) delete mode 100644 drivers/mmc/bfin_sdh.h delete mode 100644 include/asm-blackfin/mmc.h create mode 100644 include/asm-blackfin/sdh.h

diff --git a/board/bf518f-ezbrd/bf518f-ezbrd.c b/board/bf518f-ezbrd/bf518f-ezbrd.c index 279c55c..85b350f 100644 --- a/board/bf518f-ezbrd/bf518f-ezbrd.c +++ b/board/bf518f-ezbrd/bf518f-ezbrd.c @@ -15,6 +15,7 @@ #include <asm/blackfin.h> #include <asm/net.h> #include <asm/mach-common/bits/otp.h> +#include <asm/sdh.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -155,3 +156,10 @@ int board_early_init_f(void) #endif return 0; } + +#ifdef CONFIG_BFIN_SDH +int board_mmc_init(bd_t *bis) +{ + return bfin_mmc_init(bis); +} +#endif diff --git a/board/bf548-ezkit/bf548-ezkit.c b/board/bf548-ezkit/bf548-ezkit.c index 29c2e92..7659e34 100644 --- a/board/bf548-ezkit/bf548-ezkit.c +++ b/board/bf548-ezkit/bf548-ezkit.c @@ -11,6 +11,7 @@ #include <config.h> #include <command.h> #include <asm/blackfin.h> +#include <asm/sdh.h>

DECLARE_GLOBAL_DATA_PTR;

@@ -78,3 +79,10 @@ int board_eth_init(bd_t *bis) return smc911x_initialize(0, CONFIG_SMC911X_BASE); } #endif + +#ifdef CONFIG_BFIN_SDH +int board_mmc_init(bd_t *bis) +{ + return bfin_mmc_init(bis); +} +#endif diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c index 16c9695..f9d560a 100644 --- a/drivers/mmc/bfin_sdh.c +++ b/drivers/mmc/bfin_sdh.c @@ -1,7 +1,7 @@ /* * Driver for Blackfin on-chip SDH controller * - * Copyright (c) 2008 Analog Devices Inc. + * Copyright (c) 2008-2009 Analog Devices Inc. * * Licensed under the GPL-2 or later. */ @@ -18,20 +18,6 @@ #include <asm/mach-common/bits/sdh.h> #include <asm/mach-common/bits/dma.h>

-#include "bfin_sdh.h" - -/* SD_CLK frequency must be less than 400k in identification mode */ -#ifndef CONFIG_SYS_MMC_CLK_ID -#define CONFIG_SYS_MMC_CLK_ID 200000 -#endif -/* SD_CLK for normal working */ -#ifndef CONFIG_SYS_MMC_CLK_OP -#define CONFIG_SYS_MMC_CLK_OP 25000000 -#endif -/* support 3.2-3.3V and 3.3-3.4V */ -#define CONFIG_SYS_MMC_OP_COND 0x00300000 -#define MMC_DEFAULT_RCA 1 - #if defined(__ADSPBF51x__) # define bfin_read_SDH_PWR_CTL bfin_read_RSI_PWR_CONTROL # define bfin_write_SDH_PWR_CTL bfin_write_RSI_PWR_CONTROL @@ -64,61 +50,17 @@ # error no support for this proc yet #endif

-static unsigned int mmc_rca; -static int mmc_card_is_sd; -static block_dev_desc_t mmc_blkdev; -struct mmc_cid cid; -static __u32 csd[4]; - -#define get_bits(resp, start, size) \ - ({ \ - const int __size = size; \ - const uint32_t __mask = (__size < 32 ? 1 << __size : 0) - 1; \ - const int32_t __off = 3 - ((start) / 32); \ - const int32_t __shft = (start) & 31; \ - uint32_t __res; \ - \ - __res = resp[__off] >> __shft; \ - if (__size + __shft > 32) \ - __res |= resp[__off-1] << ((32 - __shft) % 32); \ - __res & __mask; \ - }) - - -block_dev_desc_t *mmc_get_dev(int dev) -{ - return &mmc_blkdev; -} - -static void mci_set_clk(unsigned long clk) -{ - unsigned long sys_clk; - unsigned long clk_div; - __u16 clk_ctl = 0; - - /* setting SD_CLK */ - sys_clk = get_sclk(); - bfin_write_SDH_CLK_CTL(0); - if (sys_clk % (2 * clk) == 0) - clk_div = sys_clk / (2 * clk) - 1; - else - clk_div = sys_clk / (2 * clk); - - if (clk_div > 0xff) - clk_div = 0xff; - clk_ctl |= (clk_div & 0xff); - clk_ctl |= CLK_E; - bfin_write_SDH_CLK_CTL(clk_ctl); -} - static int -mmc_cmd(unsigned long cmd, unsigned long arg, void *resp, unsigned long flags) +sdh_send_cmd(struct mmc *mmc, struct mmc_cmd *mmc_cmd) { unsigned int sdh_cmd; unsigned int status; + int cmd = mmc_cmd->cmdidx; + int flags = mmc_cmd->resp_type; + int arg = mmc_cmd->cmdarg; int ret = 0; sdh_cmd = 0; - unsigned long *response = resp; + sdh_cmd |= cmd;

if (flags & MMC_RSP_PRESENT) @@ -138,336 +80,137 @@ mmc_cmd(unsigned long cmd, unsigned long arg, void *resp, unsigned long flags) CMD_CRC_FAIL)));

if (flags & MMC_RSP_PRESENT) { - response[0] = bfin_read_SDH_RESPONSE0(); + mmc_cmd->response[0] = bfin_read_SDH_RESPONSE0(); if (flags & MMC_RSP_136) { - response[1] = bfin_read_SDH_RESPONSE1(); - response[2] = bfin_read_SDH_RESPONSE2(); - response[3] = bfin_read_SDH_RESPONSE3(); + mmc_cmd->response[1] = bfin_read_SDH_RESPONSE1(); + mmc_cmd->response[2] = bfin_read_SDH_RESPONSE2(); + mmc_cmd->response[3] = bfin_read_SDH_RESPONSE3(); } }

- if (status & CMD_TIME_OUT) { - printf("CMD%d timeout\n", (int)cmd); - ret |= -ETIMEDOUT; - } else if (status & CMD_CRC_FAIL && flags & MMC_RSP_CRC) { - printf("CMD%d CRC failure\n", (int)cmd); - ret |= -EILSEQ; - } + if (status & CMD_TIME_OUT) + ret |= TIMEOUT; + else if (status & CMD_CRC_FAIL && flags & MMC_RSP_CRC) + ret |= COMM_ERR; + bfin_write_SDH_STATUS_CLR(CMD_SENT_STAT | CMD_RESP_END_STAT | CMD_TIMEOUT_STAT | CMD_CRC_FAIL_STAT); return ret; }

-static int -mmc_acmd(unsigned long cmd, unsigned long arg, void *resp, unsigned long flags) +/* set data for single block transfer */ +static int sdh_setup_data(struct mmc *mmc, struct mmc_data *data) { - unsigned long aresp[4]; + u16 data_ctl = 0; + u16 dma_cfg = 0; int ret = 0;

- ret = mmc_cmd(MMC_CMD_APP_CMD, 0, aresp, - MMC_RSP_PRESENT); - if (ret) - return ret; - - if ((aresp[0] & (ILLEGAL_COMMAND | APP_CMD)) != APP_CMD) - return -ENODEV; - ret = mmc_cmd(cmd, arg, resp, flags); - return ret; -} - -static unsigned long -mmc_bread(int dev, unsigned long start, lbaint_t blkcnt, void *buffer) -{ - int ret, i; - unsigned long resp[4]; - unsigned long card_status; - __u8 *buf = buffer; - __u32 status; - __u16 data_ctl = 0; - __u16 dma_cfg = 0; - - if (blkcnt == 0) - return 0; - debug("mmc_bread: dev %d, start %d, blkcnt %d\n", dev, start, blkcnt); - /* Force to use 512-byte block,because a lot of code depends on this */ - data_ctl |= 9 << 4; + /* Don't support write yet. */ + if (data->flags & MMC_DATA_WRITE) + return UNUSABLE_ERR; + data_ctl |= ((ffs(data->blocksize) - 1) << 4); data_ctl |= DTX_DIR; bfin_write_SDH_DATA_CTL(data_ctl); - dma_cfg |= WDSIZE_32 | RESTART | WNR | DMAEN; - - /* FIXME later */ - bfin_write_SDH_DATA_TIMER(0xFFFFFFFF); - for (i = 0; i < blkcnt; ++i, ++start) { - blackfin_dcache_flush_invalidate_range(buf + i * mmc_blkdev.blksz, - buf + (i + 1) * mmc_blkdev.blksz); - bfin_write_DMA_START_ADDR(buf + i * mmc_blkdev.blksz); - bfin_write_DMA_X_COUNT(mmc_blkdev.blksz / 4); - bfin_write_DMA_X_MODIFY(4); - bfin_write_DMA_CONFIG(dma_cfg); - bfin_write_SDH_DATA_LGTH(mmc_blkdev.blksz); - /* Put the device into Transfer state */ - ret = mmc_cmd(MMC_CMD_SELECT_CARD, mmc_rca << 16, resp, MMC_RSP_R1); - if (ret) { - printf("MMC_CMD_SELECT_CARD failed\n"); - goto out; - } - /* Set block length */ - ret = mmc_cmd(MMC_CMD_SET_BLOCKLEN, mmc_blkdev.blksz, resp, MMC_RSP_R1); - if (ret) { - printf("MMC_CMD_SET_BLOCKLEN failed\n"); - goto out; - } - ret = mmc_cmd(MMC_CMD_READ_SINGLE_BLOCK, - start * mmc_blkdev.blksz, resp, - MMC_RSP_R1); - if (ret) { - printf("MMC_CMD_READ_SINGLE_BLOCK failed\n"); - goto out; - } - bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E); + dma_cfg = WDSIZE_32 | RESTART | WNR | DMAEN;

- do { - udelay(1); - status = bfin_read_SDH_STATUS(); - } while (!(status & (DAT_BLK_END | DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL | RX_OVERRUN))); - - if (status & (DAT_TIME_OUT | DAT_CRC_FAIL | RX_OVERRUN)) { - bfin_write_SDH_STATUS_CLR(DAT_TIMEOUT_STAT | \ - DAT_CRC_FAIL_STAT | RX_OVERRUN_STAT); - goto read_error; - } else { - bfin_write_SDH_STATUS_CLR(DAT_BLK_END_STAT | DAT_END_STAT); - mmc_cmd(MMC_CMD_SELECT_CARD, 0, resp, 0); - } - } - out: + bfin_write_SDH_DATA_TIMER(0xFFFF);

- return i; + blackfin_dcache_flush_invalidate_range(data->dest, + data->dest + data->blocksize); + /* configure DMA */ + bfin_write_DMA_START_ADDR(data->dest); + bfin_write_DMA_X_COUNT(data->blocksize / 4); + bfin_write_DMA_X_MODIFY(4); + bfin_write_DMA_CONFIG(dma_cfg); + bfin_write_SDH_DATA_LGTH(data->blocksize); + /* kick off transfer */ + bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E);

- read_error: - mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, MMC_RSP_R1); - printf("mmc: bread failed, status = %08x, card status = %08lx\n", - status, card_status); - goto out; + return ret; }

-static unsigned long -mmc_bwrite(int dev, unsigned long start, lbaint_t blkcnt, const void *buffer) + +static int bfin_sdh_request(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data) { - int ret, i = 0; - unsigned long resp[4]; - unsigned long card_status; - const __u8 *buf = buffer; - __u32 status; - __u16 data_ctl = 0; - __u16 dma_cfg = 0; - - if (blkcnt == 0) - return 0; - - debug("mmc_bwrite: dev %d, start %lx, blkcnt %lx\n", - dev, start, blkcnt); - /* Force to use 512-byte block,because a lot of code depends on this */ - data_ctl |= 9 << 4; - data_ctl &= ~DTX_DIR; - bfin_write_SDH_DATA_CTL(data_ctl); - dma_cfg |= WDSIZE_32 | RESTART | DMAEN; - /* FIXME later */ - bfin_write_SDH_DATA_TIMER(0xFFFFFFFF); - for (i = 0; i < blkcnt; ++i, ++start) { - bfin_write_DMA_START_ADDR(buf + i * mmc_blkdev.blksz); - bfin_write_DMA_X_COUNT(mmc_blkdev.blksz / 4); - bfin_write_DMA_X_MODIFY(4); - bfin_write_DMA_CONFIG(dma_cfg); - bfin_write_SDH_DATA_LGTH(mmc_blkdev.blksz); - - /* Put the device into Transfer state */ - ret = mmc_cmd(MMC_CMD_SELECT_CARD, mmc_rca << 16, resp, MMC_RSP_R1); - if (ret) { - printf("MMC_CMD_SELECT_CARD failed\n"); - goto out; - } - /* Set block length */ - ret = mmc_cmd(MMC_CMD_SET_BLOCKLEN, mmc_blkdev.blksz, resp, MMC_RSP_R1); - if (ret) { - printf("MMC_CMD_SET_BLOCKLEN failed\n"); - goto out; - } - ret = mmc_cmd(MMC_CMD_WRITE_SINGLE_BLOCK, - start * mmc_blkdev.blksz, resp, - MMC_RSP_R1); - if (ret) { - printf("MMC_CMD_WRITE_SINGLE_BLOCK failed\n"); - goto out; - } - bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E); + u32 status; + int ret = 0;

+ ret = sdh_send_cmd(mmc, cmd); + if (ret) { + printf("sending CMD%d failed\n", cmd->cmdidx); + return ret; + } + if (data) { + ret = sdh_setup_data(mmc, data); do { udelay(1); status = bfin_read_SDH_STATUS(); - } while (!(status & (DAT_BLK_END | DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL | TX_UNDERRUN))); + } while (!(status & (DAT_BLK_END | DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL | RX_OVERRUN)));

- if (status & (DAT_TIME_OUT | DAT_CRC_FAIL | TX_UNDERRUN)) { - bfin_write_SDH_STATUS_CLR(DAT_TIMEOUT_STAT | - DAT_CRC_FAIL_STAT | TX_UNDERRUN_STAT); - goto write_error; - } else { + if (status & DAT_TIME_OUT) { + bfin_write_SDH_STATUS_CLR(DAT_TIMEOUT_STAT); + ret |= TIMEOUT; + } else if (status & (DAT_CRC_FAIL | RX_OVERRUN)) { + bfin_write_SDH_STATUS_CLR(DAT_CRC_FAIL_STAT | RX_OVERRUN_STAT); + ret |= COMM_ERR; + } else bfin_write_SDH_STATUS_CLR(DAT_BLK_END_STAT | DAT_END_STAT); - mmc_cmd(MMC_CMD_SELECT_CARD, 0, resp, 0); + + if (ret) { + printf("tranfering data failed\n"); + return ret; } } - out: - return i; - - write_error: - mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, MMC_RSP_R1); - printf("mmc: bwrite failed, status = %08x, card status = %08lx\n", - status, card_status); - goto out; -} - -static void mmc_parse_cid(struct mmc_cid *cid, unsigned long *resp) -{ - cid->mid = resp[0] >> 24; - cid->oid = (resp[0] >> 8) & 0xffff; - cid->pnm[0] = resp[0]; - cid->pnm[1] = resp[1] >> 24; - cid->pnm[2] = resp[1] >> 16; - cid->pnm[3] = resp[1] >> 8; - cid->pnm[4] = resp[1]; - cid->pnm[5] = resp[2] >> 24; - cid->pnm[6] = 0; - cid->prv = resp[2] >> 16; - cid->psn = (resp[2] << 16) | (resp[3] >> 16); - cid->mdt = resp[3] >> 8; -} - -static void sd_parse_cid(struct mmc_cid *cid, unsigned long *resp) -{ - cid->mid = resp[0] >> 24; - cid->oid = (resp[0] >> 8) & 0xffff; - cid->pnm[0] = resp[0]; - cid->pnm[1] = resp[1] >> 24; - cid->pnm[2] = resp[1] >> 16; - cid->pnm[3] = resp[1] >> 8; - cid->pnm[4] = resp[1]; - cid->pnm[5] = 0; - cid->pnm[6] = 0; - cid->prv = resp[2] >> 24; - cid->psn = (resp[2] << 8) | (resp[3] >> 24); - cid->mdt = (resp[3] >> 8) & 0x0fff; -} - -static void mmc_dump_cid(const struct mmc_cid *cid) -{ - printf("CID information:\n"); - printf("Manufacturer ID: %02X\n", cid->mid); - printf("OEM/Application ID: %04X\n", cid->oid); - printf("Product name: %s\n", cid->pnm); - printf("Product Revision: %u.%u\n", - cid->prv >> 4, cid->prv & 0x0f); - printf("Product Serial Number: %lu\n", cid->psn); - printf("Manufacturing Date: %02u/%02u\n", - cid->mdt >> 4, cid->mdt & 0x0f); -} - -static void mmc_dump_csd(__u32 *csd) -{ - printf("CSD information:\n"); - printf("CSD structure version: 1.%u\n", get_bits(csd, 126, 2)); - printf("Card command classes: %03x\n", get_bits(csd, 84, 12)); - printf("Max trans speed: %s\n", (get_bits(csd, 96, 8) == 0x32) ? "25MHz" : "50MHz"); - printf("Read block length: %d\n", 1 << get_bits(csd, 80, 4)); - printf("Write block length: %u\n", 1 << get_bits(csd, 22, 4)); - printf("Card capacity: %u bytes\n", - (get_bits(csd, 62, 12) + 1) * (1 << (get_bits(csd, 47, 3) + 2)) * - (1 << get_bits(csd, 80, 4))); - putc('\n'); + return 0; }

-static int mmc_idle_cards(void) +static void sdh_set_clk(unsigned long clk) { - int ret = 0; - - /* Reset all cards */ - ret = mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, NULL, 0); - if (ret) - return ret; - udelay(500); - return mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, NULL, 0); + unsigned long sys_clk; + unsigned long clk_div; + u16 clk_ctl = 0; + + clk_ctl = bfin_read_SDH_CLK_CTL(); + if (clk) { + /* setting SD_CLK */ + sys_clk = get_sclk(); + bfin_write_SDH_CLK_CTL(clk_ctl & ~CLK_E); + if (sys_clk % (2 * clk) == 0) + clk_div = sys_clk / (2 * clk) - 1; + else + clk_div = sys_clk / (2 * clk); + + if (clk_div > 0xff) + clk_div = 0xff; + clk_ctl |= (clk_div & 0xff); + clk_ctl |= CLK_E; + bfin_write_SDH_CLK_CTL(clk_ctl); + } else + bfin_write_SDH_CLK_CTL(clk_ctl & ~CLK_E); }

-static int sd_init_card(struct mmc_cid *cid, int verbose) +static void bfin_sdh_set_ios(struct mmc *mmc) { - unsigned long resp[4]; - int i, ret = 0; - - mmc_idle_cards(); - for (i = 0; i < 1000; ++i) { - ret = mmc_acmd(SD_CMD_APP_SEND_OP_COND, CONFIG_SYS_MMC_OP_COND, - resp, MMC_RSP_R3); - if (ret || (resp[0] & 0x80000000)) - break; - ret = -ETIMEDOUT; + u16 cfg = 0; + u16 clk_ctl = 0; + + if (mmc->bus_width == 4) { + cfg = bfin_read_SDH_CFG(); + cfg &= ~0x80; + cfg |= 0x40; + bfin_write_SDH_CFG(cfg); + clk_ctl |= WIDE_BUS; } - if (ret) - return ret; - - ret = mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, resp, MMC_RSP_R2); - if (ret) - return ret; - sd_parse_cid(cid, resp); - if (verbose) - mmc_dump_cid(cid); - - /* Get RCA of the card that responded */ - ret = mmc_cmd(SD_CMD_SEND_RELATIVE_ADDR, 0, resp, MMC_RSP_R6); - if (ret) - return ret; - - mmc_rca = (resp[0] >> 16) & 0xffff; - if (verbose) - printf("SD Card detected (RCA %u)\n", mmc_rca); - mmc_card_is_sd = 1; - return 0; + bfin_write_SDH_CLK_CTL(clk_ctl); + sdh_set_clk(mmc->clock); }

-static int mmc_init_card(struct mmc_cid *cid, int verbose) +static int bfin_sdh_init(struct mmc *mmc) { - unsigned long resp[4]; - int i, ret = 0; - - mmc_idle_cards(); - for (i = 0; i < 1000; ++i) { - ret = mmc_cmd(MMC_CMD_SEND_OP_COND, CONFIG_SYS_MMC_OP_COND, resp, - MMC_RSP_R3); - if (ret || (resp[0] & 0x80000000)) - break; - ret = -ETIMEDOUT; - } - if (ret) - return ret;

- /* Get CID of all cards. FIXME: Support more than one card */ - ret = mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, resp, MMC_RSP_R2); - if (ret) - return ret; - mmc_parse_cid(cid, resp); - if (verbose) - mmc_dump_cid(cid); - - /* Set Relative Address of the card that responded */ - ret = mmc_cmd(MMC_CMD_SET_RELATIVE_ADDR, mmc_rca << 16, resp, - MMC_RSP_R1); - return ret; -} - -int mmc_legacy_init(int verbose) -{ - __u16 pwr_ctl = 0; - int ret; - unsigned int max_blksz; - /* Initialize sdh controller */ + u16 pwr_ctl = 0; +/* Initialize sdh controller */ #if defined(__ADSPBF54x__) bfin_write_DMAC1_PERIMUX(bfin_read_DMAC1_PERIMUX() | 0x1); bfin_write_PORTC_FER(bfin_read_PORTC_FER() | 0x3F00); @@ -481,56 +224,34 @@ int mmc_legacy_init(int verbose) bfin_write_SDH_CFG(bfin_read_SDH_CFG() | CLKS_EN); /* Disable card detect pin */ bfin_write_SDH_CFG((bfin_read_SDH_CFG() & 0x1F) | 0x60); - mci_set_clk(CONFIG_SYS_MMC_CLK_ID); - /* setting power control */ + pwr_ctl |= ROD_CTL; pwr_ctl |= PWR_ON; bfin_write_SDH_PWR_CTL(pwr_ctl); - mmc_card_is_sd = 0; - ret = sd_init_card(&cid, verbose); - if (ret) { - mmc_rca = MMC_DEFAULT_RCA; - ret = mmc_init_card(&cid, verbose); - } - if (ret) - return ret; - /* Get CSD from the card */ - ret = mmc_cmd(MMC_CMD_SEND_CSD, mmc_rca << 16, csd, MMC_RSP_R2); - if (ret) - return ret; - if (verbose) - mmc_dump_csd(csd); - /* Initialize the blockdev structure */ - mmc_blkdev.if_type = IF_TYPE_MMC; - mmc_blkdev.part_type = PART_TYPE_DOS; - mmc_blkdev.block_read = mmc_bread; - mmc_blkdev.block_write = mmc_bwrite; - sprintf(mmc_blkdev.vendor, - "Man %02x%04x Snr %08lx", - cid.mid, cid.oid, cid.psn); - strncpy(mmc_blkdev.product, cid.pnm, - sizeof(mmc_blkdev.product)); - sprintf(mmc_blkdev.revision, "%x %x", - cid.prv >> 4, cid.prv & 0x0f); - - max_blksz = 1 << get_bits(csd, 80, 4); - /* - * If we can't use 512 byte blocks, refuse to deal with the - * card. Tons of code elsewhere seems to depend on this. - */ - if (max_blksz < 512 || (max_blksz > 512 && !get_bits(csd, 79, 1))) { - printf("Card does not support 512 byte reads, aborting.\n"); - return -ENODEV; - } - - mmc_blkdev.blksz = 512; - mmc_blkdev.lba = (get_bits(csd, 62, 12) + 1) * (1 << (get_bits(csd, 47, 3) + 2)); - mci_set_clk(CONFIG_SYS_MMC_CLK_OP); - init_part(&mmc_blkdev); return 0; }

-int mmc2info(ulong addr) + +int bfin_mmc_init(bd_t *bis) { + struct mmc *mmc = NULL; + + mmc = malloc(sizeof(struct mmc)); + + if (!mmc) + return -ENOMEM; + sprintf(mmc->name, "Blackfin SDH"); + mmc->send_cmd = bfin_sdh_request; + mmc->set_ios = bfin_sdh_set_ios; + mmc->init = bfin_sdh_init; + mmc->host_caps = MMC_MODE_4BIT; + + mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34; + mmc->f_max = get_sclk(); + mmc->f_min = mmc->f_max >> 9; + mmc->block_dev.part_type = PART_TYPE_DOS; + + mmc_register(mmc); + return 0; } diff --git a/drivers/mmc/bfin_sdh.h b/drivers/mmc/bfin_sdh.h deleted file mode 100644 index 793ec30..0000000 --- a/drivers/mmc/bfin_sdh.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (C) 2008 Analog Device Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef __BLACKFIN_SDH_H__ -#define __BLACKFIN_SDH_H__ - -#define MMC_RSP_PRESENT (1 << 0) -#define MMC_RSP_136 (1 << 1) /* 136 bit response */ -#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ -#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ -#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ - -#define MMC_CMD_MASK (3 << 5) /* non-SPI command type */ -#define MMC_CMD_AC (0 << 5) -#define MMC_CMD_ADTC (1 << 5) -#define MMC_CMD_BC (2 << 5) -#define MMC_CMD_BCR (3 << 5) - -#define MMC_RSP_SPI_S1 (1 << 7) /* one status byte */ -#define MMC_RSP_SPI_S2 (1 << 8) /* second byte */ -#define MMC_RSP_SPI_B4 (1 << 9) /* four data bytes */ -#define MMC_RSP_SPI_BUSY (1 << 10) /* card may send busy */ - -/* - * These are the native response types, and correspond to valid bit - * patterns of the above flags. One additional valid pattern - * is all zeros, which means we don't expect a response. - */ -#define MMC_RSP_NONE (0) -#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) -#define MMC_RSP_R1B (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE|MMC_RSP_BUSY) -#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) -#define MMC_RSP_R3 (MMC_RSP_PRESENT) -#define MMC_RSP_R4 (MMC_RSP_PRESENT) -#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) -#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) -#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) -#define ILLEGAL_COMMAND (1 << 22) -#define APP_CMD (1 << 5) - -#endif diff --git a/include/asm-blackfin/mmc.h b/include/asm-blackfin/mmc.h deleted file mode 100644 index aa2ac95..0000000 --- a/include/asm-blackfin/mmc.h +++ /dev/null @@ -1 +0,0 @@ -#include <asm-avr32/arch-at32ap700x/mmc.h> diff --git a/include/asm-blackfin/sdh.h b/include/asm-blackfin/sdh.h new file mode 100644 index 0000000..2c2f63e --- /dev/null +++ b/include/asm-blackfin/sdh.h @@ -0,0 +1,17 @@ +/* + * sdh.h, export bfin_mmc_init + * + * Copyright (c) 2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#ifndef __ASM_SDH_H__ +#define __ASM_SDH_H__ + +#include <mmc.h> +#include <asm/u-boot.h> + +int bfin_mmc_init(bd_t *bis); + +#endif diff --git a/include/configs/bf518f-ezbrd.h b/include/configs/bf518f-ezbrd.h index 4928403..234e5a4 100644 --- a/include/configs/bf518f-ezbrd.h +++ b/include/configs/bf518f-ezbrd.h @@ -125,6 +125,7 @@ * SDH Settings */ #if !defined(__ADSPBF512__) +#define CONFIG_GENERIC_MMC #define CONFIG_MMC #define CONFIG_BFIN_SDH #endif diff --git a/include/configs/bf548-ezkit.h b/include/configs/bf548-ezkit.h index 297c3fd..f9c9711 100644 --- a/include/configs/bf548-ezkit.h +++ b/include/configs/bf548-ezkit.h @@ -161,6 +161,7 @@ * SDH Settings */ #if !defined(__ADSPBF544__) +#define CONFIG_GENERIC_MMC #define CONFIG_MMC #define CONFIG_BFIN_SDH #endif diff --git a/lib_blackfin/board.c b/lib_blackfin/board.c index ed4e77b..90da2b4 100644 --- a/lib_blackfin/board.c +++ b/lib_blackfin/board.c @@ -14,6 +14,7 @@ #include <stdio_dev.h> #include <environment.h> #include <malloc.h> +#include <mmc.h> #include <net.h> #include <timestamp.h> #include <status_led.h> @@ -340,6 +341,11 @@ void board_init_r(gd_t * id, ulong dest_addr) nand_init(); /* go init the NAND */ #endif

+#ifdef CONFIG_GENERIC_MMC + puts("MMC: "); + mmc_initialize(bd); +#endif + /* relocate environment function pointers etc. */ env_relocate();

Signed-off-by: Mike Frysinger vapier@gentoo.org --- include/asm-blackfin/io.h | 38 -------------------------------------- 1 files changed, 0 insertions(+), 38 deletions(-)

diff --git a/include/asm-blackfin/io.h b/include/asm-blackfin/io.h index 6806494..354fb7d 100644 --- a/include/asm-blackfin/io.h +++ b/include/asm-blackfin/io.h @@ -147,43 +147,5 @@ static inline unsigned int readl(const volatile void *addr)

#define outsw(port, addr, count) cf_outsw((unsigned short *)(port), (unsigned short *)addr, (count))

-#define IO_SPACE_LIMIT 0xffff - -/* Values for nocacheflag and cmode */ -#define IOMAP_FULL_CACHING 0 -#define IOMAP_NOCACHE_SER 1 -#define IOMAP_NOCACHE_NONSER 2 -#define IOMAP_WRITETHROUGH 3 - -extern void *__ioremap(unsigned long physaddr, unsigned long size, - int cacheflag); -extern void __iounmap(void *addr, unsigned long size); - -extern inline void *ioremap(unsigned long physaddr, unsigned long size) -{ - return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); -} -extern inline void *ioremap_nocache(unsigned long physaddr, unsigned long size) -{ - return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); -} -extern inline void *ioremap_writethrough(unsigned long physaddr, - unsigned long size) -{ - return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); -} -extern inline void *ioremap_fullcache(unsigned long physaddr, - unsigned long size) -{ - return __ioremap(physaddr, size, IOMAP_FULL_CACHING); -} - -extern void iounmap(void *addr); - -extern void blkfin_inv_cache_all(void); -#define dma_cache_inv(_start, _size) do { blkfin_inv_cache_all(); } while (0) -#define dma_cache_wback(_start, _size) do { } while (0) -#define dma_cache_wback_inv(_start, _size) do { blkfin_inv_cache_all(); } while (0) - #endif #endif

Some common code uses more of the io.h funcs than we currently provide, so pull in all of the ones from the linux kernel.

Signed-off-by: Mike Frysinger vapier@gentoo.org --- include/asm-blackfin/config-pre.h | 3 + include/asm-blackfin/io.h | 159 +++++++++++++++++++++++++++---------- lib_blackfin/Makefile | 2 + lib_blackfin/ins.S | 117 +++++++++++++++++++++++++++ lib_blackfin/outs.S | 60 ++++++++++++++ 5 files changed, 298 insertions(+), 43 deletions(-) create mode 100644 lib_blackfin/ins.S create mode 100644 lib_blackfin/outs.S

diff --git a/include/asm-blackfin/config-pre.h b/include/asm-blackfin/config-pre.h index b1d3a94..1170a2a 100644 --- a/include/asm-blackfin/config-pre.h +++ b/include/asm-blackfin/config-pre.h @@ -71,4 +71,7 @@ static inline const char *get_bfin_boot_mode(int bfin_boot) # define BFIN_BOOT_SPI_SSEL 1 #endif

+/* We rarely use interrupts, so favor throughput over latency */ +#define CONFIG_BFIN_INS_LOWOVERHEAD + #endif diff --git a/include/asm-blackfin/io.h b/include/asm-blackfin/io.h index 9cb07d4..75244a0 100644 --- a/include/asm-blackfin/io.h +++ b/include/asm-blackfin/io.h @@ -1,25 +1,9 @@ /* * U-boot - io.h IO routines * - * Copyright (c) 2005-2007 Analog Devices Inc. + * Copyright 2004-2009 Analog Devices Inc. * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA + * Licensed under the GPL-2 or later. */

#ifndef _BLACKFIN_IO_H @@ -29,6 +13,8 @@

#include <asm/blackfin.h>

+#define __iomem + static inline void sync(void) { SSYNC(); @@ -70,70 +56,154 @@ static inline phys_addr_t virt_to_phys(void * vaddr) * * readX/writeX() are used to access memory mapped devices. On some * architectures the memory mapped IO stuff needs to be accessed - * differently. On the m68k architecture, we just read/write the + * differently. On the bfin architecture, we just read/write the * memory location directly. */ - #ifndef __ASSEMBLY__

-static inline unsigned char readb(const volatile void *addr) +static inline unsigned char readb(const volatile void __iomem *addr) { unsigned int val; int tmp;

- __asm__ __volatile__ ("cli %1;\n\t" - "NOP; NOP; SSYNC;\n\t" - "%0 = b [%2] (z);\n\t" - "sti %1;\n\t" - : "=d"(val), "=d"(tmp): "a"(addr)); + __asm__ __volatile__ ( + "cli %1;" + "NOP; NOP; SSYNC;" + "%0 = b [%2] (z);" + "sti %1;" + : "=d"(val), "=d"(tmp) + : "a"(addr) + );

return (unsigned char) val; }

-static inline unsigned short readw(const volatile void *addr) +static inline unsigned short readw(const volatile void __iomem *addr) { unsigned int val; int tmp;

- __asm__ __volatile__ ("cli %1;\n\t" - "NOP; NOP; SSYNC;\n\t" - "%0 = w [%2] (z);\n\t" - "sti %1;\n\t" - : "=d"(val), "=d"(tmp): "a"(addr)); + __asm__ __volatile__ ( + "cli %1;" + "NOP; NOP; SSYNC;" + "%0 = w [%2] (z);" + "sti %1;" + : "=d"(val), "=d"(tmp) + : "a"(addr) + );

return (unsigned short) val; }

-static inline unsigned int readl(const volatile void *addr) +static inline unsigned int readl(const volatile void __iomem *addr) { unsigned int val; int tmp;

- __asm__ __volatile__ ("cli %1;\n\t" - "NOP; NOP; SSYNC;\n\t" - "%0 = [%2];\n\t" - "sti %1;\n\t" - : "=d"(val), "=d"(tmp): "a"(addr)); + __asm__ __volatile__ ( + "cli %1;" + "NOP; NOP; SSYNC;" + "%0 = [%2];" + "sti %1;" + : "=d"(val), "=d"(tmp) + : "a"(addr) + ); + return val; }

-#define __raw_readb readb -#define __raw_readw readw -#define __raw_readl readl - #endif /* __ASSEMBLY__ */

#define writeb(b, addr) (void)((*(volatile unsigned char *) (addr)) = (b)) #define writew(b, addr) (void)((*(volatile unsigned short *) (addr)) = (b)) #define writel(b, addr) (void)((*(volatile unsigned int *) (addr)) = (b)) + +#define __raw_readb readb +#define __raw_readw readw +#define __raw_readl readl #define __raw_writeb writeb #define __raw_writew writew #define __raw_writel writel - #define memset_io(a, b, c) memset((void *)(a), (b), (c)) #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))

+/* Convert "I/O port addresses" to actual addresses. i.e. ugly casts. */ +#define __io(port) ((void *)(unsigned long)(port)) + +#define inb(port) readb(__io(port)) +#define inw(port) readw(__io(port)) +#define inl(port) readl(__io(port)) +#define outb(x, port) writeb(x, __io(port)) +#define outw(x, port) writew(x, __io(port)) +#define outl(x, port) writel(x, __io(port)) + +#define inb_p(port) inb(__io(port)) +#define inw_p(port) inw(__io(port)) +#define inl_p(port) inl(__io(port)) +#define outb_p(x, port) outb(x, __io(port)) +#define outw_p(x, port) outw(x, __io(port)) +#define outl_p(x, port) outl(x, __io(port)) + +#define ioread8_rep(a, d, c) readsb(a, d, c) +#define ioread16_rep(a, d, c) readsw(a, d, c) +#define ioread32_rep(a, d, c) readsl(a, d, c) +#define iowrite8_rep(a, s, c) writesb(a, s, c) +#define iowrite16_rep(a, s, c) writesw(a, s, c) +#define iowrite32_rep(a, s, c) writesl(a, s, c) + +#define ioread8(x) readb(x) +#define ioread16(x) readw(x) +#define ioread32(x) readl(x) +#define iowrite8(val, x) writeb(val, x) +#define iowrite16(val, x) writew(val, x) +#define iowrite32(val, x) writel(val, x) + +#define mmiowb() wmb() + +#ifndef __ASSEMBLY__ + +extern void outsb(unsigned long port, const void *addr, unsigned long count); +extern void outsw(unsigned long port, const void *addr, unsigned long count); +extern void outsw_8(unsigned long port, const void *addr, unsigned long count); +extern void outsl(unsigned long port, const void *addr, unsigned long count); + +extern void insb(unsigned long port, void *addr, unsigned long count); +extern void insw(unsigned long port, void *addr, unsigned long count); +extern void insw_8(unsigned long port, void *addr, unsigned long count); +extern void insl(unsigned long port, void *addr, unsigned long count); +extern void insl_16(unsigned long port, void *addr, unsigned long count); + +static inline void readsl(const void __iomem *addr, void *buf, int len) +{ + insl((unsigned long)addr, buf, len); +} + +static inline void readsw(const void __iomem *addr, void *buf, int len) +{ + insw((unsigned long)addr, buf, len); +} + +static inline void readsb(const void __iomem *addr, void *buf, int len) +{ + insb((unsigned long)addr, buf, len); +} + +static inline void writesl(const void __iomem *addr, const void *buf, int len) +{ + outsl((unsigned long)addr, buf, len); +} + +static inline void writesw(const void __iomem *addr, const void *buf, int len) +{ + outsw((unsigned long)addr, buf, len); +} + +static inline void writesb(const void __iomem *addr, const void *buf, int len) +{ + outsb((unsigned long)addr, buf, len); +} + #if defined(CONFIG_STAMP_CF) || defined(CONFIG_BFIN_IDE) /* This hack for CF/IDE needs to be addressed at some point */ extern void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words); @@ -151,4 +221,7 @@ extern void cf_outb(unsigned char val, volatile unsigned char *addr); #endif

#endif + +#endif /* __KERNEL__ */ + #endif diff --git a/lib_blackfin/Makefile b/lib_blackfin/Makefile index cbf47f0..eebb131 100644 --- a/lib_blackfin/Makefile +++ b/lib_blackfin/Makefile @@ -31,10 +31,12 @@ CFLAGS += -DBFIN_BOARD_NAME='"$(BOARD)"'

LIB = $(obj)lib$(ARCH).a

+SOBJS-y += ins.o SOBJS-y += memcmp.o SOBJS-y += memcpy.o SOBJS-y += memmove.o SOBJS-y += memset.o +SOBJS-y += outs.o

COBJS-y += board.o COBJS-y += boot.o diff --git a/lib_blackfin/ins.S b/lib_blackfin/ins.S new file mode 100644 index 0000000..4519596 --- /dev/null +++ b/lib_blackfin/ins.S @@ -0,0 +1,117 @@ +/* + * arch/blackfin/lib/ins.S - ins{bwl} using hardware loops + * + * Copyright 2004-2008 Analog Devices Inc. + * Copyright (C) 2005 Bas Vermeulen, BuyWays BV bas@buyways.nl + * Licensed under the GPL-2 or later. + */ + +#include <asm/blackfin.h> + +.align 2 + +#ifdef CONFIG_IPIPE +# define DO_CLI \ + [--sp] = rets; \ + [--sp] = (P5:0); \ + sp += -12; \ + call ___ipipe_disable_root_irqs_hw; \ + sp += 12; \ + (P5:0) = [sp++]; +# define CLI_INNER_NOP +#else +# define DO_CLI cli R3; +# define CLI_INNER_NOP nop; nop; nop; +#endif + +#ifdef CONFIG_IPIPE +# define DO_STI \ + sp += -12; \ + call ___ipipe_enable_root_irqs_hw; \ + sp += 12; \ +2: rets = [sp++]; +#else +# define DO_STI 2: sti R3; +#endif + +#ifdef CONFIG_BFIN_INS_LOWOVERHEAD +# define CLI_OUTER DO_CLI; +# define STI_OUTER DO_STI; +# define CLI_INNER 1: +# if ANOMALY_05000416 +# define STI_INNER nop; 2: nop; +# else +# define STI_INNER 2: +# endif +#else +# define CLI_OUTER +# define STI_OUTER +# define CLI_INNER 1: DO_CLI; CLI_INNER_NOP; +# define STI_INNER DO_STI; +#endif + +/* + * Reads on the Blackfin are speculative. In Blackfin terms, this means they + * can be interrupted at any time (even after they have been issued on to the + * external bus), and re-issued after the interrupt occurs. + * + * If a FIFO is sitting on the end of the read, it will see two reads, + * when the core only sees one. The FIFO receives the read which is cancelled, + * and not delivered to the core. + * + * To solve this, interrupts are turned off before reads occur to I/O space. + * There are 3 versions of all these functions + * - turns interrupts off every read (higher overhead, but lower latency) + * - turns interrupts off every loop (low overhead, but longer latency) + * - DMA version, which do not suffer from this issue. DMA versions have + * different name (prefixed by dma_ ), and are located in + * ../kernel/bfin_dma_5xx.c + * Using the dma related functions are recommended for transfering large + * buffers in/out of FIFOs. + */ + +#define COMMON_INS(func, ops) \ +ENTRY(_ins##func) \ + P0 = R0; /* P0 = port */ \ + CLI_OUTER; /* 3 instructions before first read access */ \ + P1 = R1; /* P1 = address */ \ + P2 = R2; /* P2 = count */ \ + SSYNC; \ + \ + LSETUP(1f, 2f) LC0 = P2; \ + CLI_INNER; \ + ops; \ + STI_INNER; \ + \ + STI_OUTER; \ + RTS; \ +ENDPROC(_ins##func) + +COMMON_INS(l, \ + R0 = [P0]; \ + [P1++] = R0; \ +) + +COMMON_INS(w, \ + R0 = W[P0]; \ + W[P1++] = R0; \ +) + +COMMON_INS(w_8, \ + R0 = W[P0]; \ + B[P1++] = R0; \ + R0 = R0 >> 8; \ + B[P1++] = R0; \ +) + +COMMON_INS(b, \ + R0 = B[P0]; \ + B[P1++] = R0; \ +) + +COMMON_INS(l_16, \ + R0 = [P0]; \ + W[P1++] = R0; \ + R0 = R0 >> 16; \ + W[P1++] = R0; \ +) diff --git a/lib_blackfin/outs.S b/lib_blackfin/outs.S new file mode 100644 index 0000000..90c6033 --- /dev/null +++ b/lib_blackfin/outs.S @@ -0,0 +1,60 @@ +/* + * Implementation of outs{bwl} for BlackFin processors using zero overhead loops. + * + * Copyright 2005-2009 Analog Devices Inc. + * 2005 BuyWays BV + * Bas Vermeulen bas@buyways.nl + * + * Licensed under the GPL-2. + */ + +#include <asm/linkage.h> + +.align 2 + +ENTRY(_outsl) + P0 = R0; /* P0 = port */ + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + + LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2; +.Llong_loop_s: R0 = [P1++]; +.Llong_loop_e: [P0] = R0; + RTS; +ENDPROC(_outsl) + +ENTRY(_outsw) + P0 = R0; /* P0 = port */ + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + + LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2; +.Lword_loop_s: R0 = W[P1++]; +.Lword_loop_e: W[P0] = R0; + RTS; +ENDPROC(_outsw) + +ENTRY(_outsb) + P0 = R0; /* P0 = port */ + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + + LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2; +.Lbyte_loop_s: R0 = B[P1++]; +.Lbyte_loop_e: B[P0] = R0; + RTS; +ENDPROC(_outsb) + +ENTRY(_outsw_8) + P0 = R0; /* P0 = port */ + P1 = R1; /* P1 = address */ + P2 = R2; /* P2 = count */ + + LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2; +.Lword8_loop_s: R1 = B[P1++]; + R0 = B[P1++]; + R0 = R0 << 8; + R0 = R0 + R1; +.Lword8_loop_e: W[P0] = R0; + RTS; +ENDPROC(_outsw_8)

From: Cliff Cai cliff.cai@analog.com

Signed-off-by: Cliff Cai cliff.cai@analog.com Signed-off-by: Mike Frysinger vapier@gentoo.org --- board/bf527-ezkit/bf527-ezkit.c | 13 +++++++++++++ board/bf548-ezkit/bf548-ezkit.c | 16 ++++++++++++++++ 2 files changed, 29 insertions(+), 0 deletions(-)

diff --git a/board/bf527-ezkit/bf527-ezkit.c b/board/bf527-ezkit/bf527-ezkit.c index a880066..a911880 100644 --- a/board/bf527-ezkit/bf527-ezkit.c +++ b/board/bf527-ezkit/bf527-ezkit.c @@ -68,3 +68,16 @@ int misc_init_r(void)

return 0; } + +#ifdef CONFIG_USB_BLACKFIN +void board_musb_init(void) +{ + /* + * BF527 EZ-KITs require PG13 to be high for HOST mode + */ + bfin_write_PORTG_FER(bfin_read_PORTG_FER() & ~PG13); + bfin_write_PORTGIO_DIR(bfin_read_PORTGIO_DIR() | PG13); + bfin_write_PORTGIO_SET(PG13); + SSYNC(); +} +#endif diff --git a/board/bf548-ezkit/bf548-ezkit.c b/board/bf548-ezkit/bf548-ezkit.c index 7659e34..65fb81a 100644 --- a/board/bf548-ezkit/bf548-ezkit.c +++ b/board/bf548-ezkit/bf548-ezkit.c @@ -86,3 +86,19 @@ int board_mmc_init(bd_t *bis) return bfin_mmc_init(bis); } #endif + +#ifdef CONFIG_USB_BLACKFIN +void board_musb_init(void) +{ + /* + * Rev 1.0 BF549 EZ-KITs require PE7 to be high for both device + * and OTG host modes, while rev 1.1 and greater require PE7 to + * be low for device mode and high for host mode. We set it high + * here because we are in host mode. + */ + bfin_write_PORTE_FER(bfin_read_PORTE_FER() & ~PE7); + bfin_write_PORTE_DIR_SET(PE7); + bfin_write_PORTE_SET(PE7); + SSYNC(); +} +#endif

From: Robin Getz robin.getz@analog.com

Signed-off-by: Robin Getz robin.getz@analog.com Signed-off-by: Mike Frysinger vapier@gentoo.org --- include/configs/bfin_adi_common.h | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index db10ccc..f7a2d5c 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -178,7 +178,19 @@ "erase 0x20000000 +$(filesize);" \ "cp.b $(loadaddr) 0x20000000 $(filesize)" # endif +# ifdef CONFIG_NETCONSOLE +# define NETCONSOLE_ENV \ + "nc=" \ + "set ncip ${serverip};" \ + "set stdin nc;" \ + "set stdout nc" \ + "\0" +# else +# define NETCONSOLE_ENV +# endif # define NETWORK_ENV_SETTINGS \ + NETCONSOLE_ENV \ + \ "ubootfile=" UBOOT_ENV_FILE "\0" \ "update=" \ "tftp $(loadaddr) $(ubootfile);" \

From: Robin Getz robin.getz@analog.com

Need to reload the loop counters to keep from corrupting hardware loops.

Signed-off-by: Robin Getz robin.getz@analog.com Signed-off-by: Mike Frysinger vapier@gentoo.org --- cpu/blackfin/interrupt.S | 11 ++++++++++- 1 files changed, 10 insertions(+), 1 deletions(-)

diff --git a/cpu/blackfin/interrupt.S b/cpu/blackfin/interrupt.S index 71e0fc6..8c7a262 100644 --- a/cpu/blackfin/interrupt.S +++ b/cpu/blackfin/interrupt.S @@ -1,7 +1,7 @@ /* * interrupt.S - trampoline default exceptions/interrupts to C handlers * - * Copyright (c) 2005-2007 Analog Devices Inc. + * Copyright (c) 2005-2009 Analog Devices Inc. * Licensed under the GPL-2 or later. */

@@ -17,10 +17,19 @@ ENTRY(_trap) sp.l = LO(L1_SRAM_SCRATCH_END - 20); sp.h = HI(L1_SRAM_SCRATCH_END - 20); SAVE_ALL_SYS + r0 = sp; /* stack frame pt_regs pointer argument ==> r0 */ sp += -12; call _trap_c; sp += 12; + +#if ANOMALY_05000257 + R7 = LC0; + LC0 = R7; + R7 = LC1; + LC1 = R7; +#endif + RESTORE_ALL_SYS sp = CONFIG_BFIN_SCRATCH_REG; rtx;

Signed-off-by: Mike Frysinger vapier@gentoo.org --- include/configs/bfin_adi_common.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index f7a2d5c..6a2f1c7 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -75,6 +75,9 @@ # else # define CONFIG_CMD_JFFS2 # endif +# ifdef CONFIG_CMD_JFFS2 +# define CONFIG_JFFS2_SUMMARY +# endif # define CONFIG_CMD_BOOTLDR # define CONFIG_CMD_CACHE # define CONFIG_CMD_CPLBINFO

This is just Blackfin catching up with every one else.

Signed-off-by: Mike Frysinger vapier@gentoo.org --- lib_blackfin/u-boot.lds.S | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-)

diff --git a/lib_blackfin/u-boot.lds.S b/lib_blackfin/u-boot.lds.S index deb94c9..5ee8eb3 100644 --- a/lib_blackfin/u-boot.lds.S +++ b/lib_blackfin/u-boot.lds.S @@ -94,8 +94,7 @@ SECTIONS .rodata : { . = ALIGN(4); - *(.rodata .rodata.*) - *(.rodata1) + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) *(.eh_frame) . = ALIGN(4); } >ram_data