[U-Boot] [PATCH v3 0/3] Add USB EHCI support for ls1012aqds

Adds USB EHCI support for ls1012qds by adding the support for NXP ULPI PHY and adding the support it configuration files. Also enables, USB2 IP in ns access defines.
Rajesh Bhagat (3): drivers: usb: fsl: add USB ULPI init code config: ls1012aqds: Add USB EHCI support for ls1012aqds armv8: ls1012a: Added CSU assignment for USB2
.../include/asm/arch-fsl-layerscape/immap_lsch2.h | 1 + .../arm/include/asm/arch-fsl-layerscape/ns_access.h | 2 ++ drivers/usb/host/ehci-fsl.c | 21 +++++++++++++++++++++ include/configs/ls1012aqds.h | 2 ++ include/usb/ehci-ci.h | 2 +- 5 files changed, 27 insertions(+), 1 deletion(-)

This adds the required code to set up a ULPI USB port, for new NXP USB PHY used in QorIQ platforms.
To use this both CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT have to be set in the board configuration file.
Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- Changes in v3: - Rebased to u-boot-usb master
Changes in v2: - Changes return value from -1 to ulpi_init ret value
drivers/usb/host/ehci-fsl.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 9c32921..85b810d 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -17,6 +17,9 @@ #include <fsl_usb.h> #include <fdt_support.h> #include <dm.h> +#ifdef CONFIG_USB_ULPI +#include <usb/ulpi.h> +#endif
#include "ehci.h"
@@ -190,6 +193,10 @@ static int ehci_fsl_init(int index, struct usb_ehci *ehci, size_t len; char current_usb_controller[5]; #endif +#ifdef CONFIG_USB_ULPI + int ret; + struct ulpi_viewport ulpi_vp; +#endif #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY char usb_phy[5];
@@ -257,6 +264,20 @@ static int ehci_fsl_init(int index, struct usb_ehci *ehci, udelay(1000); /* delay required for PHY Clk to appear */ if (!usb_phy_clk_valid(ehci)) return -EINVAL; + +#ifdef CONFIG_USB_ULPI + ulpi_vp.viewport_addr = (u32)&ehci->ulpi_viewpoint; + ulpi_vp.port_num = 0; + + ret = ulpi_init(&ulpi_vp); + if (ret) { + puts("NXP ULPI viewport init failed\n"); + return ret; + } + + ulpi_set_vbus(&ulpi_vp, 1, 1); + ulpi_set_vbus_indicator(&ulpi_vp, 1, 1, 1); +#endif out_le32(&(hcor)->or_portsc[0], PORT_PTS_ULPI); }

On 10/12/2016 12:41 PM, Rajesh Bhagat wrote:
This adds the required code to set up a ULPI USB port, for new NXP USB PHY used in QorIQ platforms.
To use this both CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT have to be set in the board configuration file.
Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
Changes in v3:
- Rebased to u-boot-usb master
Changes in v2:
- Changes return value from -1 to ulpi_init ret value
drivers/usb/host/ehci-fsl.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 9c32921..85b810d 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -17,6 +17,9 @@ #include <fsl_usb.h> #include <fdt_support.h> #include <dm.h> +#ifdef CONFIG_USB_ULPI +#include <usb/ulpi.h> +#endif
This ifdef is not needed, just include the file.
#include "ehci.h"
@@ -190,6 +193,10 @@ static int ehci_fsl_init(int index, struct usb_ehci *ehci, size_t len; char current_usb_controller[5]; #endif +#ifdef CONFIG_USB_ULPI
- int ret;
- struct ulpi_viewport ulpi_vp;
+#endif #ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY char usb_phy[5];
@@ -257,6 +264,20 @@ static int ehci_fsl_init(int index, struct usb_ehci *ehci, udelay(1000); /* delay required for PHY Clk to appear */ if (!usb_phy_clk_valid(ehci)) return -EINVAL;
+#ifdef CONFIG_USB_ULPI
ulpi_vp.viewport_addr = (u32)&ehci->ulpi_viewpoint;
ulpi_vp.port_num = 0;
ret = ulpi_init(&ulpi_vp);
if (ret) {
puts("NXP ULPI viewport init failed\n");
return ret;
}
ulpi_set_vbus(&ulpi_vp, 1, 1);
ulpi_set_vbus_indicator(&ulpi_vp, 1, 1, 1);
Please pull this whole block of code into separate function and do something like
#ifdef CONFIG_USB_ULPI static int ehci_fsl_ulpi_init(...) { code } #else static int ehci_fsl_ulpi_init(...) { return 0; } #endif
Then just call ehci_fsl_ulpi_init().
+#endif out_le32(&(hcor)->or_portsc[0], PORT_PTS_ULPI); }

Add USB EHCI support for ls1012aqds platform
Signed-off-by: Rajat Srivastava rajat.srivastava@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- Changes in v3: - Rebased to u-boot-usb master
Changes in v2: - None
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 1 + include/configs/ls1012aqds.h | 2 ++ include/usb/ehci-ci.h | 2 +- 3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index df51871..14de100 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -34,6 +34,7 @@ #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000) #define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000) #define CONFIG_SYS_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000) +#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000) #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000) #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) #define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000) diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 54abf30..7566f1a 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -118,6 +118,8 @@ #ifdef CONFIG_HAS_FSL_DR_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_FSL +#define CONFIG_USB_ULPI +#define CONFIG_USB_ULPI_VIEWPORT #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h index 882aed4..38d557c 100644 --- a/include/usb/ehci-ci.h +++ b/include/usb/ehci-ci.h @@ -159,7 +159,7 @@ #elif defined(CONFIG_MPC512X) #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0 -#elif defined(CONFIG_LS102XA) +#elif defined(CONFIG_LS102XA) || defined(CONFIG_ARCH_LS1012A) #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0 #endif

On 10/12/2016 12:41 PM, Rajesh Bhagat wrote:
Add USB EHCI support for ls1012aqds platform
Signed-off-by: Rajat Srivastava rajat.srivastava@nxp.com Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com
Changes in v3:
- Rebased to u-boot-usb master
Changes in v2:
- None
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 1 + include/configs/ls1012aqds.h | 2 ++ include/usb/ehci-ci.h | 2 +- 3 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index df51871..14de100 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -34,6 +34,7 @@ #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x01f00000) #define CONFIG_SYS_XHCI_USB2_ADDR (CONFIG_SYS_IMMR + 0x02000000) #define CONFIG_SYS_XHCI_USB3_ADDR (CONFIG_SYS_IMMR + 0x02100000) +#define CONFIG_SYS_EHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x07600000) #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_IMMR + 0x2400000) #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) #define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000) diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index 54abf30..7566f1a 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -118,6 +118,8 @@ #ifdef CONFIG_HAS_FSL_DR_USB #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_FSL +#define CONFIG_USB_ULPI +#define CONFIG_USB_ULPI_VIEWPORT #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #endif
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h index 882aed4..38d557c 100644 --- a/include/usb/ehci-ci.h +++ b/include/usb/ehci-ci.h @@ -159,7 +159,7 @@ #elif defined(CONFIG_MPC512X) #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_MPC512x_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0 -#elif defined(CONFIG_LS102XA) +#elif defined(CONFIG_LS102XA) || defined(CONFIG_ARCH_LS1012A) #define CONFIG_SYS_FSL_USB1_ADDR CONFIG_SYS_EHCI_USB1_ADDR #define CONFIG_SYS_FSL_USB2_ADDR 0
Is this block of macros needed at all ? If not, remove it even for LS102XA .
#endif

Access settings for USB2 IP is added through CSU register.
Added CSU ID for USB2, reg: CSL23_REG[8:0]
Signed-off-by: Rajesh Bhagat rajesh.bhagat@nxp.com --- Changes in v3: - Rebased to u-boot-usb master
Changes in v2: - None
arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h index f46f1d8..3a803e0 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h @@ -39,6 +39,7 @@ enum csu_cslx_ind { CSU_CSLX_ESDHC, CSU_CSLX_IFC = 45, CSU_CSLX_I2C1, + CSU_CSLX_USB_2, CSU_CSLX_I2C3 = 48, CSU_CSLX_I2C2, CSU_CSLX_DUART2 = 50, @@ -118,6 +119,7 @@ static struct csu_ns_dev ns_dev[] = { {CSU_CSLX_ESDHC, CSU_ALL_RW}, {CSU_CSLX_IFC, CSU_ALL_RW}, {CSU_CSLX_I2C1, CSU_ALL_RW}, + {CSU_CSLX_USB_2, CSU_ALL_RW}, {CSU_CSLX_I2C3, CSU_ALL_RW}, {CSU_CSLX_I2C2, CSU_ALL_RW}, {CSU_CSLX_DUART2, CSU_ALL_RW},
participants (2)
-
Marek Vasut
-
Rajesh Bhagat