[U-Boot] [PATCH] config: remove CONFIG_SPI_FLASH_BAR from some platforms
ls1012ardb, ls1046ardb, ls2080ardb has S25FS512S flash which do not support Bank Address Register commands
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com --- include/configs/ls1012a_common.h | 1 - include/configs/ls1046ardb.h | 1 - include/configs/ls2080ardb.h | 1 - 3 files changed, 3 deletions(-)
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 09f890d..0db926f 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -55,7 +55,6 @@ #define CONFIG_FSL_QSPI #define QSPI0_AMBA_BASE 0x40000000 #define CONFIG_SPI_FLASH_SPANSION -#define CONFIG_SPI_FLASH_BAR
#define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 67ee626..66af039 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -208,7 +208,6 @@ #define CONFIG_SPI_FLASH_SPANSION #define FSL_QSPI_FLASH_SIZE (1 << 26) #define FSL_QSPI_FLASH_NUM 2 -#define CONFIG_SPI_FLASH_BAR #endif #endif
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 2155a89..79a3d94 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -265,7 +265,6 @@ unsigned long get_board_sys_clk(void); /* SPI */ #ifdef CONFIG_FSL_DSPI #define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_BAR #define CONFIG_SPI_FLASH_STMICRO #endif
LS1012A has S25FS512S flash of 64M size
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com --- include/configs/ls1012a_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 0db926f..861cbc3 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -56,7 +56,7 @@ #define QSPI0_AMBA_BASE 0x40000000 #define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE (1 << 24) +#define FSL_QSPI_FLASH_SIZE SZ_64M #define FSL_QSPI_FLASH_NUM 2
/*
On 04/25/2017 02:20 AM, Suresh Gupta wrote:
LS1012A has S25FS512S flash of 64M size
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
include/configs/ls1012a_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 0db926f..861cbc3 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -56,7 +56,7 @@ #define QSPI0_AMBA_BASE 0x40000000 #define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE (1 << 24) +#define FSL_QSPI_FLASH_SIZE SZ_64M #define FSL_QSPI_FLASH_NUM 2
/*
Suresh,
LS1012A doesn't have any flash built-in. Do you mean all boards supporting LS1012A have the same flash chip with 64MB in size? Please clarify.
York
-----Original Message----- From: york sun Sent: Tuesday, May 23, 2017 9:50 PM To: Suresh Gupta suresh.gupta@nxp.com; u-boot@lists.denx.de Cc: jagan@openedev.com Subject: Re: [PATCH] LS1012A: change the size of flash
On 04/25/2017 02:20 AM, Suresh Gupta wrote:
LS1012A has S25FS512S flash of 64M size
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
include/configs/ls1012a_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 0db926f..861cbc3 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -56,7 +56,7 @@ #define QSPI0_AMBA_BASE 0x40000000 #define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE (1 << 24) +#define FSL_QSPI_FLASH_SIZE SZ_64M #define FSL_QSPI_FLASH_NUM 2
/*
Suresh,
LS1012A doesn't have any flash built-in. Do you mean all boards supporting LS1012A have the same flash chip with 64MB in size? Please clarify.
York
York, You are right, all boards has 64MB (S25FS512S) flash. Sorry for confusion.
SuresH
On 05/23/2017 10:52 PM, Suresh Gupta wrote:
-----Original Message----- From: york sun Sent: Tuesday, May 23, 2017 9:50 PM To: Suresh Gupta suresh.gupta@nxp.com; u-boot@lists.denx.de Cc: jagan@openedev.com Subject: Re: [PATCH] LS1012A: change the size of flash
On 04/25/2017 02:20 AM, Suresh Gupta wrote:
LS1012A has S25FS512S flash of 64M size
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
include/configs/ls1012a_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 0db926f..861cbc3 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -56,7 +56,7 @@ #define QSPI0_AMBA_BASE 0x40000000 #define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE (1 << 24) +#define FSL_QSPI_FLASH_SIZE SZ_64M #define FSL_QSPI_FLASH_NUM 2
/*
Suresh,
LS1012A doesn't have any flash built-in. Do you mean all boards supporting LS1012A have the same flash chip with 64MB in size? Please clarify.
York
York, You are right, all boards has 64MB (S25FS512S) flash. Sorry for confusion.
Changed subject to "armv8: ls1012a: fix the size of flash for multiple boards". Revise commit message to "LS1012AFRDM, LS1012ARDB, LS1012AQDS all have S25FS512S flash of 64MB size."
Applied to fsl-qoriq master, awaiting upstream. Thanks.
York
As per data sheet, S25FS512S support Uniform sector option or erase size of 256 kbytes and Page Programming buffer of 256 or 512 Bytes. So, flag SECT_4K have no significance for this flash.
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com --- drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index edca94e..7ca33e8 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -101,7 +101,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256, RD_FULL | WR_QPP) }, {"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, {"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, {"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) },
On Tue, Apr 25, 2017 at 2:51 PM, Suresh Gupta suresh.gupta@nxp.com wrote:
As per data sheet, S25FS512S support Uniform sector option or erase size of 256 kbytes and Page Programming buffer of 256 or 512 Bytes. So, flag SECT_4K have no significance for this flash.
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index edca94e..7ca33e8 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -101,7 +101,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256, RD_FULL | WR_QPP) },
Did you verify this? because we have an issue about this part number[1]
[1] https://lists.denx.de/pipermail/u-boot/2016-December/276032.html
thanks!
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Wednesday, April 26, 2017 1:01 PM To: Suresh Gupta suresh.gupta@nxp.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; york sun york.sun@nxp.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
On Tue, Apr 25, 2017 at 2:51 PM, Suresh Gupta suresh.gupta@nxp.com wrote:
As per data sheet, S25FS512S support Uniform sector option or erase size of 256 kbytes and Page Programming buffer of 256 or 512 Bytes. So, flag SECT_4K have no significance for this flash.
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index edca94e..7ca33e8 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -101,7 +101,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL |
WR_QPP) },
{"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL |WR_QPP) },
{"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL| WR_QPP | SECT_4K) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512, RD_FULL |WR_QPP | SECT_4K) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256, RD_FULL |WR_QPP) },
Did you verify this? because we have an issue about this part number[1]
[1] https://lists.denx.de/pipermail/u-boot/2016-December/276032.html
I tested this patch on LS1012ARDB, LS1046ARDB and Ls1088ARDB boards having same flash. I do aware of [1] but as per my testing all works fine with erase size of 256 and block size of 256/512.
As per datasheet, [http://www.cypress.com/file/216376/download] also mention below, The uniform erase blocks are 256. So anyhow we required this patch even we need to disable 4KB erase.
Erase – Hybrid sector option – Physical set of eight 4-kbytes sectors and one 224-kbytes sector at the top or bottom of address space with all remaining sectors of 256 kbytes – Uniform sector option – Uniform 256 kbyte blocks
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
On 04/26/2017 12:47 AM, Suresh Gupta wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Wednesday, April 26, 2017 1:01 PM To: Suresh Gupta suresh.gupta@nxp.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; york sun york.sun@nxp.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
On Tue, Apr 25, 2017 at 2:51 PM, Suresh Gupta suresh.gupta@nxp.com wrote:
As per data sheet, S25FS512S support Uniform sector option or erase size of 256 kbytes and Page Programming buffer of 256 or 512 Bytes. So, flag SECT_4K have no significance for this flash.
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index edca94e..7ca33e8 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -101,7 +101,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL |
WR_QPP) },
{"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL |WR_QPP) },
{"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL| WR_QPP | SECT_4K) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512, RD_FULL |WR_QPP | SECT_4K) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256, RD_FULL |WR_QPP) },
Did you verify this? because we have an issue about this part number[1]
[1] https://lists.denx.de/pipermail/u-boot/2016-December/276032.html
I tested this patch on LS1012ARDB, LS1046ARDB and Ls1088ARDB boards having same flash. I do aware of [1] but as per my testing all works fine with erase size of 256 and block size of 256/512.
As per datasheet, [http://www.cypress.com/file/216376/download] also mention below, The uniform erase blocks are 256. So anyhow we required this patch even we need to disable 4KB erase.
Erase – Hybrid sector option – Physical set of eight 4-kbytes sectors and one 224-kbytes sector at the top or bottom of address space with all remaining sectors of 256 kbytes – Uniform sector option – Uniform 256 kbyte blocks
Suresh,
Did you test your patch after removing CONFIG_SPI_FLASH_BAR? Why doesn't this flash support BAR commands? How did it work before broken?
York
-----Original Message----- From: York Sun [mailto:york.sun@nxp.com] Sent: Thursday, April 27, 2017 4:35 AM To: Suresh Gupta suresh.gupta@nxp.com; Jagan Teki jagannadh.teki@gmail.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
On 04/26/2017 12:47 AM, Suresh Gupta wrote:
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Wednesday, April 26, 2017 1:01 PM To: Suresh Gupta suresh.gupta@nxp.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; york sun york.sun@nxp.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
On Tue, Apr 25, 2017 at 2:51 PM, Suresh Gupta suresh.gupta@nxp.com wrote:
As per data sheet, S25FS512S support Uniform sector option or erase size of 256 kbytes and Page Programming buffer of 256 or 512 Bytes. So, flag SECT_4K have no significance for this flash.
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index edca94e..7ca33e8 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -101,7 +101,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL
|
WR_QPP) },
{"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL|
WR_QPP) },
{"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512,RD_FULL
| WR_QPP | SECT_4K) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512, RD_FULL|
WR_QPP | SECT_4K) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256,RD_FULL |
WR_QPP) },
Did you verify this? because we have an issue about this part number[1]
[1] https://lists.denx.de/pipermail/u-boot/2016-December/276032.html
I tested this patch on LS1012ARDB, LS1046ARDB and Ls1088ARDB boards
having same flash.
I do aware of [1] but as per my testing all works fine with erase size of 256
and block size of 256/512.
As per datasheet, [http://www.cypress.com/file/216376/download] also mention below, The uniform erase blocks are 256. So anyhow we required this
patch even we need to disable 4KB erase.
Erase – Hybrid sector option – Physical set of eight 4-kbytes sectors and one 224-kbytes sector at the top or bottom of address space with all remaining sectors of 256 kbytes – Uniform sector option – Uniform 256 kbyte blocks
Suresh,
Did you test your patch after removing CONFIG_SPI_FLASH_BAR? Why doesn't this flash support BAR commands? How did it work before broken?
York, the flash s25fs512s support 32 bit address to handle >16M memory access. With and without CONFIG_SPI_FLASH_BAR the u-boot only access up to 16M of flash memory for this particular flash which is installed on our boards (LS1012ARDB, LS1046ARDB, LS1088ARDB, LS2088ARDB). So, anyhow we need to remove this CONFIG_SPI_FLASH_BAR from our boards configs.
For accessing >16M of flash memory (to support 32 bit address) I already start discussion [2] with Jagan. Hopefully We have a solution for that in near future. [2] https://patchwork.ozlabs.org/patch/676152/
Thanks SuresH
On 04/26/2017 10:17 PM, Suresh Gupta wrote:
<snip>
Suresh,
Did you test your patch after removing CONFIG_SPI_FLASH_BAR? Why doesn't this flash support BAR commands? How did it work before broken?
York, the flash s25fs512s support 32 bit address to handle >16M memory access. With and without CONFIG_SPI_FLASH_BAR the u-boot only access up to 16M of flash memory for this particular flash which is installed on our boards (LS1012ARDB, LS1046ARDB, LS1088ARDB, LS2088ARDB). So, anyhow we need to remove this CONFIG_SPI_FLASH_BAR from our boards configs.
For accessing >16M of flash memory (to support 32 bit address) I already start discussion [2] with Jagan. Hopefully We have a solution for that in near future. [2] https://patchwork.ozlabs.org/patch/676152/
How did it (>16MB) work before?
York
-----Original Message----- From: York Sun [mailto:york.sun@nxp.com] Sent: Thursday, April 27, 2017 10:18 PM To: Suresh Gupta suresh.gupta@nxp.com; Jagan Teki jagannadh.teki@gmail.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
On 04/26/2017 10:17 PM, Suresh Gupta wrote:
<snip>
Suresh,
Did you test your patch after removing CONFIG_SPI_FLASH_BAR? Why doesn't this flash support BAR commands? How did it work before broken?
York, the flash s25fs512s support 32 bit address to handle >16M memory
access.
With and without CONFIG_SPI_FLASH_BAR the u-boot only access up to 16M of flash memory for this particular flash which is installed on our boards
(LS1012ARDB, LS1046ARDB, LS1088ARDB, LS2088ARDB).
So, anyhow we need to remove this CONFIG_SPI_FLASH_BAR from our boards
configs.
For accessing >16M of flash memory (to support 32 bit address) I already start discussion [2] with Jagan. Hopefully We have a solution for that
in near future.
How did it (>16MB) work before?
York
According to me for this s25fs512s particular flash, >16M should not work in open source code. If you have any commit id where it works, let me know. I will try at my end and update you
On 04/27/2017 10:26 PM, Suresh Gupta wrote:
-----Original Message----- From: York Sun [mailto:york.sun@nxp.com] Sent: Thursday, April 27, 2017 10:18 PM To: Suresh Gupta suresh.gupta@nxp.com; Jagan Teki jagannadh.teki@gmail.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
On 04/26/2017 10:17 PM, Suresh Gupta wrote:
<snip>
Suresh,
Did you test your patch after removing CONFIG_SPI_FLASH_BAR? Why doesn't this flash support BAR commands? How did it work before broken?
York, the flash s25fs512s support 32 bit address to handle >16M memory
access.
With and without CONFIG_SPI_FLASH_BAR the u-boot only access up to 16M of flash memory for this particular flash which is installed on our boards
(LS1012ARDB, LS1046ARDB, LS1088ARDB, LS2088ARDB).
So, anyhow we need to remove this CONFIG_SPI_FLASH_BAR from our boards
configs.
For accessing >16M of flash memory (to support 32 bit address) I already start discussion [2] with Jagan. Hopefully We have a solution for that
in near future.
How did it (>16MB) work before?
York
According to me for this s25fs512s particular flash, >16M should not work in open source code. If you have any commit id where it works, let me know. I will try at my end and update you
Suresh,
Where are we on this? The internal U-Boot has it working (previous SDK release). Did you check?
York
-----Original Message----- From: York Sun [mailto:york.sun@nxp.com] Sent: Friday, May 12, 2017 11:23 PM To: Suresh Gupta suresh.gupta@nxp.com; Jagan Teki jagannadh.teki@gmail.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
On 04/27/2017 10:26 PM, Suresh Gupta wrote:
-----Original Message----- From: York Sun [mailto:york.sun@nxp.com] Sent: Thursday, April 27, 2017 10:18 PM To: Suresh Gupta suresh.gupta@nxp.com; Jagan Teki jagannadh.teki@gmail.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
On 04/26/2017 10:17 PM, Suresh Gupta wrote:
<snip>
Suresh,
Did you test your patch after removing CONFIG_SPI_FLASH_BAR? Why doesn't this flash support BAR commands? How did it work before broken?
York, the flash s25fs512s support 32 bit address to handle >16M memory
access.
With and without CONFIG_SPI_FLASH_BAR the u-boot only access up to 16M of flash memory for this particular flash which is installed on our boards
(LS1012ARDB, LS1046ARDB, LS1088ARDB, LS2088ARDB).
So, anyhow we need to remove this CONFIG_SPI_FLASH_BAR from our boards
configs.
For accessing >16M of flash memory (to support 32 bit address) I already start discussion [2] with Jagan. Hopefully We have a solution for that
in near future.
How did it (>16MB) work before?
York
According to me for this s25fs512s particular flash, >16M should not work in
open source code.
If you have any commit id where it works, let me know. I will try at my end and update you
Suresh,
Where are we on this? The internal U-Boot has it working (previous SDK release). Did you check?
York
York, It is working in internal U-boot which have set of patches which are not up streamed, one of which is similar to mine patch. Along with this, CONFIG_SPI_FLASH_BAR is disable and new flag ADDR_4B is added and couple of other changes. All this is on our internal u-boot and never be working on open-source. Yao send some of the patches to open source but are rejected by Jagan.
So my intention is to make at least 16M memory access for this particular flash and then I start discussion with Jagan to include code to access this type of flash as we are coming with similar type of flashes in new platforms.
Thanks SuresH
Hi Suresh,
This what I understood based on my previous datasheet read __attached__
In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB.
To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately.
So the lower 8 4k sectors are unaffected even if we do sector erase(d8h)? What if we do 4k erase(20h) whole flash all effected?
thanks!
-----Original Message----- From: Jagan Teki [mailto:jagan@amarulasolutions.com] Sent: Wednesday, June 07, 2017 12:33 PM To: Suresh Gupta suresh.gupta@nxp.com Cc: york sun york.sun@nxp.com; Jagan Teki jagannadh.teki@gmail.com; u- boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
Hi Suresh,
This what I understood based on my previous datasheet read __attached__
In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB.
To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately.
So the lower 8 4k sectors are unaffected even if we do sector erase(d8h)? What if we do 4k erase(20h) whole flash all effected?
Erasing flash with 4k erase(20h) do not erase the whole chip and also not able to erase address Space of remaining sectors of 256 kbytes . this I tried with my experiments.
So best way is to disable hybrid mode and configure flash in Uniform Sector Architecture
thanks!
Jagan Teki Senior Linux Kernel Engineer | Amarula Solutions U-Boot, Linux | Upstream Maintainer Hyderabad, India.
On Wed, Jun 7, 2017 at 1:11 PM, Suresh Gupta suresh.gupta@nxp.com wrote:
-----Original Message----- From: Jagan Teki [mailto:jagan@amarulasolutions.com] Sent: Wednesday, June 07, 2017 12:33 PM To: Suresh Gupta suresh.gupta@nxp.com Cc: york sun york.sun@nxp.com; Jagan Teki jagannadh.teki@gmail.com; u- boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
Hi Suresh,
This what I understood based on my previous datasheet read __attached__
In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB.
To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately.
So the lower 8 4k sectors are unaffected even if we do sector erase(d8h)? What if we do 4k erase(20h) whole flash all effected?
Erasing flash with 4k erase(20h) do not erase the whole chip and also not able to erase address Space of remaining sectors of 256 kbytes . this I tried with my experiments.
So best way is to disable hybrid mode and configure flash in Uniform Sector Architecture
OK, then send patches to Linux and U-Boot will review and take other suggestions too.
thanks!
<snip>
So best way is to disable hybrid mode and configure flash in Uniform Sector Architecture
OK, then send patches to Linux and U-Boot will review and take other suggestions too.
Thanks Jagan, I will send U-boot patches (after testing) by early next week.
My next point :) to discuss is "32-bit address options". This particular flash do not support below commands /* Bank addr access commands */ #ifdef CONFIG_SPI_FLASH_BAR # define CMD_BANKADDR_BRWR 0x17 # define CMD_BANKADDR_BRRD 0x16 # define CMD_EXTNADDR_WREAR 0xC5 # define CMD_EXTNADDR_RDEAR 0xC8 #endif
Instead of above S25FS512S flash support 32-bit address commands like 4READ, 4P4E and many more which require 32 bit address directly pass on wires.
Jagan, So, Do we have any plan to fix this? Yao Yuan already send one patch [1] for same. I think this is a decent approach [1]. If required I will resend this patch with little changes.
[1] https://patchwork.ozlabs.org/patch/676152/
Thanks SuresH
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
Hi Suresh,
On Thu, Jun 8, 2017 at 1:00 PM, Suresh Gupta suresh.gupta@nxp.com wrote:
<snip> > > > > So best way is to disable hybrid mode and configure flash in Uniform > > Sector Architecture > > OK, then send patches to Linux and U-Boot will review and take other > suggestions too. >
Thanks Jagan, I will send U-boot patches (after testing) by early next week.
My next point :) to discuss is "32-bit address options". This particular flash do not support below commands /* Bank addr access commands */ #ifdef CONFIG_SPI_FLASH_BAR # define CMD_BANKADDR_BRWR 0x17 # define CMD_BANKADDR_BRRD 0x16 # define CMD_EXTNADDR_WREAR 0xC5 # define CMD_EXTNADDR_RDEAR 0xC8 #endif
Instead of above S25FS512S flash support 32-bit address commands like 4READ, 4P4E and many more which require 32 bit address directly pass on wires.
Jagan, So, Do we have any plan to fix this? Yao Yuan already send one patch [1] for same. I think this is a decent approach [1]. If required I will resend this patch with little changes.
Don't know whether you tried this or not.
- Erase bottom 4K sectors using 4K - Erase middle sectors using SE - Erase top 4K sectors using 4K
thanks!
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Monday, June 12, 2017 11:37 AM To: Suresh Gupta suresh.gupta@nxp.com Cc: Jagan Teki jagan@amarulasolutions.com; york sun york.sun@nxp.com; u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
Hi Suresh,
On Thu, Jun 8, 2017 at 1:00 PM, Suresh Gupta suresh.gupta@nxp.com wrote:
<snip> > > > > So best way is to disable hybrid mode and configure flash in > > Uniform Sector Architecture > > OK, then send patches to Linux and U-Boot will review and take other > suggestions too. >
Thanks Jagan, I will send U-boot patches (after testing) by early next week.
My next point :) to discuss is "32-bit address options". This particular flash do not support below commands /* Bank addr access commands */ #ifdef CONFIG_SPI_FLASH_BAR # define CMD_BANKADDR_BRWR 0x17 # define CMD_BANKADDR_BRRD 0x16 # define CMD_EXTNADDR_WREAR 0xC5 # define CMD_EXTNADDR_RDEAR 0xC8 #endif
Instead of above S25FS512S flash support 32-bit address commands like 4READ, 4P4E and many more which require 32 bit address directly pass on
wires.
Jagan, So, Do we have any plan to fix this? Yao Yuan already send one patch [1] for same. I think this is a decent approach [1]. If required I will resend this patch with
little changes.
Don't know whether you tried this or not.
- Erase bottom 4K sectors using 4K
- Erase middle sectors using SE
- Erase top 4K sectors using 4K
I will try all combinations and let you know the results.
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
-----Original Message----- From: Suresh Gupta Sent: Monday, June 12, 2017 2:18 PM To: 'Jagan Teki' jagannadh.teki@gmail.com Cc: Jagan Teki jagan@amarulasolutions.com; york sun york.sun@nxp.com; u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: RE: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Monday, June 12, 2017 11:37 AM To: Suresh Gupta suresh.gupta@nxp.com Cc: Jagan Teki jagan@amarulasolutions.com; york sun york.sun@nxp.com; u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
Hi Suresh,
On Thu, Jun 8, 2017 at 1:00 PM, Suresh Gupta suresh.gupta@nxp.com
wrote:
<snip> > > > > So best way is to disable hybrid mode and configure flash in > > Uniform Sector Architecture > > OK, then send patches to Linux and U-Boot will review and take > other suggestions too. >
Thanks Jagan, I will send U-boot patches (after testing) by early next week.
My next point :) to discuss is "32-bit address options". This particular flash do not support below commands /* Bank addr access commands */ #ifdef CONFIG_SPI_FLASH_BAR # define CMD_BANKADDR_BRWR 0x17 # define CMD_BANKADDR_BRRD 0x16 # define CMD_EXTNADDR_WREAR 0xC5 # define CMD_EXTNADDR_RDEAR 0xC8 #endif
Instead of above S25FS512S flash support 32-bit address commands like 4READ, 4P4E and many more which require 32 bit address directly pass on
wires.
Jagan, So, Do we have any plan to fix this? Yao Yuan already send one patch [1] for same. I think this is a decent approach [1]. If required I will resend this patch with
little changes.
Don't know whether you tried this or not.
- Erase bottom 4K sectors using 4K
- Erase middle sectors using SE
- Erase top 4K sectors using 4K
I will try all combinations and let you know the results.
Jagan, The problem here is, I have all board in which we disable hybrid mode and we write this in nonvolatile register. So on my boards 4K erase (0x20) is not working on any of the sectors. Please suggest.
Hybrid mode of this flash supports, - Physical set of eight 4-kbytes sectors and - one 224-kbytes sector at the top or bottom of address space with - all remaining sectors of 256 kbytes. So even if we are able to erase eight sectors via cmd 4K and rest via 256 kbyte(0xd8) Then what about one sector of 224 Kbytes. And how we tell user about this erase pattern.
Again, my suggestion is to disable hybrid mode (volatile) and we may revisit if anyone come up with different approach Please suggest.
Thanks SuresH
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
Hi Jagan,
Sorry for late reply to your queries, I copied your query here to make continuation of mail.
Don't know whether you tried this or not.
- Erase bottom 4K sectors using 4K
- Erase middle sectors using SE
- Erase top 4K sectors using 4K
We are able to manage a flash to run in hybrid mode (IE default mode) and in this mode few top 4K sectors get erased by 4K command but no other sectors get erased with 4K cmd. In non hybrid mode, we are able to erase all flash uniformly with SE cmd but 4K is not working.
So we need to remove the SECT_4K flag for s25fs512s if we want uniform commad command for full flash. Also, we need a patch [1] to disable hybrid mode/disable 4K erase.
[1] https://lists.denx.de/pipermail/u-boot/2017-March/285010.html
Thanks SuresH
-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Suresh Gupta Sent: Monday, June 12, 2017 7:33 PM To: Jagan Teki jagannadh.teki@gmail.com Cc: u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
-----Original Message----- From: Suresh Gupta Sent: Monday, June 12, 2017 2:18 PM To: 'Jagan Teki' jagannadh.teki@gmail.com Cc: Jagan Teki jagan@amarulasolutions.com; york sun york.sun@nxp.com; u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: RE: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
-----Original Message----- From: Jagan Teki [mailto:jagannadh.teki@gmail.com] Sent: Monday, June 12, 2017 11:37 AM To: Suresh Gupta suresh.gupta@nxp.com Cc: Jagan Teki jagan@amarulasolutions.com; york sun york.sun@nxp.com; u-boot@lists.denx.de; Jagan Teki jagan@openedev.com; Yao Yuan yao.yuan@nxp.com Subject: Re: [U-Boot] [PATCH] sf: Fix s25fs512s erase size and remove SECT_4K flag
Hi Suresh,
On Thu, Jun 8, 2017 at 1:00 PM, Suresh Gupta suresh.gupta@nxp.com
wrote:
<snip> > > > > So best way is to disable hybrid mode and configure flash in > > Uniform Sector Architecture > > OK, then send patches to Linux and U-Boot will review and take > other suggestions too. >
Thanks Jagan, I will send U-boot patches (after testing) by early next week.
My next point :) to discuss is "32-bit address options". This particular flash do not support below commands /* Bank addr access commands */ #ifdef CONFIG_SPI_FLASH_BAR # define CMD_BANKADDR_BRWR 0x17 # define CMD_BANKADDR_BRRD 0x16 # define CMD_EXTNADDR_WREAR 0xC5 # define CMD_EXTNADDR_RDEAR 0xC8 #endif
Instead of above S25FS512S flash support 32-bit address commands like 4READ, 4P4E and many more which require 32 bit address directly pass on
wires.
Jagan, So, Do we have any plan to fix this? Yao Yuan already send one patch [1] for same. I think this is a decent approach [1]. If required I will resend this patch with
little changes.
Don't know whether you tried this or not.
- Erase bottom 4K sectors using 4K
- Erase middle sectors using SE
- Erase top 4K sectors using 4K
I will try all combinations and let you know the results.
Jagan, The problem here is, I have all board in which we disable hybrid mode and we write this in nonvolatile register. So on my boards 4K erase (0x20) is not working on any of the sectors. Please suggest.
Hybrid mode of this flash supports,
- Physical set of eight 4-kbytes sectors and - one 224-kbytes sector at the top or bottom of address space with - all remaining sectors of 256 kbytes.
So even if we are able to erase eight sectors via cmd 4K and rest via 256 kbyte(0xd8) Then what about one sector of 224 Kbytes. And how we tell user about this erase pattern.
Again, my suggestion is to disable hybrid mode (volatile) and we may revisit if anyone come up with different approach Please suggest.
Thanks SuresH
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
On 04/25/2017 02:20 AM, Suresh Gupta wrote:
ls1012ardb, ls1046ardb, ls2080ardb has S25FS512S flash which do not support Bank Address Register commands
Signed-off-by: Suresh Gupta suresh.gupta@nxp.com
include/configs/ls1012a_common.h | 1 - include/configs/ls1046ardb.h | 1 - include/configs/ls2080ardb.h | 1 - 3 files changed, 3 deletions(-)
Changed subject tag to armv8: layerscape:. Fixed grammar error in commit message. Applied to fsl-qoriq master, awaiting upstream. Thanks.
York
participants (5)
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Jagan Teki -
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