[U-Boot] Nor Flash SST39VF6402B cfi compliant support
Hi all, In my experience the SST39VF6402B has become full compliant with CFI mtd interface just few linux kernel ago. In linux 2.6.17 it was not. I'm developing on U-Boot 2010.06-rc2-07985-g53f7677-dirty (lug 15 2010 - 11:41:21)
is it compliant with SST39VF6402B
Is among of you other people using on their own board such a flash?
Thanks a lot
Hi Fabio,
On Thursday 15 July 2010 11:55:17 Fabio Giovagnini wrote:
In my experience the SST39VF6402B has become full compliant with CFI mtd interface just few linux kernel ago. In linux 2.6.17 it was not. I'm developing on U-Boot 2010.06-rc2-07985-g53f7677-dirty (lug 15 2010 - 11:41:21)
is it compliant with SST39VF6402B
Is among of you other people using on their own board such a flash?
No. I haven't used those SST parts for a long time. But I assume that its still not 100% CFI compliant. But you can use the legacy infrastructure to add support to it. Shouldn't be to difficult. Take a look at:
CONFIG_FLASH_CFI_LEGACY
and
drivers/mtd/jedec_flash.c
Cheers, Stefan
-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office@denx.de
I Stefan. I did teh following upgrade of the fileyou suggestied to me.
#define SST39VF6402B 0x236c ... #ifdef CONFIG_SYS_FLASH_LEGACY_4Mx16 { .mfr_id = (u16)SST_MANUFACT, .dev_id = SST39VF6402B, .name = "SST 39VF6402B", .uaddr = { [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ }, .DevSize = SIZE_4MiB, .CmdSet = CFI_CMDSET_AMD_LEGACY, .NumEraseRegions= 1, .regions = { ERASEINFO(0x10000,128), } }, #endif
The flash works, but not properly. My conention is A1 mcp Bus cocceted to A0 of flash chip to have 16 bit width for data bus. The flash datasheet tells the flash os organized in 128 32kword of esare sectors. So I think my setting is not correct. Is it?
Thanks a lot and best regards
In data lunedì 19 luglio 2010 09:52:23, Stefan Roese ha scritto: : > Hi Fabio,
On Thursday 15 July 2010 11:55:17 Fabio Giovagnini wrote:
In my experience the SST39VF6402B has become full compliant with CFI mtd interface just few linux kernel ago. In linux 2.6.17 it was not. I'm developing on U-Boot 2010.06-rc2-07985-g53f7677-dirty (lug 15 2010 - 11:41:21)
is it compliant with SST39VF6402B
Is among of you other people using on their own board such a flash?
No. I haven't used those SST parts for a long time. But I assume that its still not 100% CFI compliant. But you can use the legacy infrastructure to add support to it. Shouldn't be to difficult. Take a look at:
CONFIG_FLASH_CFI_LEGACY
and
drivers/mtd/jedec_flash.c
Cheers, Stefan
-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office@denx.de
On Monday 19 July 2010 11:04:34 Fabio Giovagnini wrote:
I Stefan. I did teh following upgrade of the fileyou suggestied to me.
#define SST39VF6402B 0x236c ... #ifdef CONFIG_SYS_FLASH_LEGACY_4Mx16 { .mfr_id = (u16)SST_MANUFACT, .dev_id = SST39VF6402B, .name = "SST 39VF6402B", .uaddr = { [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ }, .DevSize = SIZE_4MiB, .CmdSet = CFI_CMDSET_AMD_LEGACY, .NumEraseRegions= 1, .regions = { ERASEINFO(0x10000,128), } }, #endif
The flash works, but not properly.
What's exactly not working?
My conention is A1 mcp Bus cocceted to A0 of flash chip to have 16 bit width for data bus. The flash datasheet tells the flash os organized in 128 32kword of esare sectors. So I think my setting is not correct. Is it?
Could be. IIRC, then the SST parts have 2 different erase regions, the "normal" ones and the smaller ones (4k???). Not sure which one is used by this command set. I suggest you investigate here further.
Cheers, Stefan
-- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office@denx.de
participants (2)
-
Fabio Giovagnini -
Stefan Roese