[U-Boot] [PATCH 0/2] axs103: Add support of v1.1 firmware
Even though from software developer PoV not much has changed in v1.1 firmware for axs103 board still there's an important modification introduced by SNPS hardware team: slave cores kick-start procedure now differs and we need to accommodate this change in U-Boot.
Alexey Brodkin (2): axs103: Clean-up smp_kick_all_cpus() axs103: Support slave core kick-start on axs103 v1.1 firmware
board/synopsys/axs10x/axs10x.c | 30 ++++++++++++++++++++++++------ 1 file changed, 24 insertions(+), 6 deletions(-)
* Rely on default pulse polarity value * Don't mess with "multicore" value as it doesn't affect execution
In essence we now do a bare minimal stuff: 1) Select HS38x2_1 with CORE_SEL=1 bits 2) Select "manual" core start (via CREG) with START_MODE=0 3) Generate cpu_start pulse with START=1
Signed-off-by: Alexey Brodkin abrodkin@synopsys.com --- board/synopsys/axs10x/axs10x.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c index a5e774b2cf7b..57c790220f71 100644 --- a/board/synopsys/axs10x/axs10x.c +++ b/board/synopsys/axs10x/axs10x.c @@ -61,16 +61,14 @@ void smp_kick_all_cpus(void) { /* CPU start CREG */ #define AXC003_CREG_CPU_START 0xF0001400 - /* Bits positions in CPU start CREG */ #define BITS_START 0 -#define BITS_POLARITY 8 +#define BITS_START_MODE 4 #define BITS_CORE_SEL 9 -#define BITS_MULTICORE 12 - -#define CMD (1 << BITS_MULTICORE) | (1 << BITS_CORE_SEL) | \ - (1 << BITS_POLARITY) | (1 << BITS_START)
- writel(CMD, (void __iomem *)AXC003_CREG_CPU_START); + int cmd = readl((void __iomem *)AXC003_CREG_CPU_START); + cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START); + cmd &= ~(1 << BITS_START_MODE); + writel(cmd, (void __iomem *)AXC003_CREG_CPU_START); } #endif
In axs103 v1.1 procedure to kick-start slave cores has changed quite a bit compared t previous implementation.
In particular: * We used to have a generic START bit for all cores selected by CORE_SEL mask. But now we don't touch CORE_SEL at all because we have a dedicated START bit for each core: bit 0: Core 0 (master) bit 1: Core 1 (slave) * Now there's no need to select "manual" mode of core start
Additional challenge for us is how to tell which axs103 firmware we're dealing with. For now we'll rely on ARC core version which was bumped from 2.1c to 3.0.
Signed-off-by: Alexey Brodkin abrodkin@synopsys.com --- board/synopsys/axs10x/axs10x.c | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c index 57c790220f71..912764a3d807 100644 --- a/board/synopsys/axs10x/axs10x.c +++ b/board/synopsys/axs10x/axs10x.c @@ -7,6 +7,7 @@ #include <common.h> #include <dwmmc.h> #include <malloc.h> +#include <asm/arcregs.h> #include "axs10x.h"
DECLARE_GLOBAL_DATA_PTR; @@ -66,9 +67,27 @@ void smp_kick_all_cpus(void) #define BITS_START_MODE 4 #define BITS_CORE_SEL 9
+/* + * In axs103 v1.1 START bits semantics has changed quite a bit. + * We used to have a generic START bit for all cores selected by CORE_SEL mask. + * But now we don't touch CORE_SEL at all because we have a dedicated START bit + * for each core: + * bit 0: Core 0 (master) + * bit 1: Core 1 (slave) + */ +#define BITS_START_CORE1 1 + +#define ARCVER_HS38_3_0 0x53 + + int core_family = read_aux_reg(ARC_AUX_IDENTITY) & 0xff; int cmd = readl((void __iomem *)AXC003_CREG_CPU_START); - cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START); - cmd &= ~(1 << BITS_START_MODE); + + if (core_family < ARCVER_HS38_3_0) { + cmd |= (1 << BITS_CORE_SEL) | (1 << BITS_START); + cmd &= ~(1 << BITS_START_MODE); + } else { + cmd |= (1 << BITS_START_CORE1); + } writel(cmd, (void __iomem *)AXC003_CREG_CPU_START); } #endif
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Alexey Brodkin