Due to list size limitations, I have sent a patch directly to Wolfgang Denk which add support for a custom Virtex2Pro FPGA (PPC405) based ant2 board. The board uses a Xilinx SystemACE to configure the FPGA and a Compact Flash card to store FPGA configuration data. The ant2 BSP stores all nonvolatile data on the CF card since the board does not have any fixed (i.e. non-removable) nonvolatile memory. The CF card contains the FPGA configuration bitstream, the kernel image, the root filesystem image, a default environment initialization script, and the U-Boot bootloader image. A small Initial Program Loader (IPL) is incorporated into the FPGA bitstream and is placed into on-chip FPGA RAM at FPGA configuration. The IPL loads the U-Boot image into main memory and then transfers control. This two stage scheme reduces the FPGA on-chip RAM requirements from approximately 256 KiB to approximately 25 KiB.

Signed-off-by: Keith Outwater outwater4@comcast.net