[U-Boot] [PATCH 0/2] ARM: OMAP4+: vcores: Make scale_vcores common
This series removes the unnecessary #ifdes and make the scale_vcores code common to all OMAP4+ platforms.
Build tested on all omaps using buildman. Boot tested on: DRA72-evm, DRA74-evm, AM57xx-evm, OMAP5-uevm,
Lokesh Vutla (2): ARM: OMAP5+: vcores: Drop unnecessary #ifndefs ARM: OMAP4+: vcores: Remove duplicated code
arch/arm/cpu/armv7/omap-common/clocks-common.c | 69 ++++---------------------- arch/arm/cpu/armv7/omap5/hw_data.c | 2 + 2 files changed, 13 insertions(+), 58 deletions(-)
gpio_en field is introduced to detect if pmic is controlled by GPIO. Make this field 0 on all TPS659* pmics available on DRA7/OMAP5 based platforms and remove the #ifndefs.
Reviewed-by: Keerthy j-keerthy@ti.com Signed-off-by: Lokesh Vutla lokeshvutla@ti.com --- arch/arm/cpu/armv7/omap-common/clocks-common.c | 7 +------ arch/arm/cpu/armv7/omap5/hw_data.c | 2 ++ 2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c index 2de9935..7e5e752 100644 --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c @@ -443,15 +443,12 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic) { u32 offset_code; u32 offset = volt_mv; -#ifndef CONFIG_DRA7XX int ret = 0; -#endif
if (!volt_mv) return;
pmic->pmic_bus_init(); -#ifndef CONFIG_DRA7XX /* See if we can first get the GPIO if needed */ if (pmic->gpio_en) ret = gpio_request(pmic->gpio, "PMIC_GPIO"); @@ -465,7 +462,7 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic) /* Pull the GPIO low to select SET0 register, while we program SET1 */ if (pmic->gpio_en) gpio_direction_output(pmic->gpio, 0); -#endif + /* convert to uV for better accuracy in the calculations */ offset *= 1000;
@@ -476,10 +473,8 @@ void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic)
if (pmic->pmic_write(pmic->i2c_slave_addr, vcore_reg, offset_code)) printf("Scaling voltage failed for 0x%x\n", vcore_reg); -#ifndef CONFIG_DRA7XX if (pmic->gpio_en) gpio_direction_output(pmic->gpio, 1); -#endif }
static u32 optimize_vcore_voltage(struct volts const *v) diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index a83f68c..fc99135 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -318,6 +318,7 @@ struct pmic_data palmas = { .i2c_slave_addr = SMPS_I2C_SLAVE_ADDR, .pmic_bus_init = sri2c_init, .pmic_write = omap_vc_bypass_send_value, + .gpio_en = 0, };
/* The TPS659038 and TPS65917 are software-compatible, use common struct */ @@ -332,6 +333,7 @@ struct pmic_data tps659038 = { .i2c_slave_addr = TPS659038_I2C_SLAVE_ADDR, .pmic_bus_init = gpi2c_init, .pmic_write = palmas_i2c_write_u8, + .gpio_en = 0, };
struct vcores_data omap5430_volts = {
On Wed, Aug 17, 2016 at 04:25:35PM +0530, Lokesh Vutla wrote:
gpio_en field is introduced to detect if pmic is controlled by GPIO. Make this field 0 on all TPS659* pmics available on DRA7/OMAP5 based platforms and remove the #ifndefs.
Reviewed-by: Keerthy j-keerthy@ti.com Signed-off-by: Lokesh Vutla lokeshvutla@ti.com
The gpio_en field is part of the BSS and would already be 0, however, this makes the code clearer when reading when is important, so I'm OK with the change.
Reviewed-by: Tom Rini trini@konsulko.com
On Wed, Aug 17, 2016 at 04:25:35PM +0530, Lokesh Vutla wrote:
gpio_en field is introduced to detect if pmic is controlled by GPIO. Make this field 0 on all TPS659* pmics available on DRA7/OMAP5 based platforms and remove the #ifndefs.
Reviewed-by: Keerthy j-keerthy@ti.com Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Reviewed-by: Tom Rini trini@konsulko.com
Applied to u-boot/master, thanks!
There is no reason to duplicate code for DRA7xx platforms as there can be Rail grouping. The maximum voltage detection algorithm can still be run on other platforms with no Rail grouping and does not harm as it gives the same result.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com --- arch/arm/cpu/armv7/omap-common/clocks-common.c | 62 +++++--------------------- 1 file changed, 10 insertions(+), 52 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c index 7e5e752..9b97583 100644 --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c @@ -529,7 +529,6 @@ void __weak recalibrate_iodelay(void) */ void scale_vcores(struct vcores_data const *vcores) { -#if defined(CONFIG_DRA7XX) int i; struct volts *pv = (struct volts *)vcores; struct volts *px; @@ -589,7 +588,16 @@ void scale_vcores(struct vcores_data const *vcores) vcores->mpu.abb_tx_done_mask, OMAP_ABB_FAST_OPP);
- /* The .mm member is not used for the DRA7xx */ + debug("mm: %d\n", vcores->mm.value); + do_scale_vcore(vcores->mm.addr, vcores->mm.value, vcores->mm.pmic); + /* Configure MM ABB LDO after scale */ + abb_setup(vcores->mm.efuse.reg, + (*ctrl)->control_wkup_ldovbb_mm_voltage_ctrl, + (*prcm)->prm_abbldo_mm_setup, + (*prcm)->prm_abbldo_mm_ctrl, + (*prcm)->prm_irqstatus_mpu, + vcores->mm.abb_tx_done_mask, + OMAP_ABB_FAST_OPP);
debug("gpu: %d\n", vcores->gpu.value); do_scale_vcore(vcores->gpu.addr, vcores->gpu.value, vcores->gpu.pmic); @@ -621,56 +629,6 @@ void scale_vcores(struct vcores_data const *vcores) (*prcm)->prm_irqstatus_mpu, vcores->iva.abb_tx_done_mask, OMAP_ABB_FAST_OPP); - /* Might need udelay(1000) here if debug is enabled to see all prints */ -#else - u32 val; - - val = optimize_vcore_voltage(&vcores->core); - do_scale_vcore(vcores->core.addr, val, vcores->core.pmic); - - /* - * IO delay recalibration should be done immediately after - * adjusting AVS voltages for VDD_CORE_L. - * Respective boards should call __recalibrate_iodelay() - * with proper mux, virtual and manual mode configurations. - */ -#ifdef CONFIG_IODELAY_RECALIBRATION - recalibrate_iodelay(); -#endif - - val = optimize_vcore_voltage(&vcores->mpu); - do_scale_vcore(vcores->mpu.addr, val, vcores->mpu.pmic); - - /* Configure MPU ABB LDO after scale */ - abb_setup(vcores->mpu.efuse.reg, - (*ctrl)->control_wkup_ldovbb_mpu_voltage_ctrl, - (*prcm)->prm_abbldo_mpu_setup, - (*prcm)->prm_abbldo_mpu_ctrl, - (*prcm)->prm_irqstatus_mpu_2, - vcores->mpu.abb_tx_done_mask, - OMAP_ABB_FAST_OPP); - - val = optimize_vcore_voltage(&vcores->mm); - do_scale_vcore(vcores->mm.addr, val, vcores->mm.pmic); - - /* Configure MM ABB LDO after scale */ - abb_setup(vcores->mm.efuse.reg, - (*ctrl)->control_wkup_ldovbb_mm_voltage_ctrl, - (*prcm)->prm_abbldo_mm_setup, - (*prcm)->prm_abbldo_mm_ctrl, - (*prcm)->prm_irqstatus_mpu, - vcores->mm.abb_tx_done_mask, - OMAP_ABB_FAST_OPP); - - val = optimize_vcore_voltage(&vcores->gpu); - do_scale_vcore(vcores->gpu.addr, val, vcores->gpu.pmic); - - val = optimize_vcore_voltage(&vcores->eve); - do_scale_vcore(vcores->eve.addr, val, vcores->eve.pmic); - - val = optimize_vcore_voltage(&vcores->iva); - do_scale_vcore(vcores->iva.addr, val, vcores->iva.pmic); -#endif }
static inline void enable_clock_domain(u32 const clkctrl_reg, u32 enable_mode)
On Wed, Aug 17, 2016 at 04:25:36PM +0530, Lokesh Vutla wrote:
There is no reason to duplicate code for DRA7xx platforms as there can be Rail grouping. The maximum voltage detection algorithm can still be run on other platforms with no Rail grouping and does not harm as it gives the same result.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com
Reviewed-by: Tom Rini trini@konsulko.com
On Wed, Aug 17, 2016 at 04:25:36PM +0530, Lokesh Vutla wrote:
There is no reason to duplicate code for DRA7xx platforms as there can be Rail grouping. The maximum voltage detection algorithm can still be run on other platforms with no Rail grouping and does not harm as it gives the same result.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com Reviewed-by: Tom Rini trini@konsulko.com
Applied to u-boot/master, thanks!
participants (2)
-
Lokesh Vutla -
Tom Rini