[U-Boot] [PATCH 1/3] dm: mips: Fix lb60 WDT control
Write the TSCR register via 32bit write instead of 16bit one. The register is 32bit wide and bit 16 is being set, triggering gcc overflow error and making the code broken.
Signed-off-by: Marek Vasut marex@denx.de Cc: Daniel zpxu@ingenic.cn Cc: Shinya Kuribayashi skuribay@pobox.com Cc: Xiangfu Liu xiangfu@openmobilefree.net --- arch/mips/cpu/xburst/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c index e976341..ddcbfaa 100644 --- a/arch/mips/cpu/xburst/cpu.c +++ b/arch/mips/cpu/xburst/cpu.c @@ -62,7 +62,7 @@ void __attribute__((weak)) _machine_restart(void)
writew(100, &wdt->tdr); /* wdt_set_data(100) */ writew(0, &wdt->tcnt); /* wdt_set_count(0); */ - writew(TCU_TSSR_WDTSC, &tcu->tscr); /* tcu_start_wdt_clock */ + writel(TCU_TSSR_WDTSC, &tcu->tscr); /* tcu_start_wdt_clock */ writeb(readb(&wdt->tcer) | WDT_TCER_TCEN, &wdt->tcer); /* wdt start */
while (1)
The timer code contains more halfword writes which trigger gcc errors. The registers are again 32bit, yet written by 16bit writes, fix this:
timer.c: In function ‘reset_timer_masked’: timer.c:37:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c: In function ‘get_timer_masked’: timer.c:43:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c: In function ‘timer_init’: timer.c:86:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c:88:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c:89:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c:90:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
Signed-off-by: Marek Vasut marex@denx.de Cc: Daniel zpxu@ingenic.cn Cc: Shinya Kuribayashi skuribay@pobox.com Cc: Xiangfu Liu xiangfu@openmobilefree.net --- arch/mips/cpu/xburst/timer.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/mips/cpu/xburst/timer.c b/arch/mips/cpu/xburst/timer.c index de6f5da..b6b3855 100644 --- a/arch/mips/cpu/xburst/timer.c +++ b/arch/mips/cpu/xburst/timer.c @@ -34,13 +34,13 @@ static struct jz4740_tcu *tcu = (struct jz4740_tcu *)JZ4740_TCU_BASE; void reset_timer_masked(void) { /* reset time */ - gd->lastinc = readw(&tcu->tcnt0); + gd->lastinc = readl(&tcu->tcnt0); gd->tbl = 0; }
ulong get_timer_masked(void) { - ulong now = readw(&tcu->tcnt0); + ulong now = readl(&tcu->tcnt0);
if (gd->lastinc <= now) gd->tbl += now - gd->lastinc; /* normal mode */ @@ -83,11 +83,11 @@ void udelay_masked(unsigned long usec)
int timer_init(void) { - writew(TCU_TCSR_PRESCALE256 | TCU_TCSR_EXT_EN, &tcu->tcsr0); + writel(TCU_TCSR_PRESCALE256 | TCU_TCSR_EXT_EN, &tcu->tcsr0);
- writew(0, &tcu->tcnt0); - writew(0, &tcu->tdhr0); - writew(TIMER_FDATA, &tcu->tdfr0); + writel(0, &tcu->tcnt0); + writel(0, &tcu->tdhr0); + writel(TIMER_FDATA, &tcu->tdfr0);
/* mask irqs */ writel((1 << TIMER_CHAN) | (1 << (TIMER_CHAN + 16)), &tcu->tmsr);
2012/7/27 Marek Vasut marex@denx.de:
The timer code contains more halfword writes which trigger gcc errors. The registers are again 32bit, yet written by 16bit writes, fix this:
timer.c: In function ‘reset_timer_masked’: timer.c:37:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c: In function ‘get_timer_masked’: timer.c:43:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c: In function ‘timer_init’: timer.c:86:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c:88:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c:89:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] timer.c:90:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
Signed-off-by: Marek Vasut marex@denx.de Cc: Daniel zpxu@ingenic.cn Cc: Shinya Kuribayashi skuribay@pobox.com Cc: Xiangfu Liu xiangfu@openmobilefree.net
arch/mips/cpu/xburst/timer.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
applied to u-boot-mips/master, thanks
The lb60 board accesses the clkgr register, which is 32bit via 16bit IO ops. This causes malfunction. Fix this.
qi_lb60.c: In function ‘cpm_init’: qi_lb60.c:72:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] qi_lb60.c:84:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
Signed-off-by: Marek Vasut marex@denx.de Cc: Daniel zpxu@ingenic.cn Cc: Shinya Kuribayashi skuribay@pobox.com Cc: Xiangfu Liu xiangfu@openmobilefree.net --- board/qi/qi_lb60/qi_lb60.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/qi/qi_lb60/qi_lb60.c b/board/qi/qi_lb60/qi_lb60.c index 3583d01..d975209 100644 --- a/board/qi/qi_lb60/qi_lb60.c +++ b/board/qi/qi_lb60/qi_lb60.c @@ -69,7 +69,7 @@ static void gpio_init(void) static void cpm_init(void) { struct jz4740_cpm *cpm = (struct jz4740_cpm *)JZ4740_CPM_BASE; - uint32_t reg = readw(&cpm->clkgr); + uint32_t reg = readl(&cpm->clkgr);
reg |= CPM_CLKGR_IPU | CPM_CLKGR_CIM | @@ -81,7 +81,7 @@ static void cpm_init(void) CPM_CLKGR_UDC | CPM_CLKGR_AIC1;
- writew(reg, &cpm->clkgr); + writel(reg, &cpm->clkgr); }
int board_early_init_f(void)
2012/7/27 Marek Vasut marex@denx.de:
The lb60 board accesses the clkgr register, which is 32bit via 16bit IO ops. This causes malfunction. Fix this.
qi_lb60.c: In function ‘cpm_init’: qi_lb60.c:72:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] qi_lb60.c:84:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
Signed-off-by: Marek Vasut marex@denx.de Cc: Daniel zpxu@ingenic.cn Cc: Shinya Kuribayashi skuribay@pobox.com Cc: Xiangfu Liu xiangfu@openmobilefree.net
board/qi/qi_lb60/qi_lb60.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
applied to u-boot-mips/master, thanks
Thanks Marek Vasu, Daniel Schwierzeck,
Xiangfu
On 08/20/2012 02:19 AM, Daniel Schwierzeck wrote:
2012/7/27 Marek Vasut marex@denx.de:
The lb60 board accesses the clkgr register, which is 32bit via 16bit IO ops. This causes malfunction. Fix this.
qi_lb60.c: In function ‘cpm_init’: qi_lb60.c:72:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] qi_lb60.c:84:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing]
Signed-off-by: Marek Vasut marex@denx.de Cc: Daniel zpxu@ingenic.cn Cc: Shinya Kuribayashi skuribay@pobox.com Cc: Xiangfu Liu xiangfu@openmobilefree.net
board/qi/qi_lb60/qi_lb60.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
applied to u-boot-mips/master, thanks
Dear Marek Vasut,
Write the TSCR register via 32bit write instead of 16bit one. The register is 32bit wide and bit 16 is being set, triggering gcc overflow error and making the code broken.
[...] Dan, can you please pick these (I didn't CC you ... sigh :/ ) ?
Best regards, Marek Vasut
2012/7/30 Marek Vasut marex@denx.de:
Dear Marek Vasut,
Write the TSCR register via 32bit write instead of 16bit one. The register is 32bit wide and bit 16 is being set, triggering gcc overflow error and making the code broken.
[...] Dan, can you please pick these (I didn't CC you ... sigh :/ ) ?
Sure. I'm still waiting for some comments from Xiangfu.
Best regards, Daniel
2012/7/27 Marek Vasut marex@denx.de:
Write the TSCR register via 32bit write instead of 16bit one. The register is 32bit wide and bit 16 is being set, triggering gcc overflow error and making the code broken.
Signed-off-by: Marek Vasut marex@denx.de Cc: Daniel zpxu@ingenic.cn Cc: Shinya Kuribayashi skuribay@pobox.com Cc: Xiangfu Liu xiangfu@openmobilefree.net
arch/mips/cpu/xburst/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
applied to u-boot-mips/master, thanks
participants (3)
-
Daniel Schwierzeck -
Marek Vasut -
Xiangfu Liu