[U-Boot-Users] [PATCH] cpu/mpc8260/: ported new fdt code from cpu/mpc83xx/
commit 0e6e4bbe5be1ef7f601abe7eddbe44b56fd5e43a Author: Nikita Youshchenko yoush@cs.msu.su Date: Mon Feb 25 11:27:06 2008 +0000
cpu/mpc8260/: ported new fdt code from cpu/mpc83xx/
This patch splits mpc8260 fdt fixup code into individual file, fdt.c, and updates it up to what is in cpu/mpc83xx/fdt.c.
Also, it adds setting current-speed property for SMC uart, and setting value of 'brg-frequency' property on SOC node, if that property exists. The later is needed to support booting of vendor kernels based on 2.6.18 or near that.
Signed-off-by: Nikita Youshchenko yoush@cs.msu.su
diff --git a/cpu/mpc8260/Makefile b/cpu/mpc8260/Makefile index 80d7852..d2a9f79 100644 --- a/cpu/mpc8260/Makefile +++ b/cpu/mpc8260/Makefile @@ -28,7 +28,7 @@ LIB = $(obj)lib$(CPU).a START = start.o kgdb.o COBJS = traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \ interrupts.o ether_scc.o ether_fcc.o i2c.o commproc.o \ - bedbug_603e.o pci.o spi.o + bedbug_603e.o pci.o spi.o fdt.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c index 55e61a1..f6383c3 100644 --- a/cpu/mpc8260/cpu.c +++ b/cpu/mpc8260/cpu.c @@ -47,12 +47,6 @@ #include <asm/processor.h> #include <asm/cpm_8260.h>
-#if defined(CONFIG_OF_LIBFDT) -#include <libfdt.h> -#include <libfdt_env.h> -#include <fdt_support.h> -#endif - DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_GET_CPU_STR_F) @@ -298,15 +292,3 @@ void watchdog_reset (void) enable_interrupts (); } #endif /* CONFIG_WATCHDOG */ - -/* ------------------------------------------------------------------------- */ -#if defined(CONFIG_OF_LIBFDT) -void ft_cpu_setup (void *blob, bd_t *bd) -{ - char * cpu_path = "/cpus/" OF_CPU; - - do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1); - do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1); - do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1); -} -#endif /* CONFIG_OF_LIBFDT */ diff --git a/cpu/mpc8260/fdt.c b/cpu/mpc8260/fdt.c new file mode 100644 index 0000000..28bfe24 --- /dev/null +++ b/cpu/mpc8260/fdt.c @@ -0,0 +1,73 @@ +/* + * Copyright 2007 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if defined(CONFIG_OF_LIBFDT) + +#include <libfdt.h> +#include <fdt_support.h> + +void ft_cpu_setup (void *blob, bd_t *bd) +{ + +#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ + defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) + fdt_fixup_ethernet(blob, bd); +#endif + + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "timebase-frequency", (bd->bi_busfreq / 4), 1); + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "bus-frequency", bd->bi_busfreq, 1); + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "clock-frequency", bd->bi_intfreq, 1); + do_fixup_by_prop_u32(blob, "device_type", "soc", 4, + "bus-frequency", bd->bi_busfreq, 1); + + /* This is used by obsolete kernels only. + Let's set it in case it exists, but not create it. */ + do_fixup_by_prop_u32(blob, "device_type", "soc", 4, + "brg-frequency", bd->bi_brgfreq, 0); + +#ifdef CFG_NS16550 + do_fixup_by_compat_u32(blob, "ns16550", + "clock-frequency", bd->bi_busfreq, 1); +#endif + +#ifdef CONFIG_CPM2 + do_fixup_by_compat_u32(blob, "fsl,cpm2-smc-uart", + "current-speed", bd->bi_baudrate, 1); + do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart", + "current-speed", bd->bi_baudrate, 1); + + do_fixup_by_compat_u32(blob, "fsl,cpm2-brg", + "clock-frequency", bd->bi_brgfreq, 1); +#endif + + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); +} + +#endif /* CONFIG_OF_LIBFDT */
This is an updated version, that actually works.
commit 817027b43687a34d0c8e9880fcdea40a424ceb8d Author: Nikita Youshchenko yoush@cs.msu.su Date: Mon Feb 25 11:27:06 2008 +0000
cpu/mpc8260/: ported new fdt code from cpu/mpc83xx/
This patch: - splits mpc8260 fdt fixup code into individual file, fdt.c, - adds some fixups from cpu/mpc83xx/fdt.c, - adds additional fixups, under #ifdef CONFIG_OF_COMPAT, that assist booting older (e.g. 2.6.18-based) vendor kernels.
Since cpu/mpc8260/config.mk unconditionally defines CONFIG_CPM2, checks for that macro are ommitted in cpu/mpc8260/fdt.c
Signed-off-by: Nikita Youshchenko yoush@cs.msu.su
diff --git a/cpu/mpc8260/Makefile b/cpu/mpc8260/Makefile index 80d7852..d2a9f79 100644 --- a/cpu/mpc8260/Makefile +++ b/cpu/mpc8260/Makefile @@ -28,7 +28,7 @@ LIB = $(obj)lib$(CPU).a START = start.o kgdb.o COBJS = traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \ interrupts.o ether_scc.o ether_fcc.o i2c.o commproc.o \ - bedbug_603e.o pci.o spi.o + bedbug_603e.o pci.o spi.o fdt.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c index 55e61a1..f6383c3 100644 --- a/cpu/mpc8260/cpu.c +++ b/cpu/mpc8260/cpu.c @@ -47,12 +47,6 @@ #include <asm/processor.h> #include <asm/cpm_8260.h>
-#if defined(CONFIG_OF_LIBFDT) -#include <libfdt.h> -#include <libfdt_env.h> -#include <fdt_support.h> -#endif - DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_GET_CPU_STR_F) @@ -298,15 +292,3 @@ void watchdog_reset (void) enable_interrupts (); } #endif /* CONFIG_WATCHDOG */ - -/* ------------------------------------------------------------------------- */ -#if defined(CONFIG_OF_LIBFDT) -void ft_cpu_setup (void *blob, bd_t *bd) -{ - char * cpu_path = "/cpus/" OF_CPU; - - do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1); - do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1); - do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1); -} -#endif /* CONFIG_OF_LIBFDT */ diff --git a/cpu/mpc8260/fdt.c b/cpu/mpc8260/fdt.c new file mode 100644 index 0000000..a077b06 --- /dev/null +++ b/cpu/mpc8260/fdt.c @@ -0,0 +1,67 @@ +/* + * Copyright 2007 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if defined(CONFIG_OF_LIBFDT) + +#include <libfdt.h> +#include <fdt_support.h> + +void ft_cpu_setup (void *blob, bd_t *bd) +{ + +#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ + defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) + fdt_fixup_ethernet(blob, bd); +#endif + + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "timebase-frequency", (bd->bi_busfreq / 4), 1); + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "bus-frequency", bd->bi_busfreq, 1); + do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, + "clock-frequency", bd->bi_intfreq, 1); + do_fixup_by_prop_u32(blob, "device_type", "soc", 4, + "bus-frequency", bd->bi_busfreq, 1); + +#ifdef CONFIG_OF_COMPAT + do_fixup_by_prop_u32(blob, "device_type", "cpm", 4, + "brg-frequency", bd->bi_brgfreq, 0); + do_fixup_by_compat_u32(blob, "cpm_uart", + "current-speed", bd->bi_baudrate, 1); +#endif + + do_fixup_by_compat_u32(blob, "fsl,cpm2-brg", + "clock-frequency", bd->bi_brgfreq, 1); + do_fixup_by_compat_u32(blob, "fsl,cpm2-smc-uart", + "current-speed", bd->bi_baudrate, 1); + do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart", + "current-speed", bd->bi_baudrate, 1); + + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); +} + +#endif /* CONFIG_OF_LIBFDT */
Hi All,
I am really almost at the end of my tether regarding a mpc8323 PPC chip and chip selects. I have 4 flash banks on the board (all identical strataflash on CS0->CS3) on boot the registers are configured.
If I set flash banks to 4 (include/configs/MPC8323XEMDS.H if I remember) uboot then identifies the first bank as 16MB.. but fails the next 3 banks. After some digging the README states that C0000000(?) and some other addresses are set up as PRELIM chip selects and the PPC local bus memory locations and windows are set AFTER the flash chip is detected. Unless I got it all wrong, this does not happen. Neither does it remap the Memory window after flash has been detected.
After setting the CFG_FLASH_BANKS_LIST { } and setting BR0/1, OR0/1 , BAR0/1 and AR0/1 registers it gets the QRY for the Strataflash, but then uboot catches a PPC trap and resets. After some mangling (setting Flash bank count to 1) and booting U-boot without an error... Bank0 responds as expected using the MD command (memory locations 0xfe000000 -> 0xfeffffff are all readable)
But the same commands on Flash bank 1 after the 2Megabyte barrier cause the PPC to trap. 0xf0000000 -> 0xf01fffff are all readable... but 1 byte over that and it PPC traps.
I have read and re-read the spec... but something is biting me. Can anyone throw me a bone to chase :P I am at a loss why the memory window is only getting to 2MB although I have set to beyond 16MB (LBLAWAR 0x80000018) I have disables all other chip select code segments in the config file and only BR0/1 AR0/1 are being set. (all others are zero)
Anyone help me out?
Best Regards, Richard
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In message 200802251819.19633@blacky.localdomain you wrote:
--- a/cpu/mpc8260/Makefile +++ b/cpu/mpc8260/Makefile @@ -28,7 +28,7 @@ LIB = $(obj)lib$(CPU).a START = start.o kgdb.o COBJS = traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \ interrupts.o ether_scc.o ether_fcc.o i2c.o commproc.o \
bedbug_603e.o pci.o spi.o
bedbug_603e.o pci.o spi.o fdt.o
Maybe we could try and keep (or rather make, s far as possible) lists sorted.
diff --git a/cpu/mpc8260/fdt.c b/cpu/mpc8260/fdt.c
...
- do_fixup_by_compat_u32(blob, "fsl,cpm2-smc-uart",
"current-speed", bd->bi_baudrate, 1);- do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
"current-speed", bd->bi_baudrate, 1);
I think it is wrong to set both the SMC and the SCC "current-speed" to the console baudrate. Only one port can be the current console, and only for this one the value is correct.
Actually I wonder how this is supposed to work at all, as there are two SMC and 4 SCC which all could be used as UART ports.
Isn't this calling for trouble?
Best regards,
Wolfgang Denk
In message 200802251819.19633@blacky.localdomain you wrote:
--- a/cpu/mpc8260/Makefile +++ b/cpu/mpc8260/Makefile @@ -28,7 +28,7 @@ LIB = $(obj)lib$(CPU).a START = start.o kgdb.o COBJS = traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \ interrupts.o ether_scc.o ether_fcc.o i2c.o commproc.o \
bedbug_603e.o pci.o spi.o
bedbug_603e.o pci.o spi.o fdt.oMaybe we could try and keep (or rather make, s far as possible) lists sorted.
Shouldn't list sorting go into separate patch?
diff --git a/cpu/mpc8260/fdt.c b/cpu/mpc8260/fdt.c
...
- do_fixup_by_compat_u32(blob, "fsl,cpm2-smc-uart",
"current-speed", bd->bi_baudrate, 1);- do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
"current-speed", bd->bi_baudrate, 1);I think it is wrong to set both the SMC and the SCC "current-speed" to the console baudrate. Only one port can be the current console, and only for this one the value is correct.
Actually I wonder how this is supposed to work at all, as there are two SMC and 4 SCC which all could be used as UART ports.
Isn't this calling for trouble?
I don't know. The board I currently work with has a single serial port, wired to SMC1, and SCCs are not used there. I don't have access to other hardware now to test.
Looks like 'current speed' is used only by kernel serial driver, and only to set default speed for console. Before openning any other serial port, user should set up speed anyway. And if SCC is used not for serial, then having 'current-speed' property on it is a no-op. So I thought the setting current-speed property for all SMCs and SCCs is harmless.
Btw, current 83xx code does set 'current-speed' for all SCCs, by calling do_fixup_by_compat_u32(..., "fsl,cpm2-scc-uart", ...). So the only thing I added is the same for SMCs, because board I work with has console on SMC.
Is it better to call do_fixup_by_compat_u32() only for SCCs or SMCs based on CONFIG_CONS_ON_SCC / CONFIG_CONS_ON_SMC ?
Or to set only for single node, where the console actually is? But then probably same should be done for mpc83xx and other cpus?
Nikita
On 11:14 Mon 17 Mar , Nikita V. Youshchenko wrote:
In message 200802251819.19633@blacky.localdomain you wrote:
--- a/cpu/mpc8260/Makefile +++ b/cpu/mpc8260/Makefile @@ -28,7 +28,7 @@ LIB = $(obj)lib$(CPU).a START = start.o kgdb.o COBJS = traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \ interrupts.o ether_scc.o ether_fcc.o i2c.o commproc.o \
bedbug_603e.o pci.o spi.o
bedbug_603e.o pci.o spi.o fdt.oMaybe we could try and keep (or rather make, s far as possible) lists sorted.
Shouldn't list sorting go into separate patch?
Btw please split it on file for one line
diff --git a/cpu/mpc8260/fdt.c b/cpu/mpc8260/fdt.c
...
Best Regards, J
On Mon, Feb 25, 2008 at 02:40:56PM +0300, Nikita V. Youshchenko wrote:
commit 0e6e4bbe5be1ef7f601abe7eddbe44b56fd5e43a Author: Nikita Youshchenko yoush@cs.msu.su Date: Mon Feb 25 11:27:06 2008 +0000
cpu/mpc8260/: ported new fdt code from cpu/mpc83xx/ This patch splits mpc8260 fdt fixup code into individual file, fdt.c, and updates it up to what is in cpu/mpc83xx/fdt.c. Also, it adds setting current-speed property for SMC uart, and setting value of 'brg-frequency' property on SOC node, if that property exists. The later is needed to support booting of vendor kernels based on 2.6.18 or near that.
brg-frequency is deprecated. You should set the clock-frequency property in the brg node instead.
-Scott
On Mon, Feb 25, 2008 at 10:03:38AM -0600, Scott Wood wrote:
On Mon, Feb 25, 2008 at 02:40:56PM +0300, Nikita V. Youshchenko wrote:
commit 0e6e4bbe5be1ef7f601abe7eddbe44b56fd5e43a Author: Nikita Youshchenko yoush@cs.msu.su Date: Mon Feb 25 11:27:06 2008 +0000
cpu/mpc8260/: ported new fdt code from cpu/mpc83xx/ This patch splits mpc8260 fdt fixup code into individual file, fdt.c, and updates it up to what is in cpu/mpc83xx/fdt.c. Also, it adds setting current-speed property for SMC uart, and setting value of 'brg-frequency' property on SOC node, if that property exists. The later is needed to support booting of vendor kernels based on 2.6.18 or near that.brg-frequency is deprecated. You should set the clock-frequency property in the brg node instead.
Never mind, I should have read the patch itself more closely. The commit message should be updated, though.
-Scott
participants (5)
-
Jean-Christophe PLAGNIOL-VILLARD -
Nikita V. Youshchenko -
Richard Parsons -
Scott Wood -
Wolfgang Denk