On Wed, 07 Nov 2018 16:00:57 +0100 Marek Szyprowski m.szyprowski@samsung.com wrote:

Add support for quad (64bits) memory access.

Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com

cmd/itest.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)

diff --git a/cmd/itest.c b/cmd/itest.c index fd6f4166f1..1813a131d1 100644 --- a/cmd/itest.c +++ b/cmd/itest.c @@ -72,6 +72,11 @@ static long evalexp(char *s, int w) case 4: l = (long)(*(u32 *)buf); break; +#ifdef CONFIG_PHYS_64BIT

• case 8:
  

• 	l = (long)(*(unsigned long *)buf);
  

• 	break;
  

+#endif } unmap_physmem(buf, w); return l; @@ -185,6 +190,9 @@ static int do_itest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) case 1: case 2: case 4: +#ifdef CONFIG_PHYS_64BIT

• case 8:

+#endif value = binary_test (argv[2], argv[1], argv[3], w); break; case -2: @@ -203,5 +211,9 @@ static int do_itest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) U_BOOT_CMD( itest, 4, 0, do_itest, "return true/false on integer compare", +#ifdef CONFIG_PHYS_64BIT

• "[.b, .w, .l, .q, .s] [*]value1 <op> [*]value2"

+#else "[.b, .w, .l, .s] [*]value1 <op> [*]value2" +#endif );

Acked-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Wed, 07 Nov 2018 16:00:58 +0100 Marek Szyprowski m.szyprowski@samsung.com wrote:

This is needed to make Windows THOR flash tool happy, because it starts sending data only when interrupt packet is received on the 3rd endpoint.

Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com

drivers/usb/gadget/f_thor.c | 7 +++++++ 1 file changed, 7 insertions(+)

diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c index 8b3b19feaf..920fa5279c 100644 --- a/drivers/usb/gadget/f_thor.c +++ b/drivers/usb/gadget/f_thor.c @@ -941,6 +941,13 @@ static int thor_eps_setup(struct usb_function *f) dev->out_req = req; /* ACM control EP */ ep = dev->int_ep;

• d = ep_desc(gadget, &hs_int_desc, &fs_int_desc);

• debug("(d)bEndpointAddress: 0x%x\n", d->bEndpointAddress);

• result = usb_ep_enable(ep, d);

• if (result)

• goto err;
  

• ep->driver_data = cdev; /* claim */

  return 0;

Acked-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Wed, 07 Nov 2018 16:00:59 +0100 Marek Szyprowski m.szyprowski@samsung.com wrote:

'THOR' download command requires DFU infrastructure to properly flash board images. It can be used without enabling DFU command, so add such dependency to Kconfig.

Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com

cmd/Kconfig | 1 + 1 file changed, 1 insertion(+)

diff --git a/cmd/Kconfig b/cmd/Kconfig index d66f710ad0..0af08aeab3 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -340,6 +340,7 @@ config CMD_FITUPD

config CMD_THOR_DOWNLOAD bool "thor - TIZEN 'thor' download"

• select DFU help Implements the 'thor' download protocol. This is a way of downloading a software update over USB from an attached

host.

Acked-by: Lukasz Majewski lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

Dear Marek Szyprowski,

On 08/11/18 00:01, Marek Szyprowski wrote:

Add possibility to define a part of partition as a separate DFU entity. This allows to have more than one items on the given partiton.

The real use case for this option is TM2 board. It can use u-boot stored as Linux kernel on the defined partiton (as RAW data) and load the real kernel from the same partition, but stored under the certain offset.

Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com

drivers/dfu/dfu_mmc.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c index b45e6dc54c..826e70ffec 100644 --- a/drivers/dfu/dfu_mmc.c +++ b/drivers/dfu/dfu_mmc.c @@ -357,6 +357,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s) struct blk_desc *blk_dev = mmc_get_blk_desc(mmc); int mmcdev = second_arg; int mmcpart = third_arg;

• int offset = 0;
  
  

  if (part_get_info(blk_dev, mmcpart, &partinfo) != 0) { pr_err("Couldn't find part #%d on mmc device #%d\n",

@@ -364,9 +365,17 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s) return -ENODEV; }

• /*
  

•  * Check for an extra entry at dfu_alt_info env variable
  

•  * specifying the mmc HW defined partition number
  

•  */
  

• if (s)
  

• 	if (!strcmp(strsep(&s, " "), "offset"))
  

• 		offset = simple_strtoul(s, NULL, 0);
  

• dfu->layout = DFU_RAW_ADDR;

• dfu->data.mmc.lba_start		= partinfo.start;
  

• dfu->data.mmc.lba_size		= partinfo.size;
  

• dfu->data.mmc.lba_start		= partinfo.start+offset;
  

please add space. partinfo.start + offset

• dfu->data.mmc.lba_size		= partinfo.size-offset;
  

partinfo.size - offset

dfu->data.mmc.lba_blk_size	= partinfo.blksz;

} else if (!strcmp(entity_type, "fat")) { dfu->layout = DFU_FS_FAT;

Thanks, Minkyu Kang.

On Wed, 21 Nov 2018 09:52:08 +0100 Lukasz Majewski lukma@denx.de wrote:

On Wed, 07 Nov 2018 16:03:08 +0100 Marek Szyprowski m.szyprowski@samsung.com wrote:

...

From: Lukasz Majewski l.majewski@samsung.com

DW-MMC module in Samsung Exynos5433 requires 64bit DMA descriptors. This patch adds code for handling them.

Signed-off-by: Lukasz Majewski l.majewski@samsung.com [extracted from old sources and adapted to mainline u-boot, minor fixes] Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com

---

drivers/mmc/dw_mmc.c | 53 ++++++++++++++++++++++++++++++------- drivers/mmc/exynos_dw_mmc.c | 6 +++++ include/dwmmc.h | 25 +++++++++++++++++ 3 files changed, 74 insertions(+), 10 deletions(-)

diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 3c702b3ed8..f50eb29ac9 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -30,8 +30,8 @@ static int dwmci_wait_reset(struct dwmci_host *host, u32 value) return 0; }

-static void dwmci_set_idma_desc(struct dwmci_idmac *idmac,

• u32 desc0, u32 desc1, u32 desc2)
  

+static void dwmci_set_idma_desc_32bit(void *idmac,

• 		      u32 desc0, u32 desc1, u32
  

desc2) { struct dwmci_idmac *desc = idmac;

@@ -41,11 +41,27 @@ static void dwmci_set_idma_desc(struct dwmci_idmac *idmac, desc->next_addr = (ulong)desc + sizeof(struct dwmci_idmac); }

+static void dwmci_set_idma_desc_64bit(void *idmac,

• 		      u32 desc0, u32 desc1, u32
  

desc2) +{

• struct dwmci_idmac_64addr *desc = idmac;
• desc->flags = desc0;
• desc->_res1 = 0;
• desc->cnt = desc1;
• desc->_res2 = 0;
• desc->addrl = desc2;
• desc->addrh = 0;
• desc->next_addrl = (ulong)desc + sizeof(struct

dwmci_idmac_64addr);

• desc->next_addrh = 0;

+}

static void dwmci_prepare_data(struct dwmci_host *host, struct mmc_data *data,

• 	       struct dwmci_idmac *cur_idmac,
  

• 	       struct dwmci_idmac_64addr
  

*cur_idmac64, void *bounce_buffer)

This looks strange - why the core dwmci_prepare_data() has this change?

Above, the *idmac has been changed to void* from struct dwmci_idmac *idmac to handle 64bit DMA descriptors.

I think that it shall be done in the same way here.

...

{

• struct dwmci_idmac *cur_idmac = (struct dwmci_idmac

*)cur_idmac64; unsigned long ctrl; unsigned int i = 0, flags, cnt, blk_cnt; ulong data_start, data_end; @@ -56,7 +72,12 @@ static void dwmci_prepare_data(struct dwmci_host *host, dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);

data_start = (ulong)cur_idmac;

• dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac);

• if (host->dma_64bit_address) {

• dwmci_writel(host, DWMCI_DBADDRU, 0);
  

• dwmci_writel(host, DWMCI_DBADDRL,
  

(ulong)cur_idmac64);

This is even more strange - the upper part of 32 bit address is 0, so we pass only 32 bit address. Is this SoC working in armv7 mode (32 bit) and the dwmmc is expecting 64bit descriptors?

...

• } else

• dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac);
  
  

  do { flags = DWMCI_IDMAC_OWN | DWMCI_IDMAC_CH ;

@@ -67,17 +88,27 @@ static void dwmci_prepare_data(struct dwmci_host *host, } else cnt = data->blocksize * 8;

• dwmci_set_idma_desc(cur_idmac, flags, cnt,
  

• 		    (ulong)bounce_buffer + (i *
  

PAGE_SIZE));

• if (host->dma_64bit_address)
  

• 	dwmci_set_idma_desc_64bit(cur_idmac64,  
  

				  ^^^^^^ here a void
				  pointer with a

static cast would be enough.

...

flags, cnt,

(ulong)bounce_buffer +

• 				  (i * PAGE_SIZE));
  

• else
  

• 	dwmci_set_idma_desc_32bit(cur_idmac, flags,
  

cnt,

(ulong)bounce_buffer +

• 				  (i * PAGE_SIZE));
  
  

  if (blk_cnt <= 8) break; blk_cnt -= 8; cur_idmac++;

• cur_idmac64++;  
  

This looks like a quick hack - the if (host->dma_64bit_address) / else is missing. Otherwise it would break the boards which use this code already.

...

i++;

} while(1);

• data_end = (ulong)cur_idmac;

• if (host->dma_64bit_address)

• data_end = (ulong)cur_idmac64;
  

• else

• data_end = (ulong)cur_idmac;
  

  flush_dcache_range(data_start, data_end +

ARCH_DMA_MINALIGN); ctrl = dwmci_readl(host, DWMCI_CTRL); @@ -222,7 +253,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, { #endif struct dwmci_host *host = mmc->priv;

• ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac, cur_idmac,

• ALLOC_CACHE_ALIGN_BUFFER(struct dwmci_idmac_64addr,

Isn't this change causing the boards with 32 bits addressing malfunctioning?

#ifdef would be necessary - as struct dwmci_idmac / dwmci_idmac_64addr have different sizes and fields.

...

cur_idmac64, data ? DIV_ROUND_UP(data->blocks, 8) : 0); int ret = 0, flags = 0, i; unsigned int timeout = 500; @@ -256,7 +287,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, data->blocksize * data->blocks, GEN_BB_READ); }

• 	dwmci_prepare_data(host, data, cur_idmac,
  

• 	dwmci_prepare_data(host, data, cur_idmac64,
  		   bbstate.bounce_buffer);  
  

The above comment also applies here.

...

}

} @@ -474,7 +505,9 @@ static int dwmci_init(struct mmc *mmc)

dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF);

• dwmci_writel(host, DWMCI_IDINTEN, 0);

• dwmci_writel(host, host->dma_64bit_address ?

• 	   DWMCI_IDINTEN64 : DWMCI_IDINTEN, 0);
  

• dwmci_writel(host, DWMCI_BMOD, 1);

  if (!host->fifoth_val) {

diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 435ccac594..3e9d47538c 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -98,6 +98,7 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) static int exynos_dwmci_core_init(struct dwmci_host *host) {

• unsigned int addr_config; unsigned int div; unsigned long freq, sclk;

@@ -122,6 +123,11 @@ static int exynos_dwmci_core_init(struct dwmci_host *host) host->clksel = exynos_dwmci_clksel; host->get_mmc_clk = exynos_dwmci_get_clk;

• addr_config = DWMCI_GET_ADDR_CONFIG(dwmci_readl(host,

DWMCI_HCON));

• if (addr_config == 1)

• /* host supports IDMAC in 64-bit address mode */
  

• host->dma_64bit_address = 1;
  

#ifndef CONFIG_DM_MMC /* Add the mmc channel to be registered with mmc core */ if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { diff --git a/include/dwmmc.h b/include/dwmmc.h index 0f9d51b557..14db03d7d4 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -48,6 +48,17 @@ #define DWMCI_DSCADDR 0x094 #define DWMCI_BUFADDR 0x098 #define DWMCI_DATA 0x200 +/*

• • Registers to support idmac 64-bit address mode
• */

+#define DWMCI_DBADDRL 0x088 +#define DWMCI_DBADDRU 0x08c +#define DWMCI_IDSTS64 0x090 +#define DWMCI_IDINTEN64 0x094 +#define DWMCI_DSCADDRL 0x098 +#define DWMCI_DSCADDRU 0x09c +#define DWMCI_BUFADDRL 0x0A0 +#define DWMCI_BUFADDRU 0x0A4

/* Interrupt Mask register */ #define DWMCI_INTMSK_ALL 0xffffffff @@ -132,6 +143,7 @@ /* quirks */ #define DWMCI_QUIRK_DISABLE_SMU (1 << 0)

+#define DWMCI_GET_ADDR_CONFIG(x) (((x)>>27) & 0x1) /**

• struct dwmci_host - Information about a designware MMC host

@@ -145,6 +157,7 @@

• @dev_id: Arbitrary device ID for use by controller
• @buswidth: Bus width in bits (8 or 4)
• @fifoth_val: Value for FIFOTH register (or 0 to leave

unset)

• • @dma_64bit_address: True only for devices supporting 64

bit DMA

• @mmc: Pointer to generic MMC structure for this device
• @priv: Private pointer for use by controller

*/ @@ -161,6 +174,7 @@ struct dwmci_host { int dev_id; int buswidth; u32 fifoth_val;

• int dma_64bit_address; struct mmc *mmc; void *priv;

@@ -196,6 +210,17 @@ struct dwmci_idmac { u32 next_addr; } __aligned(ARCH_DMA_MINALIGN);

+struct dwmci_idmac_64addr {

• u32 flags;
• u32 _res1;
• u32 cnt;
• u32 _res2;
• u32 addrl;
• u32 addrh;
• u32 next_addrl;
• u32 next_addrh;

+} __aligned(ARCH_DMA_MINALIGN);

static inline void dwmci_writel(struct dwmci_host *host, int reg, u32 val) { writel(val, host->ioaddr + reg);

And just to mention - for such change I would like to have a tested-by: tag on the SoC (Odroid XU3/4), which uses the 32 bit DMA descriptors.

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Wed, 07 Nov 2018 16:03:22 +0100 Marek Szyprowski m.szyprowski@samsung.com wrote:

From: Lukasz Majewski l.majewski@samsung.com

Disable some legacy code to let it work on ARM64 based Exynos SoCs.

Signed-off-by: Lukasz Majewski l.majewski@samsung.com [extracted from old sources and adapted to mainline u-boot, minor fixes] Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com

---

drivers/mmc/exynos_dw_mmc.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 3e9d47538c..c7ba3b6060 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -143,6 +143,7 @@ static struct dwmci_host dwmci_host[DWMMC_MAX_CH_NUM]; static int do_dwmci_init(struct dwmci_host *host) { +#ifdef CONFIG_CPU_V7A int flag, err;

flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; @@ -151,6 +152,7 @@ static int do_dwmci_init(struct dwmci_host *host) printf("DWMMC%d not configure\n", host->dev_index); return err; } +#endif

return exynos_dwmci_core_init(host); } @@ -160,10 +162,15 @@ static int exynos_dwmci_get_config(const void *blob, int node, struct dwmci_exynos_priv_data *priv) { int err = 0;

• u32 base, timing[3];

• dma_addr_t base;
• u32 timing[3];

+#ifdef CONFIG_CPU_V7A /* Extract device id for each mmc channel */ host->dev_id = pinmux_decode_periph_id(blob, node); +#else

• host->dev_id = 0;

+#endif

host->dev_index = fdtdec_get_int(blob, node, "index", host->dev_id); if (host->dev_index == host->dev_id) @@ -247,19 +254,20 @@ static int exynos_dwmci_process_node(const void *blob, int exynos_dwmmc_init(const void *blob) { int node_list[DWMMC_MAX_CH_NUM];

• int boot_dev_node; int err = 0, count;

  count = fdtdec_find_aliases_for_id(blob, "mmc", COMPAT_SAMSUNG_EXYNOS_DWMMC, node_list, DWMMC_MAX_CH_NUM);

+#ifdef CONFIG_CPU_V7A /* For DWMMC always set boot device as mmc 0 */ if (count >= 3 && get_boot_mode() == BOOT_MODE_SD) {

• boot_dev_node = node_list[2];
  

• int boot_dev_node = node_list[2];
  

  node_list[2] = node_list[0]; node_list[0] = boot_dev_node; }

+#endif

err = exynos_dwmci_process_node(blob, node_list, count);

The patch seems correct :-)

However, though, I shall NOT ack my own patch....

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

On Wed, 07 Nov 2018 16:04:41 +0100 Marek Szyprowski m.szyprowski@samsung.com wrote:

Some boards use legacy firmware which doesn't properly configure ARM architected timer registers. This patch adds a workaround to use the defined COUNTER_FREQUENCY instead of reading its value from the timer registers.

Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com

arch/arm/cpu/armv8/generic_timer.c | 4 ++++ 1 file changed, 4 insertions(+)

diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c index c1706dcec1..5ac62a0a32 100644 --- a/arch/arm/cpu/armv8/generic_timer.c +++ b/arch/arm/cpu/armv8/generic_timer.c @@ -15,9 +15,13 @@ DECLARE_GLOBAL_DATA_PTR; */ unsigned long get_tbclk(void) { +#ifndef COUNTER_FREQUENCY unsigned long cntfrq; asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq)); return cntfrq; +#else

• return COUNTER_FREQUENCY;

+#endif }

#ifdef CONFIG_SYS_FSL_ERRATUM_A008585

Have something changed - or there still is no errata for this?

The COUNTER_FREQUENCY is declared in include/configs/tm2.h, but shall be moved to Kconfig.

Otherwise looks correct.

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de

Dear Marek Szyprowski,

On 08/11/18 00:04, Marek Szyprowski wrote:

This patch adds minimal support for Exynos5433 SoC (ARM64 based).

The following devices are supported:

• mmc0 (for eMMC)
• serial1 (for debug/console)
• gpa0..3 and gpb0..2 GPIO banks

Based on earlier work done by Lukasz Majewski l.majewski@samsung.com.

Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com

arch/arm/cpu/armv8/Kconfig | 2 +- arch/arm/dts/exynos5433.dtsi | 84 ++++++++++++++++++++++++++++++++ arch/arm/mach-exynos/Kconfig | 7 +++ arch/arm/mach-exynos/mmu-arm64.c | 24 +++++++++ arch/arm/mach-exynos/soc.c | 3 ++ drivers/gpio/s5p_gpio.c | 1 + scripts/config_whitelist.txt | 1 + 7 files changed, 121 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/exynos5433.dtsi

diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index c8bebabdf6..295cdd4653 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -96,7 +96,7 @@ endmenu config PSCI_RESET bool "Use PSCI for reset and shutdown" default y

• depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && \

• depends on !ARCH_EXYNOS5433 && !ARCH_EXYNOS7 && !ARCH_BCM283X && \ !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \ !TARGET_LS2080ARDB && !TARGET_LS2080A_EMU && \ !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \

diff --git a/arch/arm/dts/exynos5433.dtsi b/arch/arm/dts/exynos5433.dtsi new file mode 100644 index 0000000000..509b39a95f --- /dev/null +++ b/arch/arm/dts/exynos5433.dtsi @@ -0,0 +1,84 @@ +/*

• • SAMSUNG EXYNOS5433 SoC device tree source
• • Copyright (c) 2018 Samsung Electronics Co., Ltd.

• • http://www.samsung.com
    

• • SPDX-License-Identifier: GPL-2.0+
• */

+/dts-v1/; +#include "skeleton.dtsi"

+/ {

• mmc_0: mmc@15540000 {

• compatible = "samsung,exynos-dwmmc";
  

• reg = <0x0 0x15540000 0x0 0x1000>;
  

• samsung,bus-width = <8>;
  

• samsung,timing = <1 3 3>;
  

• samsung,removable = <0>;
  

• samsung,pre-init;
  

• fifoth_val = <0x201f0020>;
  

• status = "disabled";
  

• };
• pinctrl_alive: pinctrl@10580000 {

• compatible = "samsung,exynos5433-pinctrl";
  

• reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
  

• /* gpa0..3, gpf1..5 */
  

• gpa0: gpa0 {
  

• 	gpio-controller;
  

• 	#gpio-cells = <2>;
  

• };
  

• gpa1: gpa1 {
  

• 	gpio-controller;
  

• 	#gpio-cells = <2>;
  

• };
  

• gpa2: gpa2 {
  

• 	gpio-controller;
  

• 	#gpio-cells = <2>;
  

• };
  

• gpa3: gpa3 {
  

• 	gpio-controller;
  

• 	#gpio-cells = <2>;
  

• };
  

• };
• pinctrl_peric: pinctrl@14cc0000 {

• compatible = "samsung,exynos5433-pinctrl";
  

• reg = <0x14cc0000 0x1100>;
  

• /* gpv7, gpb0, gpc0..3, gpg0, gpd0..4,6,8,7, gpg1..3 */
  

• gpv7: gpv7 {
  

• 	gpio-controller;
  

• 	#gpio-cells = <2>;
  

• };
  

• gpb0: gpb0 {
  

• 	gpio-controller;
  

• 	#gpio-cells = <2>;
  

• };
  

• gpb1: gpb1 {
  

• 	gpio-controller;
  

• 	#gpio-cells = <2>;
  

• };
  

• gpb2: gpb2 {
  

• 	gpio-controller;
  

• 	#gpio-cells = <2>;
  

• };
  

• };
• serial_1: serial@14c20000 {

• compatible = "samsung,exynos4210-uart";
  

• reg = <0x14c20000 0x100>;
  

• id = <1>;
  

• status = "disabled";
  

• };

+}; diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index ed04369cfa..4a49c8dcc2 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -29,6 +29,13 @@ config ARCH_EXYNOS5 Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs in this family including Exynos5250, Exynos5420 and Exynos5800.

+config ARCH_EXYNOS5433

• bool "Exynos5433 SoC family"
• select ARM64
• help

•  Samsung Exynos5433 SoC family are based on ARM Cortex-A57 CPU and
  

•  Cortex-A53 CPU (in a big.LITTLE configuration).
  

config ARCH_EXYNOS7 bool "Exynos7 SoC family" select ARM64 diff --git a/arch/arm/mach-exynos/mmu-arm64.c b/arch/arm/mach-exynos/mmu-arm64.c index 46b8169d19..a857a7318e 100644 --- a/arch/arm/mach-exynos/mmu-arm64.c +++ b/arch/arm/mach-exynos/mmu-arm64.c @@ -29,3 +29,27 @@ static struct mm_region exynos7420_mem_map[] = {

struct mm_region *mem_map = exynos7420_mem_map; #endif

+#ifdef CONFIG_EXYNOS5433 +static struct mm_region exynos5433_mem_map[] = {

• {

• .virt = 0x00000000UL,
  

• .phys = 0x00000000UL,
  

• .size = 0x20000000UL,
  

• .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  

• 	 PTE_BLOCK_NON_SHARE |
  

• 	 PTE_BLOCK_PXN | PTE_BLOCK_UXN
  

• }, {

• .virt = 0x20000000UL,
  

• .phys = 0x20000000UL,
  

• .size = 0xC0000000UL,
  

• .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  

• 	 PTE_BLOCK_INNER_SHARE
  

• }, {

• /* List terminator */
  

• 0,
  

• }

+};

+struct mm_region *mem_map = exynos5433_mem_map; +#endif diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c index 589e16c5ad..215cbb8f70 100644 --- a/arch/arm/mach-exynos/soc.c +++ b/arch/arm/mach-exynos/soc.c @@ -23,6 +23,9 @@ void reset_cpu(ulong addr) #ifdef CONFIG_CPU_V7A writel(0x1, samsung_get_base_swreset()); #endif +#ifdef CONFIG_ARCH_EXYNOS5433

• writel(0x1, (void *)0x105C0400);

Please don't use address directly.

+#endif }

#ifndef CONFIG_SYS_DCACHE_OFF diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c index e4b5383d0f..fcaad1c4a6 100644 --- a/drivers/gpio/s5p_gpio.c +++ b/drivers/gpio/s5p_gpio.c @@ -357,6 +357,7 @@ static const struct udevice_id exynos_gpio_ids[] = { { .compatible = "samsung,exynos4x12-pinctrl" }, { .compatible = "samsung,exynos5250-pinctrl" }, { .compatible = "samsung,exynos5420-pinctrl" },

• { .compatible = "samsung,exynos5433-pinctrl" }, { }

};

diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 94c0f1ff82..6438686fc4 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -571,6 +571,7 @@ CONFIG_EXYNOS4210 CONFIG_EXYNOS5 CONFIG_EXYNOS5250 CONFIG_EXYNOS5420 +CONFIG_EXYNOS5433 CONFIG_EXYNOS5_DT CONFIG_EXYNOS7420 CONFIG_EXYNOS_ACE_SHA

Thanks, Minkyu Kang.

On Wed, 07 Nov 2018 16:05:14 +0100 Marek Szyprowski m.szyprowski@samsung.com wrote:

General remark - could you run your patches (the whole series) through the buildman?

./tools/buildman/buildman.py --branch=HEAD samsung --detail --verbose --show_errors --force-build --count=9 --output-dir=../BUILD/

This patch adds support for Exynos5433 based TM2 and TM2e boards.

u-boot is used to load and decompress kernel image or alternatively (when 'volume down' button is pressed during boot) provide THOR download USB feature for flashing kernel and rootfs images.

Based on earlier work done by Lukasz Majewski l.majewski@samsung.com.

Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com

arch/arm/dts/Makefile | 3 + arch/arm/dts/exynos5433-tm2.dts | 37 ++++++++++ arch/arm/mach-exynos/Kconfig | 14 ++++ board/samsung/tm2/Kconfig | 14 ++++ board/samsung/tm2/Makefile | 8 ++ board/samsung/tm2/tm2.c | 127 ++++++++++++++++++++++++++++++++ configs/tm2_defconfig | 52 +++++++++++++ include/configs/tm2.h | 60 +++++++++++++++ 8 files changed, 315 insertions(+) create mode 100644 arch/arm/dts/exynos5433-tm2.dts create mode 100644 board/samsung/tm2/Kconfig create mode 100644 board/samsung/tm2/Makefile create mode 100644 board/samsung/tm2/tm2.c create mode 100644 configs/tm2_defconfig create mode 100644 include/configs/tm2.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d36447d18d..f8c671589a 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -25,6 +25,9 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ exynos5800-peach-pi.dtb \ exynos5422-odroidxu3.dtb dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb

+dtb-$(CONFIG_TARGET_TM2) += exynos5433-tm2.dtb

Those blank lines could be removed.

dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3036-sdk.dtb \ rk3128-evb.dtb \ diff --git a/arch/arm/dts/exynos5433-tm2.dts b/arch/arm/dts/exynos5433-tm2.dts new file mode 100644 index 0000000000..c9b178efdc --- /dev/null +++ b/arch/arm/dts/exynos5433-tm2.dts @@ -0,0 +1,37 @@ +/*

• • TM2 device tree source
• • Copyright (c) 2018 Samsung Electronics Co., Ltd.

• • http://www.samsung.com
    

• • SPDX-License-Identifier: GPL-2.0+
• */

If the file is from the Linux kernel - please provide proper SHA1.

+/dts-v1/; +#include "exynos5433.dtsi"

+/ {

• model = "TM2 based on EXYNOS5433";
• compatible = "samsung,tm2", "samsung,exynos5433";
• aliases {

• serial0 = &serial_1;
  

• console = &serial_1;
  

• i2c0 = &i2c;
  

• };
• i2c: i2c {

• compatible = "i2c-gpio";
  

• gpios = <&gpb0 0 0>,	/* sda */
  

• 	<&gpb0 1 0>;	/* scl */
  

• i2c-gpio,delay-us = <2>;        /* ~100 kHz */
  

• };

+};

+&mmc_0 {

• status = "okay";

+};

+&serial_1 {

• status = "okay";

+}; diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 4a49c8dcc2..cf3bed57f3 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -137,6 +137,19 @@ config TARGET_PEACH_PIT endchoice endif

+if ARCH_EXYNOS5433

+choice

• prompt "EXYNOS5433 board select"

+config TARGET_TM2

• bool "TM2 board"
• select ARM64
• select OF_CONTROL

I do have a feeling that there should be more options added here from the tm2.h file.

Also please check if the board compiles after enabling CONFIG_BLK (as it will be enabled by default very soon).

+endchoice +endif

if ARCH_EXYNOS7

choice @@ -168,6 +181,7 @@ source "board/samsung/odroid/Kconfig" source "board/samsung/arndale/Kconfig" source "board/samsung/smdk5250/Kconfig" source "board/samsung/smdk5420/Kconfig" +source "board/samsung/tm2/Kconfig" source "board/samsung/espresso7420/Kconfig"

config SPL_LDSCRIPT diff --git a/board/samsung/tm2/Kconfig b/board/samsung/tm2/Kconfig new file mode 100644 index 0000000000..745faf6a95 --- /dev/null +++ b/board/samsung/tm2/Kconfig @@ -0,0 +1,14 @@ +if TARGET_TM2

+config SYS_BOARD

• default "tm2"
• help

•  TM2 is Exynos5433 SoC based board, Tizen reference board.
  

+config SYS_VENDOR

• default "samsung"

+config SYS_CONFIG_NAME

• default "tm2"

+endif diff --git a/board/samsung/tm2/Makefile b/board/samsung/tm2/Makefile new file mode 100644 index 0000000000..53621774dd --- /dev/null +++ b/board/samsung/tm2/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (c) 2016 Samsung Electronics Co., Ltd. All rights reserved. +# Lukasz Majewski l.majewski@samsung.com

I would not be the only author here :-)

+# +# SPDX-License-Identifier: GPL-2.0+ +#

+obj-y := tm2.o diff --git a/board/samsung/tm2/tm2.c b/board/samsung/tm2/tm2.c new file mode 100644 index 0000000000..31ec8f5641 --- /dev/null +++ b/board/samsung/tm2/tm2.c @@ -0,0 +1,127 @@ +/*

• • (C) Copyright 2018 Samsung

Please be consistent with the Copyright in the patch series. Either it is all added by only Samsung or by its developers.

• • SPDX-License-Identifier: GPL-2.0+
• */

+#include <common.h> +#include <dm.h> +#include <errno.h> +#include <malloc.h> +#include <dwc3-uboot.h> +#include <asm/armv8/mmu.h> +#include <asm/arch/dwmmc.h> +#include <usb.h> +#include <dwc3-uboot.h> +#include <asm/arch/cpu.h> +#include <asm/arch/power.h> +#include <asm/gpio.h>

+DECLARE_GLOBAL_DATA_PTR;

+int board_init(void) +{

• /* start Multi Core Timer to get ARM Architected Timers

working */

• writel(1 << 8, 0x101c0240);

Could it be more verbose - by more comments or define?

• return 0;

+}

+int dram_init(void) +{

• gd->ram_size = PHYS_SDRAM_1_SIZE;
• return 0;

+}

+int dram_init_banksize(void) +{

• gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
• gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
• return 0;

+}

The memory information could be read from DTS

+unsigned long get_uart_clk(int id) +{

• return 200000000;

+}

+unsigned long get_mmc_clk(int id) +{

• return 100000000;

+}

+unsigned long set_mmc_clk(int id, int div) +{

• return 0;

+}

+unsigned long get_i2c_clk(int id) +{

• return 66666667;

This shall be read and calculated from the IP block (please provide in the comment the formula as well).

+}

+#ifdef CONFIG_USB_DWC3 +static struct dwc3_device dwc3_device_data = {

• .maximum_speed = USB_SPEED_SUPER,
• .base = 0x15400000,
• .dr_mode = USB_DR_MODE_PERIPHERAL,
• .index = 0,

+};

IIRC there were floating some patches which were converting the UDC for dwc3 to driver model (IIRC from Nexell).

+int usb_gadget_handle_interrupts(void) +{

• dwc3_uboot_handle_interrupt(0);
• return 0;

+}

+int board_usb_init(int index, enum usb_init_type init) +{

• void *base = (void *)0x15500000; /* Exynos5433 DRD PHY */
• /* CMU TOP: set SCLK_USBDRD30_RATIO divider to 1 */
• writel(0x0007770b, (void *)0x10030634);
• /* CMU FSYS: set PHYCLK_USBDRD30_UDRD30_PHYCLOCK and

•   PHYCLK_USBDRD30_UDRD30_PIPE_PCLK muxes to 1 */
  

• writel(0x00000011, (void *)0x156e0208);
• /* CMU FSYS: enable MUX_SCLK_USBDRD30_USER gate and

•   keep other gates enabled */
  

• writel(0x01101001, (void *)0x156e0204);
• /* CMU: TOP: set MUX_SCLK_USBDRD30 mux source to pll */
• writel(0x00000101, (void *)0x10030234);
• /* PMU: bypass USB DEV PHY isolation */
• writel(0x00000001, (void *)0x105c0704);

The above code shall used defines for registers (best matching the in-documentation names). Please also used (1UL << XX) for setting bits.

• /* copied from Linux kernel register dump */
• writel(0x0, base + 0x14);
• writel(0x0, base + 0x34);
• writel(0x8000040, base + 0x4);
• writel(0x24d466e4, base + 0x1c);
• writel(0x4, base + 0x30);
• writel(0x24d466e4, base + 0x1c);
• writel(0x3fff81c, base + 0x20);
• writel(0x40, base + 0x8);
• writel(0x0, base + 0x28);
• writel(0xc41805bf, base + 0x10);
• udelay(10);
• writel(0xc41805bd, base + 0x10);
• writel(0x3fff81c, base + 0x20);
• writel(0x0, base + 0x28);
• writel(0xc41b40bf, base + 0x10);
• udelay(10);
• writel(0xc41b40bd, base + 0x10);

Is there any explanation for this "magic" sequence?

• return dwc3_uboot_init(&dwc3_device_data);

+} +#endif

+int checkboard(void) +{

• const char *board_info;
• board_info = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
• printf("Board: %s\n", board_info ? board_info : "unknown");
• return 0;

+} diff --git a/configs/tm2_defconfig b/configs/tm2_defconfig new file mode 100644 index 0000000000..4080366c97 --- /dev/null +++ b/configs/tm2_defconfig @@ -0,0 +1,52 @@ +CONFIG_ARM=y +# CONFIG_ARM64_SUPPORT_AARCH32 is not set +CONFIG_ARCH_EXYNOS=y +CONFIG_SYS_TEXT_BASE=0x20080000 +CONFIG_ARCH_EXYNOS5433=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_IDENT_STRING="\nSamsung Exynos5433 TM2" +CONFIG_FIT=y +CONFIG_BOOTDELAY=-2 +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_GO is not set +CONFIG_CMD_THOR_DOWNLOAD=y +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_DM is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +# CONFIG_RANDOM_UUID is not set +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_PART=y +# CONFIG_CMD_SOURCE is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +CONFIG_CMD_FS_GENERIC=y +CONFIG_DEFAULT_DEVICE_TREE="exynos5433-tm2" +# CONFIG_DM_DEVICE_REMOVE is not set +CONFIG_DFU_MMC=y +CONFIG_DM_I2C_GPIO=y +CONFIG_DM_MMC=y +CONFIG_MMC_DW=y +CONFIG_USB=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GADGET=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 +CONFIG_USB_GADGET_PRODUCT_NUM=0x685D +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_MASS_STORAGE=y +CONFIG_USB_FUNCTION_THOR=y +# CONFIG_SYS_WHITE_ON_BLACK is not set +# CONFIG_EFI_LOADER is not set diff --git a/include/configs/tm2.h b/include/configs/tm2.h new file mode 100644 index 0000000000..ce656b494a --- /dev/null +++ b/include/configs/tm2.h @@ -0,0 +1,60 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/*

• • Copyright (C) 2018 Samsung Electronics
• • Marek Szyprowski m.szyprowski@samsung.com
• • Configuation settings for the Exynos5433 TM2 board.
• */

+#ifndef __SAMSUNG_TM2_H +#define __SAMSUNG_TM2_H

+#include <asm/arch/cpu.h> +#include <linux/sizes.h>

+/* High Level Configuration Options */ +#define CONFIG_SAMSUNG /* in a SAMSUNG core */ +#define CONFIG_EXYNOS5433 /* Exynos5433 Family */ +#define CONFIG_S5P

Above defines shall be placed in _defconfig file.

+/* Timer input clock frequency */ +#define COUNTER_FREQUENCY 24000000

The same with this.

+/* SD/MMC configuration */ +#define CONFIG_BOUNCE_BUFFER

+/* THOR */ +#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_USB_GADGET_VENDOR_NUM +#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D + +/* required to avoid build break */ +#define CONFIG_G_DNL_UMS_VENDOR_NUM CONFIG_USB_GADGET_VENDOR_NUM +#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 +

Could this be moved to Kconfig?

+#define PHYS_SDRAM_1 0x20000000 +#define PHYS_SDRAM_1_SIZE 0xbf700000

+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x80000) + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (80 << 20) +#define CONFIG_SYS_BOOTM_LEN (130 << 20)

IIRC above defines could be specified in the Kconfig (Also please use SZ1M* instead of << 20).

+/* Initial environment variables */ +#define CONFIG_BOOTCOMMAND "run modedetect"

BOOTCOMMAND can be specified in Kconfig.

+#define CONFIG_EXTRA_ENV_SETTINGS "dfu_alt_info=kernel part 0 9 offset 0x400;rootfs part 0 18;system-data part 0 19;user part 0 21\0" \

• 			"modedetect=if gpio input
  

gpa21 || itest.l *0x105c080c == 0x12345671; then run download; else run bootkernel; fi; reset\0" \

• 			"fdt_high=0xffffffffffffffff\0"
  

\

• 			"bootargs=console=ttySAC1,115200
  

earlycon=exynos4210,0x14C20000 ess_setup=0x26000000 loglevel=7 root=/dev/mmcblk0p18 rootfstype=ext4 rootwait\0" \

• 			"bootkernel=echo Booting
  

kernel; run boarddetect; run loadkernel; bootm 0x30080000#$board\0" \

• 			"boarddetect=if itest.l
  

*0x138000b4 == 0x0063f9ff; then setenv board tm2e; elif itest.l *0x138000b4 == 0x0059f9ff; then setenv board tm2; else setenv board unknown; fi; echo Detected $board board\0" \

• 			"loadkernel=part start mmc 0
  

9 kernel_sect; part size mmc 0 9 kernel_size; mmc read 0x30000000 $kernel_sect $kernel_size\0" \

• 			"muicsetusb=i2c dev 0; i2c
  

mw 25 c 9; i2c mw 25 d 3b; i2c mw 25 e 05; i2c mw 25 16 10\0" \

• 			"displayimg=unzip 200d0000
  

67000000; mw.l 138000b4 0059f9ff; mw.l 138001a0 67e10000; mw.l 13800200 00001680; mw.l 13801410 1; mw.l 13802040 e0000018; sleep 1; mw.l 13802040 e0000008\0" \

• 			"download=echo Thor mode
  

enabled; run muicsetusb; run displayimg; mw.l 0x105c080c 0; thor 0 mmc 0\0" + +#define CONFIG_ENV_SIZE 0x1000

This can be also specified in Kconfig.

+#endif /* __SAMSUNG_TM2_H */

To sum up - It seems like those patches are mostly from 2016. Since then many CONFIG_* options were moved to Kconfig.

Best regards,

Lukasz Majewski

--

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