[PATCH 00/15] Support for rk3568 based QNAP TS433 NAS
Currently QNAP builds a series of RK3568- (and RK3588-) based NAS systems. This series provides support for the 4-bay variant called TS433.
The whole series is pretty similar so adding support for the other variants will be pretty easy, once device-specific devicetrees land.
The DONOTMERGE labeled devicetree patches I need to re-do once they land in the actual devicetree-rebasing repository, as I just merged them for the 6.12 Linux-kernel some days ago.
But having this publicaly available might give interested people the chance to try it out already :-)
This currently goes on top of today's u-boot master.
Heiko Stuebner (15): DONOTMERGE: arm64: dts: rockchip: add PCIe supply regulator to Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: enable second PCIe controller on the Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: enable uart0 on Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: enable usb ports on Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: add stdout path on Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: enable sata1+2 on Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: add board-aliases for Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: add hdd leds to Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: enable the tsadc on the Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: add gpio-keys to Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: define cpu-supply on the Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: add missing pmic information on Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: enable gpu on Qnap-TS433 DONOTMERGE: arm64: dts: rockchip: add 2 pmu_io_domain supplies for Qnap-TS433 board: rockchip: add support for Qnap TS433 devices
arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi | 6 + arch/arm/mach-rockchip/rk3568/Kconfig | 14 + board/qnap/ts433/Kconfig | 12 + board/qnap/ts433/MAINTAINERS | 8 + configs/qnap-ts433-rk3568_defconfig | 86 +++ doc/board/qnap/index.rst | 9 + doc/board/qnap/ts433.rst | 91 +++ doc/board/rockchip/rockchip.rst | 1 + .../src/arm64/rockchip/rk3568-qnap-ts433.dts | 546 +++++++++++++++++- include/configs/qnap_ts433.h | 10 + 10 files changed, 780 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi create mode 100644 board/qnap/ts433/Kconfig create mode 100644 board/qnap/ts433/MAINTAINERS create mode 100644 configs/qnap-ts433-rk3568_defconfig create mode 100644 doc/board/qnap/index.rst create mode 100644 doc/board/qnap/ts433.rst create mode 100644 include/configs/qnap_ts433.h
Add the vcc3v3-supply regulator and its link to the pcie controllers.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-2-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- .../src/arm64/rockchip/rk3568-qnap-ts433.dts | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index 6a998166003..07b4f095d76 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -12,6 +12,25 @@ / { model = "Qnap TS-433-4G NAS System 4-Bay"; compatible = "qnap,ts433", "rockchip,rk3568"; + + dc_12v: regulator-dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_pcie: regulator-vcc3v3-pcie { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + vin-supply = <&dc_12v>; + }; };
&gmac0 { @@ -62,9 +81,11 @@ status = "okay"; };
+/* Connected to a JMicron AHCI SATA controller */ &pcie3x1 { /* The downstream dts has: rockchip,bifurcation, XXX: find out what this is about */ reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; status = "okay"; };
The TS433 uses both pcie controllers for sata and the 2nd network interface. Set the needed data-lanes in the pcie3 phy and enable the second pcie controller, as well as remove the bifurcation comment.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-3-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index 07b4f095d76..9bf9c3b65ca 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -78,17 +78,25 @@ };
&pcie30phy { + data-lanes = <1 2>; status = "okay"; };
/* Connected to a JMicron AHCI SATA controller */ &pcie3x1 { - /* The downstream dts has: rockchip,bifurcation, XXX: find out what this is about */ reset-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie>; status = "okay"; };
+/* Connected to the 2.5G NIC for the upper network jack */ +&pcie3x2 { + num-lanes = <1>; + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + &sdhci { bus-width = <8>; max-frequency = <200000000>;
Uart0 is connected to an MCU on the board that handles system control like the fan-speed. So far no driver for it is available though.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-4-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index 9bf9c3b65ca..bc26f2e98c1 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -104,6 +104,14 @@ status = "okay"; };
+/* + * Connected to an MCU, that provides access to more LEDs, + * buzzer, fan control and more. + */ +&uart0 { + status = "okay"; +}; + /* * Pins available on CN3 connector at TTL voltage level (3V3). * ,_ _.
Enable usb controllers and phys and add regulator infrastructure for the usb ports on the TS433.
Of course there are no schematics available for the device, so the regulator information comes from the vendor-devicetree with unknown accuracy.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-5-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- .../src/arm64/rockchip/rk3568-qnap-ts433.dts | 105 ++++++++++++++++++ 1 file changed, 105 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index bc26f2e98c1..da735c4764f 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -31,6 +31,49 @@ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; vin-supply = <&dc_12v>; }; + + vcc5v0_host: regulator-vcc5v0-host { + compatible = "regulator-fixed"; + enable-active-high; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + regulator-name = "vcc5v0_host"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_otg: regulator-vcc5v0-otg { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_otg_en>; + regulator-name = "vcc5v0_otg"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_usb: regulator-vcc5v0-usb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; +}; + +/* connected to usb_host0_xhci */ +&combphy0 { + status = "okay"; };
&gmac0 { @@ -97,6 +140,18 @@ status = "okay"; };
+&pinctrl { + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc5v0_otg_en: vcc5v0-otg-en { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + &sdhci { bus-width = <8>; max-frequency = <200000000>; @@ -121,3 +176,53 @@ &uart2 { status = "okay"; }; + +&usb2phy0 { + status = "okay"; +}; + +/* connected to usb_host0_xhci */ +&usb2phy0_otg { + phy-supply = <&vcc5v0_otg>; + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +/* connected to usb_host1_ehci/ohci */ +&usb2phy1_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +/* connected to usb_host0_ehci/ohci */ +&usb2phy1_otg { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +/* right port backside */ +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +/* front port */ +&usb_host0_xhci { + dr_mode = "host"; + status = "okay"; +}; + +/* left port backside */ +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +};
As most Rockchip boards do, the TS433 also uses uart2 for its serial output. Set the correct chosen entry for it.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-6-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index da735c4764f..be1c2286c2d 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -13,6 +13,10 @@ model = "Qnap TS-433-4G NAS System 4-Bay"; compatible = "qnap,ts433", "rockchip,rk3568";
+ chosen { + stdout-path = "serial2:115200n8"; + }; + dc_12v: regulator-dc-12v { compatible = "regulator-fixed"; regulator-name = "dc_12v";
The TS433 has 4 bays. The last two are accessed via a pci-connected sata controller, while the first two are accessed via the rk3568's sata controllers. Enable these two now.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-7-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- .../src/arm64/rockchip/rk3568-qnap-ts433.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index be1c2286c2d..40af4dd0e41 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -80,6 +80,16 @@ status = "okay"; };
+/* connected to sata1 */ +&combphy1 { + status = "okay"; +}; + +/* connected to sata2 */ +&combphy2 { + status = "okay"; +}; + &gmac0 { assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; @@ -156,6 +166,14 @@ }; };
+&sata1 { + status = "okay"; +}; + +&sata2 { + status = "okay"; +}; + &sdhci { bus-width = <8>; max-frequency = <200000000>;
Add the aliases for the internal network interface as well as the emmc on the board and make sure the dedicated RTC is always the first one.
The TS433 actually has two rtc devices. One coming from the rk809 pmic without added functionality and also a dedicated RTC from Mycrocrystal that is battery backed to keep the time.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-8-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index 40af4dd0e41..8be36250aa1 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -13,6 +13,12 @@ model = "Qnap TS-433-4G NAS System 4-Bay"; compatible = "qnap,ts433", "rockchip,rk3568";
+ aliases { + ethernet0 = &gmac0; + mmc0 = &sdhci; + rtc0 = &rtc_rv8263; + }; + chosen { stdout-path = "serial2:115200n8"; }; @@ -120,7 +126,7 @@ &i2c1 { status = "okay";
- rtc@51 { + rtc_rv8263: rtc@51 { compatible = "microcrystal,rv8263"; reg = <0x51>; wakeup-source;
Add the 4 gpio-controlled LEDs to the Qnap-TS433.
They are meant for individual disk activitivy, but I haven't found a way for how to connect them to their individual sata slot yet.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-9-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- .../src/arm64/rockchip/rk3568-qnap-ts433.dts | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index 8be36250aa1..abeb00add42 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -6,6 +6,7 @@
/dts-v1/;
+#include <dt-bindings/leds/common.h> #include <dt-bindings/gpio/gpio.h> #include "rk3568.dtsi"
@@ -23,6 +24,46 @@ stdout-path = "serial2:115200n8"; };
+ leds { + compatible = "gpio-leds"; + + led-0 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_DISK; + gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; + linux,default-trigger = "disk-activity"; + pinctrl-names = "default"; + pinctrl-0 = <&hdd1_led_pin>; + }; + + led-1 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_DISK; + gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; + linux,default-trigger = "disk-activity"; + pinctrl-names = "default"; + pinctrl-0 = <&hdd2_led_pin>; + }; + + led-2 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_DISK; + gpios = <&gpio1 RK_PD7 GPIO_ACTIVE_LOW>; + linux,default-trigger = "disk-activity"; + pinctrl-names = "default"; + pinctrl-0 = <&hdd3_led_pin>; + }; + + led-3 { + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_DISK; + gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; + linux,default-trigger = "disk-activity"; + pinctrl-names = "default"; + pinctrl-0 = <&hdd4_led_pin>; + }; + }; + dc_12v: regulator-dc-12v { compatible = "regulator-fixed"; regulator-name = "dc_12v"; @@ -161,6 +202,24 @@ };
&pinctrl { + leds { + hdd1_led_pin: hdd1-led-pin { + rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + hdd2_led_pin: hdd2-led-pin { + rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + hdd3_led_pin: hdd3-led-pin { + rockchip,pins = <1 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + hdd4_led_pin: hdd4_led-pin { + rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + usb { vcc5v0_host_en: vcc5v0-host-en { rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
Enable the tsadc node to allow for temperature measurements of the soc.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-10-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index abeb00add42..34fc31ea9a3 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -246,6 +246,12 @@ status = "okay"; };
+&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + /* * Connected to an MCU, that provides access to more LEDs, * buzzer, fan control and more.
The TS433 has 3 buttons, power and copy in the front as well as a reset pinhole button on the back. The power-button is connected to the embedded controller while the other two buttons are just gpio connected.
Add the gpio-keys definition for the two buttons we can handle right now.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-11-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- .../src/arm64/rockchip/rk3568-qnap-ts433.dts | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index 34fc31ea9a3..9f964b6f411 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -6,6 +6,7 @@
/dts-v1/;
+#include <dt-bindings/input/input.h> #include <dt-bindings/leds/common.h> #include <dt-bindings/gpio/gpio.h> #include "rk3568.dtsi" @@ -24,6 +25,24 @@ stdout-path = "serial2:115200n8"; };
+ keys { + compatible = "gpio-keys"; + pinctrl-0 = <©_button_pin>, <&reset_button_pin>; + pinctrl-names = "default"; + + key-copy { + label = "copy"; + gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; + linux,code = <KEY_COPY>; + }; + + key-reset { + label = "reset"; + gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; + leds { compatible = "gpio-leds";
@@ -202,6 +221,16 @@ };
&pinctrl { + keys { + copy_button_pin: copy-button-pin { + rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + reset_button_pin: reset-button-pin { + rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + leds { hdd1_led_pin: hdd1-led-pin { rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
The TS433 seems to use a silergy,syr827 regulator for the cpu supply. At least that is the compatible used in the vendor devicetree, though it could very well also be another fan53555 clone.
Define the needed regulator node and hook up the cpu-supply to the cpu cores.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-12-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- .../src/arm64/rockchip/rk3568-qnap-ts433.dts | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index 9f964b6f411..4bccefc0537 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -130,6 +130,16 @@ vin-supply = <&vcc5v0_usb>; };
+ vcc5v0_sys: regulator-vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + vcc5v0_usb: regulator-vcc5v0-usb { compatible = "regulator-fixed"; regulator-name = "vcc5v0_usb"; @@ -156,6 +166,22 @@ status = "okay"; };
+&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + &gmac0 { assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; @@ -175,12 +201,27 @@ };
&i2c0 { + status = "okay"; + pmic@20 { compatible = "rockchip,rk809"; reg = <0x20>; interrupt-parent = <&gpio0>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; }; + + vdd_cpu: regulator@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1390000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + }; };
&i2c1 {
Fill in the missing pieces for RK809 pmic used on the TS433.
The regulator setup comes from the vendor-devicetree, so without proper schematics its accuracy is somewhat unclear, but it looks really similar to all the other rk3568 boards, so follows the reference design it seems.
The one caveat is related to vcc3v3_sd. This regulator needs to stay on. When turned off because of no users, access to both PCIe controllers will stall. Maybe this rail does supply the 100MHz refclk generation or so.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-13-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- .../src/arm64/rockchip/rk3568-qnap-ts433.dts | 227 +++++++++++++++++- 1 file changed, 226 insertions(+), 1 deletion(-)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index 4bccefc0537..b807da6e850 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -102,6 +102,16 @@ vin-supply = <&dc_12v>; };
+ vcc3v3_sys: regulator-vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + vcc5v0_host: regulator-vcc5v0-host { compatible = "regulator-fixed"; enable-active-high; @@ -207,7 +217,216 @@ compatible = "rockchip,rk809"; reg = <0x20>; interrupt-parent = <&gpio0>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + system-power-controller; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + /* + * turning this off, breaks access to both + * PCIe controllers, refclk generator perhaps + */ + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; };
vdd_cpu: regulator@40 { @@ -290,6 +509,12 @@ }; };
+ pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + usb { vcc5v0_host_en: vcc5v0-host-en { rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
The TS433 doesn't provide display output, but the gpu nevertheless can be used for compute tasks for example.
So there is no reason not to enable it.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-14-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index b807da6e850..9a0cb69c3cf 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -210,6 +210,11 @@ status = "okay"; };
+&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + &i2c0 { status = "okay";
Add the two supplies for the pmu-io-domains that are defined in the vendor devicetree for the TS433.
Tested-by: Uwe Kleine-König ukleinek@debian.org Signed-off-by: Heiko Stuebner heiko@sntech.de Link: https://lore.kernel.org/r/20240723195538.1133436-15-heiko@sntech.de
[this needs to be replaced, once the patch hits the devicetree-rebasing repo]
Signed-off-by: Heiko Stuebner heiko@sntech.de --- dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index 9a0cb69c3cf..6c4269b3d95 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -531,6 +531,11 @@ }; };
+&pmu_io_domains { + vccio4-supply = <&vcc_1v8>; + vccio6-supply = <&vcc_1v8>; +}; + &sata1 { status = "okay"; };
The Qnap TS433 is a 4-bay NAS based around the RK3568.
Two SATA bays are connected to the RK3568's own SATA controllers while the other two are connected to a JMicron SATA controller living on the PCIe bus.
It provides one 2.5Gb and one 1Gb ethernet port as well as 3 usb ports.
Signed-off-by: Heiko Stuebner heiko@sntech.de --- arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi | 6 ++ arch/arm/mach-rockchip/rk3568/Kconfig | 14 ++++ board/qnap/ts433/Kconfig | 12 +++ board/qnap/ts433/MAINTAINERS | 8 ++ configs/qnap-ts433-rk3568_defconfig | 86 ++++++++++++++++++++ doc/board/qnap/index.rst | 9 +++ doc/board/qnap/ts433.rst | 91 ++++++++++++++++++++++ doc/board/rockchip/rockchip.rst | 1 + include/configs/qnap_ts433.h | 10 +++ 9 files changed, 237 insertions(+) create mode 100644 arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi create mode 100644 board/qnap/ts433/Kconfig create mode 100644 board/qnap/ts433/MAINTAINERS create mode 100644 configs/qnap-ts433-rk3568_defconfig create mode 100644 doc/board/qnap/index.rst create mode 100644 doc/board/qnap/ts433.rst create mode 100644 include/configs/qnap_ts433.h
diff --git a/arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi b/arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi new file mode 100644 index 00000000000..19acbceb468 --- /dev/null +++ b/arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2024 Heiko Stuebner heiko@sntech.de + */ + +#include "rk356x-u-boot.dtsi" diff --git a/arch/arm/mach-rockchip/rk3568/Kconfig b/arch/arm/mach-rockchip/rk3568/Kconfig index 014ebf9f0ba..79fdc39c0c6 100644 --- a/arch/arm/mach-rockchip/rk3568/Kconfig +++ b/arch/arm/mach-rockchip/rk3568/Kconfig @@ -27,6 +27,19 @@ config TARGET_POWKIDDY_X55_RK3566 help Powkiddy X55 handheld gaming console with an RK3566 SoC.
+config TARGET_QNAP_TS433_RK3568 + bool "QNAP-TS433" + help + Qnap TS433 4-bay NAS with a RK3568 SoC. + + It provides the following featureset: + * 4GB LPDDR4 + * 4GB eMMC + * 2 SATA ports connected to two RK3568's SATA controllers + * 2 SATA ports connected to a JMicron JMB58x AHCI SATA controller + * 1 1G network controller + * 1 2.5G Realtek RTL8125 network controller + config TARGET_QUARTZ64_RK3566 bool "Pine64 Quartz64" help @@ -54,5 +67,6 @@ source "board/anbernic/rgxx3_rk3566/Kconfig" source "board/hardkernel/odroid_m1/Kconfig" source "board/pine64/quartz64_rk3566/Kconfig" source "board/powkiddy/x55/Kconfig" +source "board/qnap/ts433/Kconfig"
endif diff --git a/board/qnap/ts433/Kconfig b/board/qnap/ts433/Kconfig new file mode 100644 index 00000000000..b00e1f9f2ef --- /dev/null +++ b/board/qnap/ts433/Kconfig @@ -0,0 +1,12 @@ +if TARGET_QNAP_TS433_RK3568 + +config SYS_BOARD + default "qnap_ts433" + +config SYS_VENDOR + default "qnap" + +config SYS_CONFIG_NAME + default "qnap_ts433" + +endif diff --git a/board/qnap/ts433/MAINTAINERS b/board/qnap/ts433/MAINTAINERS new file mode 100644 index 00000000000..c2b31ad9794 --- /dev/null +++ b/board/qnap/ts433/MAINTAINERS @@ -0,0 +1,8 @@ +QNAP-TS433 +M: Heiko Stuebner heiko@sntech.de +S: Maintained +F: board/qnap/ts433/ +F: doc/board/qnap/ +F: include/configs/qnap_ts433.h +F: configs/qnap-ts433-rk3568_defconfig +F: arch/arm/dts/rk3568-qnap-ts433-u-boot.dtsi diff --git a/configs/qnap-ts433-rk3568_defconfig b/configs/qnap-ts433-rk3568_defconfig new file mode 100644 index 00000000000..cbe4622e468 --- /dev/null +++ b/configs/qnap-ts433-rk3568_defconfig @@ -0,0 +1,86 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-qnap-ts433" +CONFIG_ROCKCHIP_RK3568=y +CONFIG_SPL_SERIAL=y +CONFIG_TARGET_QNAP_TS433_RK3568=y +CONFIG_DEBUG_UART_BASE=0xFE660000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-qnap-ts433.dtb" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SATA=y +CONFIG_CMD_USB=y +CONFIG_CMD_ROCKUSB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_AHCI_PCI=y +CONFIG_DWC_AHCI=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_LED=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y +CONFIG_RTL8169=y +CONFIG_PCIE_DW_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_FAN53555=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_SCSI=y +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/qnap/index.rst b/doc/board/qnap/index.rst new file mode 100644 index 00000000000..652ea11a056 --- /dev/null +++ b/doc/board/qnap/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Qnap +==== + +.. toctree:: + :maxdepth: 2 + + ts433.rst diff --git a/doc/board/qnap/ts433.rst b/doc/board/qnap/ts433.rst new file mode 100644 index 00000000000..5c7fd314b7a --- /dev/null +++ b/doc/board/qnap/ts433.rst @@ -0,0 +1,91 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for Qnap TS433 Devices +================================= + +This allows U-Boot to boot the Qnap TS433 NAS + +Preparing the serial +-------------------- + +Qnap devices run their serial console with a 115200 baudrate. As the +binary DDR-init and maskrom-downloader expect a 1500000 rate, it is +necessary to adapt the binaries if their output is needed. + +This can be done with a binary provided in the rkbin repository. +First the ddrbin_param.txt in the rkbin repo needs to be modified: + +.. code-block:: bash + + diff --git a/tools/ddrbin_param.txt b/tools/ddrbin_param.txt + index 0dfdd318..82ade7e7 100644 + --- a/tools/ddrbin_param.txt + +++ b/tools/ddrbin_param.txt + @@ -11,7 +11,7 @@ lp5_freq= + + uart id= + uart iomux= + -uart baudrate= + +uart baudrate=115200 + + sr_idle= + pd_idle= + +And after that the ddrbin_tool binary can be used to modify apply this +modification and also a new maskrom downloader can be build: + +.. code-block:: bash + + $ tools/ddrbin_tool rk3568 tools/ddrbin_param.txt bin/rk35/rk3568_ddr_1560MHz_v1.21.bin + $ tools/boot_merger RKBOOT/RK3568MINIALL.ini + +Building U-Boot +--------------- + +.. code-block:: bash + + $ export CROSS_COMPILE=aarch64-linux-gnu- + $ export BL31=../rkbin/bin/rk35/rk3568_bl31_v1.34.elf + $ export ROCKCHIP_TPL=../rkbin/bin/rk35/rk3568_ddr_1056MHz_v1.13.bin + $ make qnap-ts433-rk3568_defconfig + $ make + +This will build ``u-boot-rockchip.bin`` which can be written to the +on-board eMMC. + +Image installation +------------------ + +The Qnap thankfully provides an easily accessible serial header as well as +a very user-friendly jumper-header to bring the device into maskrom mode. + +To access both, the drive trays need to be removed. Looking at the board, +through the upper cutout of the metal frame the white 4-port serial-header +can be seen next to a barcode sticker. It's pinout is as follows: + +.. code-block:: bash + + ,_ _. + |1234| 1=TX 2=VCC + `----' 3=RX 4=GND + + +Directly below it, the mentioned 2-pin jumper header can be seen. + +To write your u-boot to the device, it needs to be powered off first. Then +a jumper or suitable cable needs to be used to connect the two pins of the +maskrom header. Turning on the device now will start it in maskrom mode. + +It is important that the jumper gets removed after that stop and before +actually trying to write to the emmc. + +The front usb-port needs to be connected to the host with an USB-A-to-A +cable to allow flashing. + +The flashing itself is done via rkdeveloptool, which can be found for +example as package of that name in Debian-based distributions: + +.. code-block:: bash + + $ rkdeveloptool db rk356x_spl_loader_v1.21.113.bin + $ rkdeveloptool wl 64 u-boot-rockchip.bin diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst index bedc52e03e2..3e86f8204e1 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -114,6 +114,7 @@ List of mainline supported Rockchip boards: - FriendlyElec NanoPi R5S (nanopi-r5s-rk3568) - Generic RK3566/RK3568 (generic-rk3568) - Hardkernel ODROID-M1 (odroid-m1-rk3568) + - QNAP TS-433 (qnap-ts433-rk3568) - Radxa E25 Carrier Board (radxa-e25-rk3568) - Radxa ROCK 3 Model A (rock-3a-rk3568)
diff --git a/include/configs/qnap_ts433.h b/include/configs/qnap_ts433.h new file mode 100644 index 00000000000..aee4546bf07 --- /dev/null +++ b/include/configs/qnap_ts433.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __QNAP_TS433_H +#define __QNAP_TS433_H + +#define ROCKCHIP_DEVICE_SETTINGS + +#include <configs/rk3568_common.h> + +#endif
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Heiko Stuebner