[PATCH] mtd: spi: Add ISSI QSPI to lightweight SPI flash stack for spl

From: "Lokanathan, Raaj" raaj.lokanathan@intel.com
Add support for reading data/images from this ISSI QSPI flash.
Signed-off-by: Lokanathan, Raaj raaj.lokanathan@intel.com --- drivers/mtd/spi/spi-nor-tiny.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c index 68152ce3b4..6a5da38cb1 100644 --- a/drivers/mtd/spi/spi-nor-tiny.c +++ b/drivers/mtd/spi/spi-nor-tiny.c @@ -219,6 +219,7 @@ static inline int set_4byte(struct spi_nor *nor, const struct flash_info *info, case SNOR_MFR_MICRON: /* Some Micron need WREN command; all will accept it */ need_wren = true; + case SNOR_MFR_ISSI: case SNOR_MFR_MACRONIX: case SNOR_MFR_WINBOND: if (need_wren) @@ -432,7 +433,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len, return -ENOTSUPP; }
-#ifdef CONFIG_SPI_FLASH_MACRONIX +#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_ISSI) /** * macronix_quad_enable() - set QE bit in Status Register. * @nor: pointer to a 'struct spi_nor' @@ -661,8 +662,9 @@ static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info, /* Enable Quad I/O if needed. */ if (spi_nor_get_protocol_width(nor->read_proto) == 4) { switch (JEDEC_MFR(info)) { -#ifdef CONFIG_SPI_FLASH_MACRONIX +#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_ISSI) case SNOR_MFR_MACRONIX: + case SNOR_MFR_ISSI: err = macronix_quad_enable(nor); break; #endif

On Tue, Mar 15, 2022 at 3:03 PM raaj.lokanathan@intel.com wrote:
From: "Lokanathan, Raaj" raaj.lokanathan@intel.com
Add support for reading data/images from this ISSI QSPI flash.
Look like the patch is doing quad enable for ISSI but the commit head and body seem misleading or confusing. Can you elaborate on the same?
Jagan.
participants (2)
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Jagan Teki
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raaj.lokanathan@intel.com