[U-Boot] [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value
Per T1040RM (Rev. 1, 08/2015), the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong and should be 0x00000080 (bit 440 in the RCW).
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/powerpc/include/asm/immap_85xx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 7995093..8ec2a38 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1789,7 +1789,7 @@ typedef struct ccsr_gur { #define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII 0x20000000 #define FSL_CORENET_RCWSR13_MAC2_GMII_SEL 0x00000080 #define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_L2_SWITCH 0x00000000 -#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT 0x80000000 +#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT 0x00000080 #define CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET 0x28 #define PXCKEN_MASK 0x80000000 #define PXCK_MASK 0x00FF0000
Per T1040RM (Rev. 1, 08/2015), there are 2 issues with the RCW EC2 settings.
- The value of FSL_CORENET_RCWSR13_EC2_FM1_GPIO is wrong and should be 0x04000000 (value of 1 in RCW bit [420:421]) - Value of 2/3 are reserved in RCW bit [420:421], hence there is no macro FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII.
Signed-off-by: Bin Meng bmeng.cn@gmail.com ---
arch/powerpc/include/asm/immap_85xx.h | 3 +-- drivers/net/fm/t1040.c | 3 --- 2 files changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 8ec2a38..bfa601e 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1785,8 +1785,7 @@ typedef struct ccsr_gur { #define FSL_CORENET_RCWSR13_EC1_FM1_DTSEC4_MII 0x20000000 #define FSL_CORENET_RCWSR13_EC2 0x0c000000 /* bits 420..421 */ #define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_RGMII 0x00000000 -#define FSL_CORENET_RCWSR13_EC2_FM1_GPIO 0x10000000 -#define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII 0x20000000 +#define FSL_CORENET_RCWSR13_EC2_FM1_GPIO 0x04000000 #define FSL_CORENET_RCWSR13_MAC2_GMII_SEL 0x00000080 #define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_L2_SWITCH 0x00000000 #define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT 0x00000080 diff --git a/drivers/net/fm/t1040.c b/drivers/net/fm/t1040.c index 7ec7f99..af4f5c5 100644 --- a/drivers/net/fm/t1040.c +++ b/drivers/net/fm/t1040.c @@ -41,9 +41,6 @@ phy_interface_t fman_port_enet_if(enum fm_port port) if ((rcwsr13 & FSL_CORENET_RCWSR13_EC2) == FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_RGMII) return PHY_INTERFACE_MODE_RGMII; - else if ((rcwsr13 & FSL_CORENET_RCWSR13_EC2) == - FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII) - return PHY_INTERFACE_MODE_MII; }
switch (port) {
On 10/08/2018 06:51 AM, Bin Meng wrote:
Per T1040RM (Rev. 1, 08/2015), the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong and should be 0x00000080 (bit 440 in the RCW).
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Poonam,
Please review and confirm on T1040. Thanks.
York
On Mon, Oct 8, 2018 at 11:07 PM York Sun york.sun@nxp.com wrote:
On 10/08/2018 06:51 AM, Bin Meng wrote:
Per T1040RM (Rev. 1, 08/2015), the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong and should be 0x00000080 (bit 440 in the RCW).
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Poonam,
Please review and confirm on T1040. Thanks.
Ping ?
On Mon, Oct 15, 2018 at 1:21 PM Bin Meng bmeng.cn@gmail.com wrote:
On Mon, Oct 8, 2018 at 11:07 PM York Sun york.sun@nxp.com wrote:
On 10/08/2018 06:51 AM, Bin Meng wrote:
Per T1040RM (Rev. 1, 08/2015), the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong and should be 0x00000080 (bit 440 in the RCW).
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Poonam,
Please review and confirm on T1040. Thanks.
Ping ?
Ping ?
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Monday, October 22, 2018 7:41 AM To: York Sun york.sun@nxp.com Cc: Poonam Aggrwal poonam.aggrwal@nxp.com; U-Boot Mailing List <u- boot@lists.denx.de> Subject: Re: [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value
On Mon, Oct 15, 2018 at 1:21 PM Bin Meng bmeng.cn@gmail.com wrote:
On Mon, Oct 8, 2018 at 11:07 PM York Sun york.sun@nxp.com wrote:
On 10/08/2018 06:51 AM, Bin Meng wrote:
Per T1040RM (Rev. 1, 08/2015), the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong and
should be
0x00000080 (bit 440 in the RCW).
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Poonam,
Please review and confirm on T1040. Thanks.
Ping ?
Ping ?
Apologies Bin, York for such late response.... The patch looks correct, the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT should be 0x80 indeed, I would suggest that I test it once that DTSEC2 RGMII works with this change, because I see more changes which could be required in drivers/fm/t1040.c...seems a goof up there as well.
Kind Regards Poonam
Hi Poonam,
On Mon, Oct 22, 2018 at 11:43 AM Poonam Aggrwal poonam.aggrwal@nxp.com wrote:
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Monday, October 22, 2018 7:41 AM To: York Sun york.sun@nxp.com Cc: Poonam Aggrwal poonam.aggrwal@nxp.com; U-Boot Mailing List <u- boot@lists.denx.de> Subject: Re: [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value
On Mon, Oct 15, 2018 at 1:21 PM Bin Meng bmeng.cn@gmail.com wrote:
On Mon, Oct 8, 2018 at 11:07 PM York Sun york.sun@nxp.com wrote:
On 10/08/2018 06:51 AM, Bin Meng wrote:
Per T1040RM (Rev. 1, 08/2015), the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong and
should be
0x00000080 (bit 440 in the RCW).
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Poonam,
Please review and confirm on T1040. Thanks.
Ping ?
Ping ?
Apologies Bin, York for such late response.... The patch looks correct, the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT should be 0x80 indeed, I would suggest that I test it once that DTSEC2 RGMII works with this change, because I see more changes which could be required in drivers/fm/t1040.c...seems a goof up there as well.
t1040.c changes is patch [2/2], see https://lists.denx.de/pipermail/u-boot/2018-October/343499.html
Regards, Bin
Hello Bin,
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Monday, October 22, 2018 9:41 AM To: Poonam Aggrwal poonam.aggrwal@nxp.com Cc: York Sun york.sun@nxp.com; U-Boot Mailing List u-boot@lists.denx.de Subject: Re: [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value
Hi Poonam,
On Mon, Oct 22, 2018 at 11:43 AM Poonam Aggrwal poonam.aggrwal@nxp.com wrote:
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Monday, October 22, 2018 7:41 AM To: York Sun york.sun@nxp.com Cc: Poonam Aggrwal poonam.aggrwal@nxp.com; U-Boot Mailing List <u- boot@lists.denx.de> Subject: Re: [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value
On Mon, Oct 15, 2018 at 1:21 PM Bin Meng bmeng.cn@gmail.com wrote:
On Mon, Oct 8, 2018 at 11:07 PM York Sun york.sun@nxp.com wrote:
On 10/08/2018 06:51 AM, Bin Meng wrote:
Per T1040RM (Rev. 1, 08/2015), the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong and
should be
0x00000080 (bit 440 in the RCW).
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Poonam,
Please review and confirm on T1040. Thanks.
Ping ?
Ping ?
Apologies Bin, York for such late response.... The patch looks correct, the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT should be 0x80
indeed, I would suggest that I test it once that DTSEC2 RGMII works with this change, because I see more changes which could be required in drivers/fm/t1040.c...seems a goof up there as well.
t1040.c changes is patch [2/2], see https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.de nx.de%2Fpipermail%2Fu-boot%2F2018- October%2F343499.html&data=02%7C01%7Cpoonam.aggrwal%40nxp.co m%7Ce1f6945b731f464c4f6008d637d47259%7C686ea1d3bc2b4c6fa92cd99c5c 301635%7C0%7C0%7C636757782923893367&sdata=INveAWT0s6WsppKP TqCFYo50BH4sekDf9HFAscXxMw8%3D&reserved=0
This patch is correct, thanks for the fix.. Acked
Both the patches are good..
Thanks!
Regards, Bin
On Thu, Oct 25, 2018 at 2:46 PM Poonam Aggrwal poonam.aggrwal@nxp.com wrote:
Hello Bin,
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Monday, October 22, 2018 9:41 AM To: Poonam Aggrwal poonam.aggrwal@nxp.com Cc: York Sun york.sun@nxp.com; U-Boot Mailing List u-boot@lists.denx.de Subject: Re: [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value
Hi Poonam,
On Mon, Oct 22, 2018 at 11:43 AM Poonam Aggrwal poonam.aggrwal@nxp.com wrote:
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Monday, October 22, 2018 7:41 AM To: York Sun york.sun@nxp.com Cc: Poonam Aggrwal poonam.aggrwal@nxp.com; U-Boot Mailing List <u- boot@lists.denx.de> Subject: Re: [PATCH 1/2] powerpc: t1040: Correct RCW MAC2_GMII_SEL value
On Mon, Oct 15, 2018 at 1:21 PM Bin Meng bmeng.cn@gmail.com wrote:
On Mon, Oct 8, 2018 at 11:07 PM York Sun york.sun@nxp.com wrote:
On 10/08/2018 06:51 AM, Bin Meng wrote: > Per T1040RM (Rev. 1, 08/2015), the value of > FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong and
should be
> 0x00000080 (bit 440 in the RCW). > > Signed-off-by: Bin Meng bmeng.cn@gmail.com > ---
Poonam,
Please review and confirm on T1040. Thanks.
Ping ?
Ping ?
Apologies Bin, York for such late response.... The patch looks correct, the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT should be 0x80
indeed, I would suggest that I test it once that DTSEC2 RGMII works with this change, because I see more changes which could be required in drivers/fm/t1040.c...seems a goof up there as well.
t1040.c changes is patch [2/2], see https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.de nx.de%2Fpipermail%2Fu-boot%2F2018- October%2F343499.html&data=02%7C01%7Cpoonam.aggrwal%40nxp.co m%7Ce1f6945b731f464c4f6008d637d47259%7C686ea1d3bc2b4c6fa92cd99c5c 301635%7C0%7C0%7C636757782923893367&sdata=INveAWT0s6WsppKP TqCFYo50BH4sekDf9HFAscXxMw8%3D&reserved=0
This patch is correct, thanks for the fix.. Acked
Both the patches are good..
Thanks Poonam!
York, I believe these 2 patches need be included in the v2018.11 release.
Regards, Bin
On 10/28/18 06:01, Bin Meng wrote:
On Thu, Oct 25, 2018 at 2:46 PM Poonam Aggrwal poonam.aggrwal@nxp.com wrote:
Thanks Poonam!
York, I believe these 2 patches need be included in the v2018.11 release.
They are in my queue.
York
On 10/8/18 6:51 AM, Bin Meng wrote:
Per T1040RM (Rev. 1, 08/2015), the value of FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong and should be 0x00000080 (bit 440 in the RCW).
Signed-off-by: Bin Meng bmeng.cn@gmail.com
This set is applied to u-boot-mpc85xx master, awaiting upstream.
York
participants (3)
-
Bin Meng -
Poonam Aggrwal -
York Sun