[U-Boot] [UBOOT][PATCHv2 0/5] qspi: Add AM437x support

The patch series add support for enabling qspi on AM43xx at uboot.
Testing done: ------------- Wrote a uImage to the flash, read it back and boot the kernel.
v1->v2: Remove patch 3 of previous version, as support was already added for macronix flash. Created a doc explaining the test details.
This patches are developed and tested on top of the following tree: git://git.denx.de/u-boot-ti.git branch: master
Sourav Poddar (5): am43xx: add qspi support am437x_epos_evm: add SPL API, QSPI, and serial flash support qspi/spi: Add AM43xx specifics changes am43xx: add delay before xfer doc: qspi: Add qspi test details on AM43xx
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 1 + arch/arm/include/asm/arch-am33xx/cpu.h | 4 +- arch/arm/include/asm/arch-am33xx/omap.h | 1 + board/ti/am43xx/mux.c | 11 ++++ doc/SPI/README.ti_qspi_am43x_test | 76 ++++++++++++++++++++++++++++++ drivers/spi/ti_qspi.c | 33 ++++++++++++- include/configs/am43xx_evm.h | 20 ++++++++ 7 files changed, 142 insertions(+), 4 deletions(-) create mode 100644 doc/SPI/README.ti_qspi_am43x_test

Add QSPI definitions and clock configuration support.
Signed-off-by: Sourav Poddar sourav.poddar@ti.com --- arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 1 + arch/arm/include/asm/arch-am33xx/cpu.h | 4 +++- arch/arm/include/asm/arch-am33xx/omap.h | 1 + 3 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 97c00b4..fb654bb 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -98,6 +98,7 @@ void enable_basic_clocks(void) &cmper->emiffwclkctrl, &cmper->emifclkctrl, &cmper->otfaemifclkctrl, + &cmper->qspiclkctrl, 0 };
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 9febfa2..0736258 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -332,7 +332,9 @@ struct cm_perpll { unsigned int mcasp1clkctrl; /* offset 0x240 */ unsigned int resv11; unsigned int mmc2clkctrl; /* offset 0x248 */ - unsigned int resv12[5]; + unsigned int resv12[3]; + unsigned int qspiclkctrl; /* offset 0x258 */ + unsigned int resv121; unsigned int usb0clkctrl; /* offset 0x260 */ unsigned int resv13[103]; unsigned int l4lsclkstctrl; /* offset 0x400 */ diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index 7a7d91b..0855d16 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -29,5 +29,6 @@ #define SRAM_SCRATCH_SPACE_ADDR 0x40337C00 #define AM4372_BOARD_NAME_START SRAM_SCRATCH_SPACE_ADDR #define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC +#define QSPI_BASE 0x47900000 #endif #endif

Enables support for SPI SPL, QSPI and Spansion serial flash device on the EVM. Configures pin muxes for QSPI mode.
Signed-off-by: Sourav Poddar sourav.poddar@ti.com --- board/ti/am43xx/mux.c | 11 +++++++++++ include/configs/am43xx_evm.h | 20 ++++++++++++++++++++ 2 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c index 810b194..4db3d78 100644 --- a/board/ti/am43xx/mux.c +++ b/board/ti/am43xx/mux.c @@ -38,6 +38,16 @@ static struct module_pin_mux gpio0_22_pin_mux[] = { {-1}, };
+static struct module_pin_mux qspi_pin_mux[] = { + {OFFSET(gpmc_csn0), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_CS0 */ + {OFFSET(gpmc_csn3), (MODE(2) | PULLUP_EN | RXACTIVE)}, /* QSPI_CLK */ + {OFFSET(gpmc_advn_ale), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D0 */ + {OFFSET(gpmc_oen_ren), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D1 */ + {OFFSET(gpmc_wen), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D2 */ + {OFFSET(gpmc_be0n_cle), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D3 */ + {-1}, +}; + void enable_uart0_pin_mux(void) { configure_module_pin_mux(uart0_pin_mux); @@ -50,6 +60,7 @@ void enable_board_pin_mux(void)
if (board_is_gpevm()) configure_module_pin_mux(gpio0_22_pin_mux); + configure_module_pin_mux(qspi_pin_mux); }
void enable_i2c0_pin_mux(void) diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 4de495a..a81c586 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -79,6 +79,26 @@ #define CONFIG_OMAP_USB_PHY #define CONFIG_AM437X_USB2PHY2_HOST
+/* SPI */ +#undef CONFIG_OMAP3_SPI +#define CONFIG_TI_QSPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_MACRONIX +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_TI_SPI_MMAP +#define CONFIG_QSPI_SEL_GPIO 48 +#define CONFIG_SF_DEFAULT_SPEED 48000000 +#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 + +/* SPI SPL */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + #ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \

From: "Poddar, Sourav" sourav.poddar@ti.com
Add AM43xx specific changes.
Signed-off-by: Sourav Poddar sourav.poddar@ti.com Reviewed-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com --- drivers/spi/ti_qspi.c | 26 +++++++++++++++++++++++--- 1 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 5a5b482..5666250 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -11,6 +11,8 @@ #include <asm/arch/omap.h> #include <malloc.h> #include <spi.h> +#include <asm/gpio.h> +#include <asm/omap_gpio.h>
/* ti qpsi register bit masks */ #define QSPI_TIMEOUT 2000000 @@ -39,7 +41,8 @@ #define MM_SWITCH 0x01 #define MEM_CS 0x100 #define MEM_CS_UNSELECT 0xfffff0ff -#define MMAP_START_ADDR 0x5c000000 +#define MMAP_START_ADDR_DRA 0x5c000000 +#define MMAP_START_ADDR_AM43x 0x30000000 #define CORE_CTRL_IO 0x4a002558
#define QSPI_CMD_READ (0x3 << 0) @@ -99,7 +102,11 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave) struct spi_slave *slave = &qslave->slave; u32 memval = 0;
- slave->memory_map = (void *)MMAP_START_ADDR; +#ifdef CONFIG_DRA7XX + slave->memory_map = (void *)MMAP_START_ADDR_DRA; +#else + slave->memory_map = (void *)MMAP_START_ADDR_AM43x; +#endif
memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | @@ -165,6 +172,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, { struct ti_qspi_slave *qslave;
+#ifdef CONFIG_AM43XX + gpio_request(CONFIG_QSPI_SEL_GPIO, "qspi_gpio"); + gpio_direction_output(CONFIG_QSPI_SEL_GPIO, 1); +#endif + qslave = spi_alloc_slave(struct ti_qspi_slave, bus, cs); if (!qslave) { printf("SPI_error: Fail to allocate ti_qspi_slave\n"); @@ -229,7 +241,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, const uchar *txp = dout; uchar *rxp = din; uint status; - int timeout, val; + int timeout; + +#ifdef CONFIG_DRA7XX + int val; +#endif
debug("spi_xfer: bus:%i cs:%i bitlen:%i words:%i flags:%lx\n", slave->bus, slave->cs, bitlen, words, flags); @@ -237,15 +253,19 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, /* Setup mmap flags */ if (flags & SPI_XFER_MMAP) { writel(MM_SWITCH, &qslave->base->memswitch); +#ifdef CONFIG_DRA7XX val = readl(CORE_CTRL_IO); val |= MEM_CS; writel(val, CORE_CTRL_IO); +#endif return 0; } else if (flags & SPI_XFER_MMAP_END) { writel(~MM_SWITCH, &qslave->base->memswitch); +#ifdef CONFIG_DRA7XX val = readl(CORE_CTRL_IO); val &= MEM_CS_UNSELECT; writel(val, CORE_CTRL_IO); +#endif return 0; }

From: "Poddar, Sourav" sourav.poddar@ti.com
Without this delay, write/read is failing. Looks like, the WIP always remain set and hence a timeout occurs leading to the error.
Without this patch, device does not get probed also. Here is the log.
U-Boot# U-Boot# U-Boot# U-Boot# sf probe 0 SF: Unsupported flash IDs: manuf ff, jedec ffff, ext_jedec ffff Failed to initialize SPI flash at 0:0 U-Boot# sf probe 0
While with this patch, log is U-Boot# sf probe 0 SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB, mapped at 30000000 U-Boot# sf erase 0 0x80000 SF: 524288 bytes @ 0x0 Erased: OK U-Boot# mw 81000000 0xdededede 0x40000 U-Boot# sf write 81000000 0 0x40000 SF: 262144 bytes @ 0x0 Written: OK U-Boot# sf read 82000000 0 0x40000 SF: 262144 bytes @ 0x0 Read: OK U-Boot# md 0x82000000
Signed-off-by: Sourav Poddar sourav.poddar@ti.com Reviewed-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com --- v1->v2: - updated commit log with error message. - Add a FIXME comment in code, drivers/spi/ti_qspi.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 5666250..dfa5d0c 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -285,6 +285,13 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, qslave->cmd |= QSPI_3_PIN; qslave->cmd |= 0xfff;
+/* FIXME: This delay is required for successfull + * completion of read/write/erase. Once its root + * caused, it will be remove from the driver. + */ +#ifdef CONFIG_AM43XX + udelay(100); +#endif while (words--) { if (txp) { debug("tx cmd %08x dc %08x data %02x\n",

From: "Poddar, Sourav" sourav.poddar@ti.com
This shows the log obtained while testing qspi on AM437x board.
Signed-off-by: Sourav Poddar sourav.poddar@ti.com Reviewed-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com --- doc/SPI/README.ti_qspi_am43x_test | 76 +++++++++++++++++++++++++++++++++++++ 1 files changed, 76 insertions(+), 0 deletions(-) create mode 100644 doc/SPI/README.ti_qspi_am43x_test
diff --git a/doc/SPI/README.ti_qspi_am43x_test b/doc/SPI/README.ti_qspi_am43x_test new file mode 100644 index 0000000..8fbf10b --- /dev/null +++ b/doc/SPI/README.ti_qspi_am43x_test @@ -0,0 +1,76 @@ +Testing details- +---------------- + +This doc simply illustrated the testing details of qspi flash +driver with Macronix M25L51235 flash device. + +The test includes +- probing the flash device +- erasing the flash device +- Writing to flash +- Reading the contents of the flash. + +Test Log +-------- + +Hit any key to stop autoboot: 0 +U-Boot# sf probe 0 +SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB, mapped at 30000000 +U-Boot# sf erase 0 0x80000 +SF: 524288 bytes @ 0x0 Erased: OK +U-Boot# mw 81000000 0xdededede 0x40000 +U-Boot# sf write 81000000 0 0x40000 +SF: 262144 bytes @ 0x0 Written: OK +U-Boot# sf read 82000000 0 0x40000 +SF: 262144 bytes @ 0x0 Read: OK +U-Boot# md 0x82000000 +82000000: dededede dededede dededede dededede ................ +82000010: dededede dededede dededede dededede ................ +82000020: dededede dededede dededede dededede ................ +82000030: dededede dededede dededede dededede ................ +82000040: dededede dededede dededede dededede ................ +82000050: dededede dededede dededede dededede ................ +82000060: dededede dededede dededede dededede ................ +82000070: dededede dededede dededede dededede ................ +82000080: dededede dededede dededede dededede ................ +82000090: dededede dededede dededede dededede ................ +820000a0: dededede dededede dededede dededede ................ +820000b0: dededede dededede dededede dededede ................ +820000c0: dededede dededede dededede dededede ................ +820000d0: dededede dededede dededede dededede ................ +820000e0: dededede dededede dededede dededede ................ +820000f0: dededede dededede dededede dededede ................ +U-Boot# md 0x82010000 +82010000: dededede dededede dededede dededede ................ +82010010: dededede dededede dededede dededede ................ +82010020: dededede dededede dededede dededede ................ +82010030: dededede dededede dededede dededede ................ +82010040: dededede dededede dededede dededede ................ +82010050: dededede dededede dededede dededede ................ +82010060: dededede dededede dededede dededede ................ +82010070: dededede dededede dededede dededede ................ +82010080: dededede dededede dededede dededede ................ +82010090: dededede dededede dededede dededede ................ +820100a0: dededede dededede dededede dededede ................ +820100b0: dededede dededede dededede dededede ................ +820100c0: dededede dededede dededede dededede ................ +820100d0: dededede dededede dededede dededede ................ +820100e0: dededede dededede dededede dededede ................ +820100f0: dededede dededede dededede dededede ................ +U-Boot# md 0x82030000 +82030000: dededede dededede dededede dededede ................ +82030010: dededede dededede dededede dededede ................ +82030020: dededede dededede dededede dededede ................ +82030030: dededede dededede dededede dededede ................ +82030040: dededede dededede dededede dededede ................ +82030050: dededede dededede dededede dededede ................ +82030060: dededede dededede dededede dededede ................ +82030070: dededede dededede dededede dededede ................ +82030080: dededede dededede dededede dededede ................ +82030090: dededede dededede dededede dededede ................ +820300a0: dededede dededede dededede dededede ................ +820300b0: dededede dededede dededede dededede ................ +820300c0: dededede dededede dededede dededede ................ +820300d0: dededede dededede dededede dededede ................ +820300e0: dededede dededede dededede dededede ................ +820300f0: dededede dededede dededede dededede ................

From: "Poddar, Sourav" sourav.poddar@ti.com
Add AM43xx specific changes.
Signed-off-by: Sourav Poddar sourav.poddar@ti.com Reviewed-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com --- V3: Updated commit head, Added review tag V2: none
drivers/spi/ti_qspi.c | 26 +++++++++++++++++++++++--- 1 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 5a5b482..5666250 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -11,6 +11,8 @@ #include <asm/arch/omap.h> #include <malloc.h> #include <spi.h> +#include <asm/gpio.h> +#include <asm/omap_gpio.h>
/* ti qpsi register bit masks */ #define QSPI_TIMEOUT 2000000 @@ -39,7 +41,8 @@ #define MM_SWITCH 0x01 #define MEM_CS 0x100 #define MEM_CS_UNSELECT 0xfffff0ff -#define MMAP_START_ADDR 0x5c000000 +#define MMAP_START_ADDR_DRA 0x5c000000 +#define MMAP_START_ADDR_AM43x 0x30000000 #define CORE_CTRL_IO 0x4a002558
#define QSPI_CMD_READ (0x3 << 0) @@ -99,7 +102,11 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave) struct spi_slave *slave = &qslave->slave; u32 memval = 0;
- slave->memory_map = (void *)MMAP_START_ADDR; +#ifdef CONFIG_DRA7XX + slave->memory_map = (void *)MMAP_START_ADDR_DRA; +#else + slave->memory_map = (void *)MMAP_START_ADDR_AM43x; +#endif
memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | @@ -165,6 +172,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, { struct ti_qspi_slave *qslave;
+#ifdef CONFIG_AM43XX + gpio_request(CONFIG_QSPI_SEL_GPIO, "qspi_gpio"); + gpio_direction_output(CONFIG_QSPI_SEL_GPIO, 1); +#endif + qslave = spi_alloc_slave(struct ti_qspi_slave, bus, cs); if (!qslave) { printf("SPI_error: Fail to allocate ti_qspi_slave\n"); @@ -229,7 +241,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, const uchar *txp = dout; uchar *rxp = din; uint status; - int timeout, val; + int timeout; + +#ifdef CONFIG_DRA7XX + int val; +#endif
debug("spi_xfer: bus:%i cs:%i bitlen:%i words:%i flags:%lx\n", slave->bus, slave->cs, bitlen, words, flags); @@ -237,15 +253,19 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, /* Setup mmap flags */ if (flags & SPI_XFER_MMAP) { writel(MM_SWITCH, &qslave->base->memswitch); +#ifdef CONFIG_DRA7XX val = readl(CORE_CTRL_IO); val |= MEM_CS; writel(val, CORE_CTRL_IO); +#endif return 0; } else if (flags & SPI_XFER_MMAP_END) { writel(~MM_SWITCH, &qslave->base->memswitch); +#ifdef CONFIG_DRA7XX val = readl(CORE_CTRL_IO); val &= MEM_CS_UNSELECT; writel(val, CORE_CTRL_IO); +#endif return 0; }

From: "Poddar, Sourav" sourav.poddar@ti.com
Without this delay, write/read is failing. Looks like, the WIP always remain set and hence a timeout occurs leading to the error.
Without this patch, device does not get probed also. Here is the log.
U-Boot# U-Boot# U-Boot# U-Boot# sf probe 0 SF: Unsupported flash IDs: manuf ff, jedec ffff, ext_jedec ffff Failed to initialize SPI flash at 0:0 U-Boot# sf probe 0
While with this patch, log is U-Boot# sf probe 0 SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB, mapped at 30000000 U-Boot# sf erase 0 0x80000 SF: 524288 bytes @ 0x0 Erased: OK U-Boot# mw 81000000 0xdededede 0x40000 U-Boot# sf write 81000000 0 0x40000 SF: 262144 bytes @ 0x0 Written: OK U-Boot# sf read 82000000 0 0x40000 SF: 262144 bytes @ 0x0 Read: OK U-Boot# md 0x82000000
Signed-off-by: Sourav Poddar sourav.poddar@ti.com Reviewed-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com --- V3: Modified commit head, Added review tag v1->v2: - updated commit log with error message. - Add a FIXME comment in code, drivers/spi/ti_qspi.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 5666250..dfa5d0c 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -285,6 +285,13 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, qslave->cmd |= QSPI_3_PIN; qslave->cmd |= 0xfff;
+/* FIXME: This delay is required for successfull + * completion of read/write/erase. Once its root + * caused, it will be remove from the driver. + */ +#ifdef CONFIG_AM43XX + udelay(100); +#endif while (words--) { if (txp) { debug("tx cmd %08x dc %08x data %02x\n",

From: "Poddar, Sourav" sourav.poddar@ti.com
This shows the log obtained while testing qspi on AM437x board.
Signed-off-by: Sourav Poddar sourav.poddar@ti.com Reviewed-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com --- V3: Added review tag V2: none
doc/SPI/README.ti_qspi_am43x_test | 76 +++++++++++++++++++++++++++++++++++++ 1 files changed, 76 insertions(+), 0 deletions(-) create mode 100644 doc/SPI/README.ti_qspi_am43x_test
diff --git a/doc/SPI/README.ti_qspi_am43x_test b/doc/SPI/README.ti_qspi_am43x_test new file mode 100644 index 0000000..8fbf10b --- /dev/null +++ b/doc/SPI/README.ti_qspi_am43x_test @@ -0,0 +1,76 @@ +Testing details- +---------------- + +This doc simply illustrated the testing details of qspi flash +driver with Macronix M25L51235 flash device. + +The test includes +- probing the flash device +- erasing the flash device +- Writing to flash +- Reading the contents of the flash. + +Test Log +-------- + +Hit any key to stop autoboot: 0 +U-Boot# sf probe 0 +SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB, mapped at 30000000 +U-Boot# sf erase 0 0x80000 +SF: 524288 bytes @ 0x0 Erased: OK +U-Boot# mw 81000000 0xdededede 0x40000 +U-Boot# sf write 81000000 0 0x40000 +SF: 262144 bytes @ 0x0 Written: OK +U-Boot# sf read 82000000 0 0x40000 +SF: 262144 bytes @ 0x0 Read: OK +U-Boot# md 0x82000000 +82000000: dededede dededede dededede dededede ................ +82000010: dededede dededede dededede dededede ................ +82000020: dededede dededede dededede dededede ................ +82000030: dededede dededede dededede dededede ................ +82000040: dededede dededede dededede dededede ................ +82000050: dededede dededede dededede dededede ................ +82000060: dededede dededede dededede dededede ................ +82000070: dededede dededede dededede dededede ................ +82000080: dededede dededede dededede dededede ................ +82000090: dededede dededede dededede dededede ................ +820000a0: dededede dededede dededede dededede ................ +820000b0: dededede dededede dededede dededede ................ +820000c0: dededede dededede dededede dededede ................ +820000d0: dededede dededede dededede dededede ................ +820000e0: dededede dededede dededede dededede ................ +820000f0: dededede dededede dededede dededede ................ +U-Boot# md 0x82010000 +82010000: dededede dededede dededede dededede ................ +82010010: dededede dededede dededede dededede ................ +82010020: dededede dededede dededede dededede ................ +82010030: dededede dededede dededede dededede ................ +82010040: dededede dededede dededede dededede ................ +82010050: dededede dededede dededede dededede ................ +82010060: dededede dededede dededede dededede ................ +82010070: dededede dededede dededede dededede ................ +82010080: dededede dededede dededede dededede ................ +82010090: dededede dededede dededede dededede ................ +820100a0: dededede dededede dededede dededede ................ +820100b0: dededede dededede dededede dededede ................ +820100c0: dededede dededede dededede dededede ................ +820100d0: dededede dededede dededede dededede ................ +820100e0: dededede dededede dededede dededede ................ +820100f0: dededede dededede dededede dededede ................ +U-Boot# md 0x82030000 +82030000: dededede dededede dededede dededede ................ +82030010: dededede dededede dededede dededede ................ +82030020: dededede dededede dededede dededede ................ +82030030: dededede dededede dededede dededede ................ +82030040: dededede dededede dededede dededede ................ +82030050: dededede dededede dededede dededede ................ +82030060: dededede dededede dededede dededede ................ +82030070: dededede dededede dededede dededede ................ +82030080: dededede dededede dededede dededede ................ +82030090: dededede dededede dededede dededede ................ +820300a0: dededede dededede dededede dededede ................ +820300b0: dededede dededede dededede dededede ................ +820300c0: dededede dededede dededede dededede ................ +820300d0: dededede dededede dededede dededede ................ +820300e0: dededede dededede dededede dededede ................ +820300f0: dededede dededede dededede dededede ................

From: Jagannadha Sutradharudu Teki jagannadha.sutradharudu-teki@xilinx.com
From: "Poddar, Sourav" sourav.poddar@ti.com
Add QSPI definitions and clock configuration support.
Signed-off-by: Sourav Poddar sourav.poddar@ti.com Reviewed-by: Jagannadha Sutradharudu Teki jaganna@xilinx.com --- V3: Added review tag V2:
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 1 + arch/arm/include/asm/arch-am33xx/cpu.h | 4 +++- arch/arm/include/asm/arch-am33xx/omap.h | 1 + 3 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 97c00b4..fb654bb 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -98,6 +98,7 @@ void enable_basic_clocks(void) &cmper->emiffwclkctrl, &cmper->emifclkctrl, &cmper->otfaemifclkctrl, + &cmper->qspiclkctrl, 0 };
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 9febfa2..0736258 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -332,7 +332,9 @@ struct cm_perpll { unsigned int mcasp1clkctrl; /* offset 0x240 */ unsigned int resv11; unsigned int mmc2clkctrl; /* offset 0x248 */ - unsigned int resv12[5]; + unsigned int resv12[3]; + unsigned int qspiclkctrl; /* offset 0x258 */ + unsigned int resv121; unsigned int usb0clkctrl; /* offset 0x260 */ unsigned int resv13[103]; unsigned int l4lsclkstctrl; /* offset 0x400 */ diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index 7a7d91b..0855d16 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -29,5 +29,6 @@ #define SRAM_SCRATCH_SPACE_ADDR 0x40337C00 #define AM4372_BOARD_NAME_START SRAM_SCRATCH_SPACE_ADDR #define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC +#define QSPI_BASE 0x47900000 #endif #endif

Hi Jagan, On Saturday 21 December 2013 12:50 PM, Jagannadha Sutradharudu Teki wrote:
From: Jagannadha Sutradharudu Tekijagannadha.sutradharudu-teki@xilinx.com
From: "Poddar, Sourav"sourav.poddar@ti.com
Add QSPI definitions and clock configuration support.
Signed-off-by: Sourav Poddarsourav.poddar@ti.com Reviewed-by: Jagannadha Sutradharudu Tekijaganna@xilinx.com
V3: Added review tag V2:
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 1 + arch/arm/include/asm/arch-am33xx/cpu.h | 4 +++- arch/arm/include/asm/arch-am33xx/omap.h | 1 + 3 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 97c00b4..fb654bb 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -98,6 +98,7 @@ void enable_basic_clocks(void) &cmper->emiffwclkctrl, &cmper->emifclkctrl, &cmper->otfaemifclkctrl,
0 };&cmper->qspiclkctrl,
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 9febfa2..0736258 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -332,7 +332,9 @@ struct cm_perpll { unsigned int mcasp1clkctrl; /* offset 0x240 */ unsigned int resv11; unsigned int mmc2clkctrl; /* offset 0x248 */
- unsigned int resv12[5];
- unsigned int resv12[3];
- unsigned int qspiclkctrl; /* offset 0x258 */
- unsigned int resv121; unsigned int usb0clkctrl; /* offset 0x260 */ unsigned int resv13[103]; unsigned int l4lsclkstctrl; /* offset 0x400 */
diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index 7a7d91b..0855d16 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -29,5 +29,6 @@ #define SRAM_SCRATCH_SPACE_ADDR 0x40337C00 #define AM4372_BOARD_NAME_START SRAM_SCRATCH_SPACE_ADDR #define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC +#define QSPI_BASE 0x47900000 #endif #endif
This looks Ok to me. How you want this to go? I mean as Tom suggested in some earlier version through his tree? or yours?

Hi Sourav,
On Mon, Jan 6, 2014 at 12:10 PM, Sourav Poddar sourav.poddar@ti.com wrote:
Hi Jagan,
On Saturday 21 December 2013 12:50 PM, Jagannadha Sutradharudu Teki wrote:
From: Jagannadha Sutradharudu Tekijagannadha.sutradharudu-teki@xilinx.com
From: "Poddar, Sourav"sourav.poddar@ti.com
Add QSPI definitions and clock configuration support.
Signed-off-by: Sourav Poddarsourav.poddar@ti.com Reviewed-by: Jagannadha Sutradharudu Tekijaganna@xilinx.com
V3: Added review tag V2:
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 1 + arch/arm/include/asm/arch-am33xx/cpu.h | 4 +++- arch/arm/include/asm/arch-am33xx/omap.h | 1 + 3 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 97c00b4..fb654bb 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -98,6 +98,7 @@ void enable_basic_clocks(void) &cmper->emiffwclkctrl, &cmper->emifclkctrl, &cmper->otfaemifclkctrl,
&cmper->qspiclkctrl, 0 };
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 9febfa2..0736258 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -332,7 +332,9 @@ struct cm_perpll { unsigned int mcasp1clkctrl; /* offset 0x240 */ unsigned int resv11; unsigned int mmc2clkctrl; /* offset 0x248 */
unsigned int resv12[5];
unsigned int resv12[3];
unsigned int qspiclkctrl; /* offset 0x258 */
unsigned int resv121; unsigned int usb0clkctrl; /* offset 0x260 */ unsigned int resv13[103]; unsigned int l4lsclkstctrl; /* offset 0x400 */
diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index 7a7d91b..0855d16 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -29,5 +29,6 @@ #define SRAM_SCRATCH_SPACE_ADDR 0x40337C00 #define AM4372_BOARD_NAME_START SRAM_SCRATCH_SPACE_ADDR #define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC +#define QSPI_BASE 0x47900000 #endif #endif
This looks Ok to me. How you want this to go? I mean as Tom suggested in some earlier version through his tree? or yours?
Tom told in earlier that - he will take this series as there are some conflicts w.r.t u-boot-ti http://u-boot.10912.n7.nabble.com/UBOOT-PATCHv2-0-5-qspi-Add-AM437x-support-...
I sent this series again to fix one warning and added Reviewed-by tag.

On Monday 06 January 2014 01:06 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jan 6, 2014 at 12:10 PM, Sourav Poddarsourav.poddar@ti.com wrote:
Hi Jagan,
On Saturday 21 December 2013 12:50 PM, Jagannadha Sutradharudu Teki wrote:
From: Jagannadha Sutradharudu Tekijagannadha.sutradharudu-teki@xilinx.com
From: "Poddar, Sourav"sourav.poddar@ti.com
Add QSPI definitions and clock configuration support.
Signed-off-by: Sourav Poddarsourav.poddar@ti.com Reviewed-by: Jagannadha Sutradharudu Tekijaganna@xilinx.com
V3: Added review tag V2:
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 1 + arch/arm/include/asm/arch-am33xx/cpu.h | 4 +++- arch/arm/include/asm/arch-am33xx/omap.h | 1 + 3 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 97c00b4..fb654bb 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -98,6 +98,7 @@ void enable_basic_clocks(void) &cmper->emiffwclkctrl, &cmper->emifclkctrl, &cmper->otfaemifclkctrl, +&cmper->qspiclkctrl, 0 };
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 9febfa2..0736258 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -332,7 +332,9 @@ struct cm_perpll { unsigned int mcasp1clkctrl; /* offset 0x240 */ unsigned int resv11; unsigned int mmc2clkctrl; /* offset 0x248 */
unsigned int resv12[5];
unsigned int resv12[3];
unsigned int qspiclkctrl; /* offset 0x258 */
unsigned int resv121; unsigned int usb0clkctrl; /* offset 0x260 */ unsigned int resv13[103]; unsigned int l4lsclkstctrl; /* offset 0x400 */
diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index 7a7d91b..0855d16 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -29,5 +29,6 @@ #define SRAM_SCRATCH_SPACE_ADDR 0x40337C00 #define AM4372_BOARD_NAME_START SRAM_SCRATCH_SPACE_ADDR #define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC +#define QSPI_BASE 0x47900000 #endif #endif
This looks Ok to me. How you want this to go? I mean as Tom suggested in some earlier version through his tree? or yours?
Tom told in earlier that - he will take this series as there are some conflicts w.r.t u-boot-ti http://u-boot.10912.n7.nabble.com/UBOOT-PATCHv2-0-5-qspi-Add-AM437x-support-...
I sent this series again to fix one warning and added Reviewed-by tag.
Ok thanks,
Tom,
Can you pick this one?

On Mon, Jan 6, 2014 at 1:51 PM, Sourav Poddar sourav.poddar@ti.com wrote:
On Monday 06 January 2014 01:06 PM, Jagan Teki wrote:
Hi Sourav,
On Mon, Jan 6, 2014 at 12:10 PM, Sourav Poddarsourav.poddar@ti.com wrote:
Hi Jagan,
On Saturday 21 December 2013 12:50 PM, Jagannadha Sutradharudu Teki wrote:
From: Jagannadha Sutradharudu Tekijagannadha.sutradharudu-teki@xilinx.com
From: "Poddar, Sourav"sourav.poddar@ti.com
Add QSPI definitions and clock configuration support.
Signed-off-by: Sourav Poddarsourav.poddar@ti.com Reviewed-by: Jagannadha Sutradharudu Tekijaganna@xilinx.com
V3: Added review tag V2:
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 1 + arch/arm/include/asm/arch-am33xx/cpu.h | 4 +++- arch/arm/include/asm/arch-am33xx/omap.h | 1 + 3 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c index 97c00b4..fb654bb 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am43xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am43xx.c @@ -98,6 +98,7 @@ void enable_basic_clocks(void) &cmper->emiffwclkctrl, &cmper->emifclkctrl, &cmper->otfaemifclkctrl, +&cmper->qspiclkctrl,
0 };
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index 9febfa2..0736258 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -332,7 +332,9 @@ struct cm_perpll { unsigned int mcasp1clkctrl; /* offset 0x240 */ unsigned int resv11; unsigned int mmc2clkctrl; /* offset 0x248 */
unsigned int resv12[5];
unsigned int resv12[3];
unsigned int qspiclkctrl; /* offset 0x258 */
unsigned int resv121; unsigned int usb0clkctrl; /* offset 0x260 */ unsigned int resv13[103]; unsigned int l4lsclkstctrl; /* offset 0x400 */
diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h index 7a7d91b..0855d16 100644 --- a/arch/arm/include/asm/arch-am33xx/omap.h +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -29,5 +29,6 @@ #define SRAM_SCRATCH_SPACE_ADDR 0x40337C00 #define AM4372_BOARD_NAME_START SRAM_SCRATCH_SPACE_ADDR #define AM4372_BOARD_NAME_END SRAM_SCRATCH_SPACE_ADDR + 0xC +#define QSPI_BASE 0x47900000 #endif #endif
This looks Ok to me. How you want this to go? I mean as Tom suggested in some earlier version through his tree? or yours?
Tom told in earlier that - he will take this series as there are some conflicts w.r.t u-boot-ti
http://u-boot.10912.n7.nabble.com/UBOOT-PATCHv2-0-5-qspi-Add-AM437x-support-...
I sent this series again to fix one warning and added Reviewed-by tag.
Ok thanks,
Tom,
Can you pick this one?
fyi: I just marked these series to Tom as a delegate.

Add AM43xx specific changes.
Signed-off-by: Sourav Poddar sourav.poddar@ti.com --- drivers/spi/ti_qspi.c | 26 +++++++++++++++++++++++--- 1 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 5a5b482..5666250 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -11,6 +11,8 @@ #include <asm/arch/omap.h> #include <malloc.h> #include <spi.h> +#include <asm/gpio.h> +#include <asm/omap_gpio.h>
/* ti qpsi register bit masks */ #define QSPI_TIMEOUT 2000000 @@ -39,7 +41,8 @@ #define MM_SWITCH 0x01 #define MEM_CS 0x100 #define MEM_CS_UNSELECT 0xfffff0ff -#define MMAP_START_ADDR 0x5c000000 +#define MMAP_START_ADDR_DRA 0x5c000000 +#define MMAP_START_ADDR_AM43x 0x30000000 #define CORE_CTRL_IO 0x4a002558
#define QSPI_CMD_READ (0x3 << 0) @@ -99,7 +102,11 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave) struct spi_slave *slave = &qslave->slave; u32 memval = 0;
- slave->memory_map = (void *)MMAP_START_ADDR; +#ifdef CONFIG_DRA7XX + slave->memory_map = (void *)MMAP_START_ADDR_DRA; +#else + slave->memory_map = (void *)MMAP_START_ADDR_AM43x; +#endif
memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | @@ -165,6 +172,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, { struct ti_qspi_slave *qslave;
+#ifdef CONFIG_AM43XX + gpio_request(CONFIG_QSPI_SEL_GPIO, "qspi_gpio"); + gpio_direction_output(CONFIG_QSPI_SEL_GPIO, 1); +#endif + qslave = spi_alloc_slave(struct ti_qspi_slave, bus, cs); if (!qslave) { printf("SPI_error: Fail to allocate ti_qspi_slave\n"); @@ -229,7 +241,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, const uchar *txp = dout; uchar *rxp = din; uint status; - int timeout, val; + int timeout; + +#ifdef CONFIG_DRA7XX + int val; +#endif
debug("spi_xfer: bus:%i cs:%i bitlen:%i words:%i flags:%lx\n", slave->bus, slave->cs, bitlen, words, flags); @@ -237,15 +253,19 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, /* Setup mmap flags */ if (flags & SPI_XFER_MMAP) { writel(MM_SWITCH, &qslave->base->memswitch); +#ifdef CONFIG_DRA7XX val = readl(CORE_CTRL_IO); val |= MEM_CS; writel(val, CORE_CTRL_IO); +#endif return 0; } else if (flags & SPI_XFER_MMAP_END) { writel(~MM_SWITCH, &qslave->base->memswitch); +#ifdef CONFIG_DRA7XX val = readl(CORE_CTRL_IO); val &= MEM_CS_UNSELECT; writel(val, CORE_CTRL_IO); +#endif return 0; }

Without this delay, write/read is failing. Looks like, the WIP always remain set and hence a timeout occurs leading to the error.
Without this patch, device does not get probed also. Here is the log.
U-Boot# U-Boot# U-Boot# U-Boot# sf probe 0 SF: Unsupported flash IDs: manuf ff, jedec ffff, ext_jedec ffff Failed to initialize SPI flash at 0:0 U-Boot# sf probe 0
While with this patch, log is U-Boot# sf probe 0 SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB, mapped at 30000000 U-Boot# sf erase 0 0x80000 SF: 524288 bytes @ 0x0 Erased: OK U-Boot# mw 81000000 0xdededede 0x40000 U-Boot# sf write 81000000 0 0x40000 SF: 262144 bytes @ 0x0 Written: OK U-Boot# sf read 82000000 0 0x40000 SF: 262144 bytes @ 0x0 Read: OK U-Boot# md 0x82000000
Signed-off-by: Sourav Poddar sourav.poddar@ti.com --- v1->v2: - updated commit log with error message. - Add a FIXME comment in code, drivers/spi/ti_qspi.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 5666250..dfa5d0c 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -285,6 +285,13 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, qslave->cmd |= QSPI_3_PIN; qslave->cmd |= 0xfff;
+/* FIXME: This delay is required for successfull + * completion of read/write/erase. Once its root + * caused, it will be remove from the driver. + */ +#ifdef CONFIG_AM43XX + udelay(100); +#endif while (words--) { if (txp) { debug("tx cmd %08x dc %08x data %02x\n",

This shows the log obtained while testing qspi on AM437x board.
Signed-off-by: Sourav Poddar sourav.poddar@ti.com --- doc/SPI/README.ti_qspi_am43x_test | 76 +++++++++++++++++++++++++++++++++++++ 1 files changed, 76 insertions(+), 0 deletions(-) create mode 100644 doc/SPI/README.ti_qspi_am43x_test
diff --git a/doc/SPI/README.ti_qspi_am43x_test b/doc/SPI/README.ti_qspi_am43x_test new file mode 100644 index 0000000..8fbf10b --- /dev/null +++ b/doc/SPI/README.ti_qspi_am43x_test @@ -0,0 +1,76 @@ +Testing details- +---------------- + +This doc simply illustrated the testing details of qspi flash +driver with Macronix M25L51235 flash device. + +The test includes +- probing the flash device +- erasing the flash device +- Writing to flash +- Reading the contents of the flash. + +Test Log +-------- + +Hit any key to stop autoboot: 0 +U-Boot# sf probe 0 +SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB, mapped at 30000000 +U-Boot# sf erase 0 0x80000 +SF: 524288 bytes @ 0x0 Erased: OK +U-Boot# mw 81000000 0xdededede 0x40000 +U-Boot# sf write 81000000 0 0x40000 +SF: 262144 bytes @ 0x0 Written: OK +U-Boot# sf read 82000000 0 0x40000 +SF: 262144 bytes @ 0x0 Read: OK +U-Boot# md 0x82000000 +82000000: dededede dededede dededede dededede ................ +82000010: dededede dededede dededede dededede ................ +82000020: dededede dededede dededede dededede ................ +82000030: dededede dededede dededede dededede ................ +82000040: dededede dededede dededede dededede ................ +82000050: dededede dededede dededede dededede ................ +82000060: dededede dededede dededede dededede ................ +82000070: dededede dededede dededede dededede ................ +82000080: dededede dededede dededede dededede ................ +82000090: dededede dededede dededede dededede ................ +820000a0: dededede dededede dededede dededede ................ +820000b0: dededede dededede dededede dededede ................ +820000c0: dededede dededede dededede dededede ................ +820000d0: dededede dededede dededede dededede ................ +820000e0: dededede dededede dededede dededede ................ +820000f0: dededede dededede dededede dededede ................ +U-Boot# md 0x82010000 +82010000: dededede dededede dededede dededede ................ +82010010: dededede dededede dededede dededede ................ +82010020: dededede dededede dededede dededede ................ +82010030: dededede dededede dededede dededede ................ +82010040: dededede dededede dededede dededede ................ +82010050: dededede dededede dededede dededede ................ +82010060: dededede dededede dededede dededede ................ +82010070: dededede dededede dededede dededede ................ +82010080: dededede dededede dededede dededede ................ +82010090: dededede dededede dededede dededede ................ +820100a0: dededede dededede dededede dededede ................ +820100b0: dededede dededede dededede dededede ................ +820100c0: dededede dededede dededede dededede ................ +820100d0: dededede dededede dededede dededede ................ +820100e0: dededede dededede dededede dededede ................ +820100f0: dededede dededede dededede dededede ................ +U-Boot# md 0x82030000 +82030000: dededede dededede dededede dededede ................ +82030010: dededede dededede dededede dededede ................ +82030020: dededede dededede dededede dededede ................ +82030030: dededede dededede dededede dededede ................ +82030040: dededede dededede dededede dededede ................ +82030050: dededede dededede dededede dededede ................ +82030060: dededede dededede dededede dededede ................ +82030070: dededede dededede dededede dededede ................ +82030080: dededede dededede dededede dededede ................ +82030090: dededede dededede dededede dededede ................ +820300a0: dededede dededede dededede dededede ................ +820300b0: dededede dededede dededede dededede ................ +820300c0: dededede dededede dededede dededede ................ +820300d0: dededede dededede dededede dededede ................ +820300e0: dededede dededede dededede dededede ................ +820300f0: dededede dededede dededede dededede ................

On Fri, Dec 20, 2013 at 11:27:39AM +0530, Sourav Poddar wrote:
This shows the log obtained while testing qspi on AM437x board.
Signed-off-by: Sourav Poddar sourav.poddar@ti.com
doc/SPI/README.ti_qspi_am43x_test | 76 +++++++++++++++++++++++++++++++++++++ 1 files changed, 76 insertions(+), 0 deletions(-) create mode 100644 doc/SPI/README.ti_qspi_am43x_test
diff --git a/doc/SPI/README.ti_qspi_am43x_test b/doc/SPI/README.ti_qspi_am43x_test new file mode 100644 index 0000000..8fbf10b --- /dev/null +++ b/doc/SPI/README.ti_qspi_am43x_test @@ -0,0 +1,76 @@ +Testing details- +----------------
+This doc simply illustrated the testing details of qspi flash +driver with Macronix M25L51235 flash device.
+The test includes +- probing the flash device +- erasing the flash device +- Writing to flash +- Reading the contents of the flash.
+Test Log +--------
+Hit any key to stop autoboot: 0 +U-Boot# sf probe 0 +SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB, mapped at 30000000 +U-Boot# sf erase 0 0x80000 +SF: 524288 bytes @ 0x0 Erased: OK +U-Boot# mw 81000000 0xdededede 0x40000 +U-Boot# sf write 81000000 0 0x40000 +SF: 262144 bytes @ 0x0 Written: OK +U-Boot# sf read 82000000 0 0x40000 +SF: 262144 bytes @ 0x0 Read: OK +U-Boot# md 0x82000000
...
+U-Boot# md 0x82010000
....
+U-Boot# md 0x82030000
....
Note that you should use cmp.b 0x81000000 0x82000000 0x40000 :) Not that you need to change the example here, just FYI.

Hi Sourav,
On Fri, Dec 20, 2013 at 11:27 AM, Sourav Poddar sourav.poddar@ti.com wrote:
The patch series add support for enabling qspi on AM43xx at uboot.
Testing done:
Wrote a uImage to the flash, read it back and boot the kernel.
v1->v2: Remove patch 3 of previous version, as support was already added for macronix flash. Created a doc explaining the test details.
This patches are developed and tested on top of the following tree: git://git.denx.de/u-boot-ti.git branch: master
These are no apply directly to master may be some dependencies require - please check.
Sourav Poddar (5): am43xx: add qspi support am437x_epos_evm: add SPL API, QSPI, and serial flash support qspi/spi: Add AM43xx specifics changes am43xx: add delay before xfer doc: qspi: Add qspi test details on AM43xx
arch/arm/cpu/armv7/am33xx/clock_am43xx.c | 1 + arch/arm/include/asm/arch-am33xx/cpu.h | 4 +- arch/arm/include/asm/arch-am33xx/omap.h | 1 + board/ti/am43xx/mux.c | 11 ++++ doc/SPI/README.ti_qspi_am43x_test | 76 ++++++++++++++++++++++++++++++ drivers/spi/ti_qspi.c | 33 ++++++++++++- include/configs/am43xx_evm.h | 20 ++++++++ 7 files changed, 142 insertions(+), 4 deletions(-) create mode 100644 doc/SPI/README.ti_qspi_am43x_test

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On 12/20/2013 01:18 PM, Jagan Teki wrote:
Hi Sourav,
On Fri, Dec 20, 2013 at 11:27 AM, Sourav Poddar sourav.poddar@ti.com wrote:
The patch series add support for enabling qspi on AM43xx at uboot.
Testing done:
Wrote a uImage to the flash, read it back and boot the kernel.
v1->v2: Remove patch 3 of previous version, as support was already added for macronix flash. Created a doc explaining the test details.
This patches are developed and tested on top of the following tree: git://git.denx.de/u-boot-ti.git branch: master
These are no apply directly to master may be some dependencies require
- please check.
This probably requires patches in u-boot-ti that haven't hit mainline yet. I can take the series if you're OK with the spi parts. Thanks!
- -- Tom

On Friday 20 December 2013 11:56 PM, Tom Rini wrote:
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On 12/20/2013 01:18 PM, Jagan Teki wrote:
Hi Sourav,
On Fri, Dec 20, 2013 at 11:27 AM, Sourav Poddarsourav.poddar@ti.com wrote:
The patch series add support for enabling qspi on AM43xx at uboot.
Testing done:
Wrote a uImage to the flash, read it back and boot the kernel.
v1->v2: Remove patch 3 of previous version, as support was already added for macronix flash. Created a doc explaining the test details.
This patches are developed and tested on top of the following tree: git://git.denx.de/u-boot-ti.git branch: master
These are no apply directly to master may be some dependencies require
- please check.
This probably requires patches in u-boot-ti that haven't hit mainline yet. I can take the series if you're OK with the spi parts. Thanks!
Yes, thats the case. As, mentioned in cover letter it is developed on ti uboot as it has dependency.
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participants (4)
-
Jagan Teki
-
Jagannadha Sutradharudu Teki
-
Sourav Poddar
-
Tom Rini