This patch moves the qrio and i2c deblocking code to keymile/common as it will also be used by the upcoming CENT2 board.

Signed-off-by: Holger Brunck holger.brunck@ch.abb.com CC: Priyanka Jain priyanka.jain@nxp.com --- board/keymile/{kmp204x => common}/qrio.c | 84 ++++++++++++++++++++++-- board/keymile/common/qrio.h | 40 +++++++++++ board/keymile/kmp204x/Makefile | 4 +- board/keymile/kmp204x/kmp204x.c | 48 +------------- board/keymile/kmp204x/kmp204x.h | 26 -------- board/keymile/kmp204x/pci.c | 15 +++-- include/configs/kmp204x.h | 4 ++ 7 files changed, 135 insertions(+), 86 deletions(-) rename board/keymile/{kmp204x => common}/qrio.c (66%) create mode 100644 board/keymile/common/qrio.h

diff --git a/board/keymile/kmp204x/qrio.c b/board/keymile/common/qrio.c similarity index 66% rename from board/keymile/kmp204x/qrio.c rename to board/keymile/common/qrio.c index 03026a277b..0641ffa8b2 100644 --- a/board/keymile/kmp204x/qrio.c +++ b/board/keymile/common/qrio.c @@ -6,8 +6,8 @@

#include <common.h>

-#include "../common/common.h" -#include "kmp204x.h" +#include "common.h" +#include "qrio.h"

/* QRIO GPIO register offsets */ #define DIRECT_OFF 0x18 @@ -135,10 +135,10 @@ void qrio_prstcfg(u8 bit, u8 mode) prstcfg = in_be32(qrio_base + PRSTCFG_OFF);

for (i = 0; i < 2; i++) { - if (mode & (1<<i)) - set_bit(2*bit+i, &prstcfg); + if (mode & (1 << i)) + set_bit(2 * bit + i, &prstcfg); else - clear_bit(2*bit+i, &prstcfg); + clear_bit(2 * bit + i, &prstcfg); }

out_be32(qrio_base + PRSTCFG_OFF, prstcfg); @@ -180,6 +180,7 @@ void qrio_cpuwd_flag(bool flag) { u8 reason1; void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + reason1 = in_8(qrio_base + REASON1_OFF); if (flag) reason1 |= REASON1_CPUWD; @@ -188,6 +189,31 @@ void qrio_cpuwd_flag(bool flag) out_8(qrio_base + REASON1_OFF, reason1); }

+#define REASON0_OFF 0x13 +#define REASON0_SWURST 0x80 +#define REASON0_CPURST 0x40 +#define REASON0_BPRST 0x20 +#define REASON0_COPRST 0x10 +#define REASON0_SWCRST 0x08 +#define REASON0_WDRST 0x04 +#define REASON0_KBRST 0x02 +#define REASON0_POWUP 0x01 +#define UNIT_RESET\ + ((REASON1_CPUWD << 8) |\ + REASON0_POWUP | REASON0_COPRST | REASON0_KBRST |\ + REASON0_BPRST | REASON0_SWURST | REASON0_WDRST) +#define CORE_RESET REASON0_SWCRST + +bool qrio_reason_unitrst(void) +{ + u16 reason; + void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; + + reason = in_be16(qrio_base + REASON1_OFF); + + return (reason & UNIT_RESET) > 0; +} + #define RSTCFG_OFF 0x11

void qrio_uprstreq(u8 mode) @@ -204,3 +230,51 @@ void qrio_uprstreq(u8 mode)

out_8(qrio_base + RSTCFG_OFF, rstcfg); } + +/* I2C deblocking uses the algorithm defined in board/keymile/common/common.c + * 2 dedicated QRIO GPIOs externally pull the SCL and SDA lines + * For I2C only the low state is activly driven and high state is pulled-up + * by a resistor. Therefore the deblock GPIOs are used + * -> as an active output to drive a low state + * -> as an open-drain input to have a pulled-up high state + */ + +/* By default deblock GPIOs are floating */ +void i2c_deblock_gpio_cfg(void) +{ + /* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */ + qrio_gpio_direction_input(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SCL); + qrio_gpio_direction_input(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SDA); + + qrio_set_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SCL, 0); + qrio_set_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SDA, 0); +} + +void set_sda(int state) +{ + qrio_set_opendrain_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SDA, state); +} + +void set_scl(int state) +{ + qrio_set_opendrain_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SCL, state); +} + +int get_sda(void) +{ + return qrio_get_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SDA); +} + +int get_scl(void) +{ + return qrio_get_gpio(KM_I2C_DEBLOCK_PORT, + KM_I2C_DEBLOCK_SCL); +} + diff --git a/board/keymile/common/qrio.h b/board/keymile/common/qrio.h new file mode 100644 index 0000000000..a6cfd8165d --- /dev/null +++ b/board/keymile/common/qrio.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2018 ABB + * Valentin Longchamp valentin.longchamp@ch.abb.com + */ + +#ifndef __QRIO_H +#define __QRIO_H + +/* QRIO GPIO ports */ +#define QRIO_GPIO_A 0x40 +#define QRIO_GPIO_B 0x60 + +int qrio_get_gpio(u8 port_off, u8 gpio_nr); +void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val); +void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value); +void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value); +void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr); + +/* QRIO Periphery reset configurations */ +#define PRSTCFG_POWUP_UNIT_CORE_RST 0x0 +#define PRSTCFG_POWUP_UNIT_RST 0x1 +#define PRSTCFG_POWUP_RST 0x3 + +void qrio_prst(u8 bit, bool en, bool wden); +void qrio_wdmask(u8 bit, bool wden); +void qrio_prstcfg(u8 bit, u8 mode); +void qrio_set_leds(void); +void qrio_enable_app_buffer(void); +void qrio_cpuwd_flag(bool flag); +bool qrio_reason_unitrst(void); + +/* QRIO uP reset request configurations */ +#define UPREQ_UNIT_RST 0x0 +#define UPREQ_CORE_RST 0x1 + +void qrio_uprstreq(u8 mode); + +void i2c_deblock_gpio_cfg(void); +#endif /* __QRIO_H */ diff --git a/board/keymile/kmp204x/Makefile b/board/keymile/kmp204x/Makefile index 626c627be7..5523ee99aa 100644 --- a/board/keymile/kmp204x/Makefile +++ b/board/keymile/kmp204x/Makefile @@ -6,5 +6,5 @@ # See file CREDITS for list of people who contributed to this # project.

-obj-y := kmp204x.o ddr.o eth.o tlb.o pci.o law.o qrio.o \ - ../common/common.o ../common/ivm.o +obj-y := kmp204x.o ddr.o eth.o tlb.o pci.o law.o ../common/common.o\ + ../common/ivm.o ../common/qrio.o diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index c974a9a5a5..ca9a536887 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -23,6 +23,7 @@ #include <fm_eth.h>

#include "../common/common.h" +#include "../common/qrio.h" #include "kmp204x.h"

static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; @@ -34,51 +35,6 @@ int checkboard(void) return 0; }

-/* I2C deblocking uses the algorithm defined in board/keymile/common/common.c - * 2 dedicated QRIO GPIOs externally pull the SCL and SDA lines - * For I2C only the low state is activly driven and high state is pulled-up - * by a resistor. Therefore the deblock GPIOs are used - * -> as an active output to drive a low state - * -> as an open-drain input to have a pulled-up high state - */ - -/* QRIO GPIOs used for deblocking */ -#define DEBLOCK_PORT1 GPIO_A -#define DEBLOCK_SCL1 20 -#define DEBLOCK_SDA1 21 - -/* By default deblock GPIOs are floating */ -static void i2c_deblock_gpio_cfg(void) -{ - /* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */ - qrio_gpio_direction_input(DEBLOCK_PORT1, DEBLOCK_SCL1); - qrio_gpio_direction_input(DEBLOCK_PORT1, DEBLOCK_SDA1); - - qrio_set_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1, 0); - qrio_set_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1, 0); -} - -void set_sda(int state) -{ - qrio_set_opendrain_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1, state); -} - -void set_scl(int state) -{ - qrio_set_opendrain_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1, state); -} - -int get_sda(void) -{ - return qrio_get_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1); -} - -int get_scl(void) -{ - return qrio_get_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1); -} - - #define ZL30158_RST 8 #define BFTIC4_RST 0 #define RSTRQSR1_WDT_RR 0x00200000 @@ -295,7 +251,7 @@ int ft_board_setup(void *blob, bd_t *bd) #if defined(CONFIG_POST)

/* DIC26_SELFTEST GPIO used to start factory test sw */ -#define SELFTEST_PORT GPIO_A +#define SELFTEST_PORT QRIO_GPIO_A #define SELFTEST_PIN 31

int post_hotkeys_pressed(void) diff --git a/board/keymile/kmp204x/kmp204x.h b/board/keymile/kmp204x/kmp204x.h index 4d14c44617..00e1a06662 100644 --- a/board/keymile/kmp204x/kmp204x.h +++ b/board/keymile/kmp204x/kmp204x.h @@ -4,31 +4,5 @@ * Valentin Longchamp valentin.longchamp@keymile.com */

-/* QRIO GPIO ports */ -#define GPIO_A 0x40 -#define GPIO_B 0x60 - -int qrio_get_gpio(u8 port_off, u8 gpio_nr); -void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val); -void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value); -void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value); -void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr); - -#define PRSTCFG_POWUP_UNIT_CORE_RST 0x0 -#define PRSTCFG_POWUP_UNIT_RST 0x1 -#define PRSTCFG_POWUP_RST 0x3 - -void qrio_prst(u8 bit, bool en, bool wden); -void qrio_wdmask(u8 bit, bool wden); -void qrio_prstcfg(u8 bit, u8 mode); -void qrio_set_leds(void); -void qrio_enable_app_buffer(void); -void qrio_cpuwd_flag(bool flag); -int qrio_reset_reason(void); - -#define UPREQ_UNIT_RST 0x0 -#define UPREQ_CORE_RST 0x1 - -void qrio_uprstreq(u8 mode);

void pci_of_setup(void *blob, bd_t *bd); diff --git a/board/keymile/kmp204x/pci.c b/board/keymile/kmp204x/pci.c index a8047457f2..15bbc810a1 100644 --- a/board/keymile/kmp204x/pci.c +++ b/board/keymile/kmp204x/pci.c @@ -16,13 +16,14 @@ #include <asm/fsl_serdes.h> #include <linux/errno.h>

+#include "../common/qrio.h" #include "kmp204x.h"

#define PROM_SEL_L 11 /* control the PROM_SEL_L signal*/ static void toggle_fpga_eeprom_bus(bool cpu_own) { - qrio_gpio_direction_output(GPIO_A, PROM_SEL_L, !cpu_own); + qrio_gpio_direction_output(QRIO_GPIO_A, PROM_SEL_L, !cpu_own); }

#define CONF_SEL_L 10 @@ -40,17 +41,17 @@ int trigger_fpga_config(void) toggle_fpga_eeprom_bus(false);

/* assert CONF_SEL_L to be able to drive FPGA_PROG_L */ - qrio_gpio_direction_output(GPIO_A, CONF_SEL_L, 0); + qrio_gpio_direction_output(QRIO_GPIO_A, CONF_SEL_L, 0);

/* trigger the config start */ - qrio_gpio_direction_output(GPIO_A, FPGA_PROG_L, 0); + qrio_gpio_direction_output(QRIO_GPIO_A, FPGA_PROG_L, 0);

/* small delay for INIT_L line */ udelay(10);

/* wait for FPGA_INIT to be asserted */ do { - init_l = qrio_get_gpio(GPIO_A, FPGA_INIT_L); + init_l = qrio_get_gpio(QRIO_GPIO_A, FPGA_INIT_L); if (timeout-- == 0) { printf("FPGA_INIT timeout\n"); ret = -EFAULT; @@ -60,7 +61,7 @@ int trigger_fpga_config(void) } while (init_l);

/* deassert FPGA_PROG, config should start */ - qrio_set_gpio(GPIO_A, FPGA_PROG_L, 1); + qrio_set_gpio(QRIO_GPIO_A, FPGA_PROG_L, 1);

return ret; } @@ -74,7 +75,7 @@ static int wait_for_fpga_config(void)

printf("PCIe FPGA config:"); do { - done = qrio_get_gpio(GPIO_A, FPGA_DONE); + done = qrio_get_gpio(QRIO_GPIO_A, FPGA_DONE); if (timeout-- == 0) { printf(" FPGA_DONE timeout\n"); ret = -EFAULT; @@ -87,7 +88,7 @@ static int wait_for_fpga_config(void)

err_out: /* deactive CONF_SEL and give the CPU conf EEPROM access */ - qrio_set_gpio(GPIO_A, CONF_SEL_L, 1); + qrio_set_gpio(QRIO_GPIO_A, CONF_SEL_L, 1); toggle_fpga_eeprom_bus(true);

return ret; diff --git a/include/configs/kmp204x.h b/include/configs/kmp204x.h index 6cee3b47b3..0224ac4148 100644 --- a/include/configs/kmp204x.h +++ b/include/configs/kmp204x.h @@ -224,6 +224,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_KM_CONSOLE_TTY "ttyS0"

/* I2C */ +/* QRIO GPIOs used for deblocking */ +#define KM_I2C_DEBLOCK_PORT QRIO_GPIO_A +#define KM_I2C_DEBLOCK_SCL 20 +#define KM_I2C_DEBLOCK_SDA 21

#define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_INIT_BOARD

From: Rainer Boschung rainer.boschung@ch.abb.com

The CPUWD reset reason is used for kmp204x. And the qrio cpu reset request is configured to operate in core reset mode. But for the evaluation of the qrio's reset reason register the CPUWD figures as a unit reset source rather than a core reset source. This patch defines the CPUWD reset as a core reset source when evaluating the reset reason register.

Signed-off-by: Rainer Boschung rainer.boschung@ch.abb.com CC: Priyanka Jain priyanka.jain@nxp.com --- board/keymile/common/qrio.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/board/keymile/common/qrio.c b/board/keymile/common/qrio.c index 0641ffa8b2..0cb33663aa 100644 --- a/board/keymile/common/qrio.c +++ b/board/keymile/common/qrio.c @@ -199,10 +199,9 @@ void qrio_cpuwd_flag(bool flag) #define REASON0_KBRST 0x02 #define REASON0_POWUP 0x01 #define UNIT_RESET\ - ((REASON1_CPUWD << 8) |\ - REASON0_POWUP | REASON0_COPRST | REASON0_KBRST |\ - REASON0_BPRST | REASON0_SWURST | REASON0_WDRST) -#define CORE_RESET REASON0_SWCRST + (REASON0_POWUP | REASON0_COPRST | REASON0_KBRST |\ + REASON0_BPRST | REASON0_SWURST | REASON0_WDRST) +#define CORE_RESET ((REASON1_CPUWD << 8) | REASON0_SWCRST)

bool qrio_reason_unitrst(void) {