From: Eugen Hristev eugen.hristev@microchip.com

Some periphs on the board need to be reset by holding their reset GPIO down for a specific time period. On a warm reset, the periphs are not being reset by any reset pin and may be in a wrong state. Reset them in the SPL to make sure we are booting into the correct state machine of the specific board periphs (KSZ eth switch, USB hub, HSIC eth, Ethercat)

Signed-off-by: Eugen Hristev eugen.hristev@microchip.com --- board/atmel/sama5d2_icp/sama5d2_icp.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)

diff --git a/board/atmel/sama5d2_icp/sama5d2_icp.c b/board/atmel/sama5d2_icp/sama5d2_icp.c index 807cfcd..1c28aab 100644 --- a/board/atmel/sama5d2_icp/sama5d2_icp.c +++ b/board/atmel/sama5d2_icp/sama5d2_icp.c @@ -73,6 +73,23 @@ int misc_init_r(void) /* SPL */ #ifdef CONFIG_SPL_BUILD

+/* deassert reset lines for external periph in case of warm reboot */ +static void board_reset_additional_periph(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 16, 0); /* LAN9252_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTC, 2, 0); /* HSIC_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTC, 17, 0); /* USB2534_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTD, 4, 0); /* KSZ8563_RST */ +} + +static void board_start_additional_periph(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 16, 1); /* LAN9252_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTC, 2, 1); /* HSIC_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTC, 17, 1); /* USB2534_RST */ + atmel_pio4_set_pio_output(AT91_PIO_PORTD, 4, 1); /* KSZ8563_RST */ +} + #ifdef CONFIG_SD_BOOT void spl_mmc_init(void) { @@ -93,12 +110,18 @@ void spl_board_init(void) #ifdef CONFIG_SD_BOOT spl_mmc_init(); #endif + board_reset_additional_periph(); }

void spl_display_print(void) { }

+void spl_board_prepare_for_boot(void) +{ + board_start_additional_periph(); +} + static void ddrc_conf(struct atmel_mpddrc_config *ddrc) { ddrc->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_DDR3_SDRAM);