[U-Boot] [PATCH v1]ppc/P1_P2_RDB: Data width for eSDHC using I2C device on P1 & P2 RDB Platforms

On P1 and P2 RDB Platforms read the I2C EEPROM to get various board switch settings like NOR Flash Bank selection, SD Data width etc.
Depending on, switch SW5[6] - select width for eSDHC ON - 4-bit [Enable eSPI] OFF - 8-bit [Disable eSPI]
Signed-off-by: Dipen Dudhat dipen.dudhat@freescale.com --- - applies to http://git.denx.de/u-boot.git board/freescale/p1_p2_rdb/p1_p2_rdb.c | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c index 4c03468..e3ab73c 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -130,9 +130,30 @@ int checkboard (void)
int board_early_init_r(void) { + u8 i2c_data; + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; const u8 flash_esel = 2;
+ i2c_set_bus_num(1); + if (i2c_read(0x18, 0, 1, &i2c_data, sizeof(i2c_data)) == 0) { + if (i2c_data & 0x2) + printf("NOR Flash Bank : Secondary\n"); + else + printf("NOR Flash Bank : Primary\n"); + + if (i2c_data & 0x1) { + setbits_be32(&gur->pmuxcr,MPC85xx_PMUXCR_SD_DATA); + printf("SD/MMC : 8-bit Mode\n"); + printf("eSPI : Disabled\n"); + } else { + printf("SD/MMC : 4-bit Mode\n"); + printf("eSPI : Enabled\n"); + } + } + else + printf("Failed reading I2C Chip 0x18 on bus 1\n"); + /* * Remap Boot flash region to caching-inhibited * so that flash can be erased properly.

On Oct 14, 2009, at 7:10 AM, Dipen Dudhat wrote:
On P1 and P2 RDB Platforms read the I2C EEPROM to get various board switch settings like NOR Flash Bank selection, SD Data width etc.
Depending on, switch SW5[6] - select width for eSDHC ON - 4-bit [Enable eSPI] OFF - 8-bit [Disable eSPI]
Signed-off-by: Dipen Dudhat dipen.dudhat@freescale.com
- applies to http://git.denx.de/u-boot.git
board/freescale/p1_p2_rdb/p1_p2_rdb.c | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/ p1_p2_rdb/p1_p2_rdb.c index 4c03468..e3ab73c 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -130,9 +130,30 @@ int checkboard (void)
int board_early_init_r(void) {
u8 i2c_data;
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; const u8 flash_esel = 2;
i2c_set_bus_num(1);
not sure how we do this but seems like it would be good to save the old bus_num and restore it when done.
- if (i2c_read(0x18, 0, 1, &i2c_data, sizeof(i2c_data)) == 0) {
how about a #define or something for the magic 0x18
if (i2c_data & 0x2)
printf("NOR Flash Bank : Secondary\n");
else
printf("NOR Flash Bank : Primary\n");
printf w/o any args should really be puts()
if (i2c_data & 0x1) {
setbits_be32(&gur->pmuxcr,MPC85xx_PMUXCR_SD_DATA);
add a space between after the ,
printf("SD/MMC : 8-bit Mode\n");
printf("eSPI : Disabled\n");
} else {
printf("SD/MMC : 4-bit Mode\n");
printf("eSPI : Enabled\n");
}
- }
- else
printf("Failed reading I2C Chip 0x18 on bus 1\n");
same comment as above about puts
/* * Remap Boot flash region to caching-inhibited * so that flash can be erased properly. -- 1.5.6.3
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participants (2)
-
Dipen Dudhat
-
Kumar Gala