[PATCH 1/3] pci: Update the highest subordinate bus number for bridge setup

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Tim Harvey

16 Apr 2021 16 Apr '21

11:53 p.m.

From: Masami Hiramatsu masami.hiramatsu@linaro.org

Update the highest subordinate bus number after probing the devices under the bus for setting up the bridge correctly. The commit 42f3663a3f67 ("pci: Update to use new sequence numbers") removed this but it is required if a PCIe bridge is under the bus.

Fixes: 42f3663a3f67 ("pci: Update to use new sequence numbers") Signed-off-by: Masami Hiramatsu masami.hiramatsu@linaro.org --- drivers/pci/pci-uclass.c | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index dfd54b339f..f463ef3550 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -646,6 +646,9 @@ int dm_pci_hose_probe_bus(struct udevice *bus) return log_msg_ret("probe", ret); }

+ if (!ea_pos) + sub_bus = pci_get_bus_max(); + dm_pciauto_postscan_setup_bridge(bus, sub_bus);

return sub_bus;

-- 2.17.1

Show replies by date

Tim Harvey

16 Apr 16 Apr

11:53 p.m.

New subject: [PATCH 2/3] pci: pci-uclass: Add board_pci_fixup_dev for DM_PCI

Add a board_pci_fixup_dev weak function to allow PCI device fixups during enumeration.

Signed-off-by: Tim Harvey tharvey@gateworks.com --- drivers/pci/pci-uclass.c | 6 ++++++ include/pci.h | 8 ++++++++ 2 files changed, 14 insertions(+)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index f463ef3550..22a033e632 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -790,6 +790,10 @@ error: return ret; }

+__weak extern void board_pci_fixup_dev(struct udevice *bus, struct udevice *dev) +{ +} + int pci_bind_bus_devices(struct udevice *bus) { ulong vendor, device; @@ -895,6 +899,8 @@ int pci_bind_bus_devices(struct udevice *bus) } } } + + board_pci_fixup_dev(bus, dev); }

return 0; diff --git a/include/pci.h b/include/pci.h index 5f36537b72..2353cebb2a 100644 --- a/include/pci.h +++ b/include/pci.h @@ -1690,6 +1690,14 @@ int sandbox_pci_get_emul(const struct udevice *bus, pci_dev_t find_devfn, */ int sandbox_pci_get_client(struct udevice *emul, struct udevice **devp);

+/** + * board_pci_fixup_dev() - Board callback for PCI device fixups + * + * @bus: PCI bus + * @dev: PCI device + */ +extern void board_pci_fixup_dev(struct udevice *bus, struct udevice *dev); + #endif /* CONFIG_DM_PCI */

/**

-- 2.17.1

stefano.babic＠babic.homelinux.org

2 May 2 May

1:42 p.m.

New subject: [PATCH 2/3] pci: pci-uclass: Add board_pci_fixup_dev for DM_PCI

...

Add a board_pci_fixup_dev weak function to allow PCI device fixups during enumeration. Signed-off-by: Tim Harvey tharvey@gateworks.com

Applied to u-boot-imx, master, thanks !

Best regards, Stefano Babic

-- ===================================================================== DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de =====================================================================

Tim Harvey

16 Apr 16 Apr

11:53 p.m.

New subject: [PATCH 3/3] imx: ventana: enable dm support for PCI and FEC ethernet

Enable driver model support for FEC ethernet which allows us to remove the iomux and board_eth_init function. Replace the toggling of the ethernet phy reset with dt configuration.

Enable driver model support for PCI which allows us to remove the eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for PCI devices on init such as the e1000 that is present on the GW552x.

Convert board_pci_fixup to use dm callback and remove pcidisable env variable which is not supported for DM_PCI and thus leave PCI always enabled during init.

Signed-off-by: Tim Harvey tharvey@gateworks.com --- arch/arm/dts/imx6qdl-gw51xx.dtsi | 2 + arch/arm/dts/imx6qdl-gw52xx.dtsi | 2 + arch/arm/dts/imx6qdl-gw53xx.dtsi | 3 + arch/arm/dts/imx6qdl-gw54xx.dtsi | 3 + arch/arm/dts/imx6qdl-gw560x.dtsi | 2 + arch/arm/dts/imx6qdl-gw5903.dtsi | 3 + arch/arm/dts/imx6qdl-gw5904.dtsi | 3 + arch/arm/dts/imx6qdl-gw5907.dtsi | 2 + arch/arm/dts/imx6qdl-gw5910.dtsi | 3 + arch/arm/dts/imx6qdl-gw5912.dtsi | 4 + arch/arm/dts/imx6qdl-gw5913.dtsi | 3 + board/gateworks/gw_ventana/common.h | 1 - board/gateworks/gw_ventana/gw_ventana.c | 99 ++++--------------------- configs/gwventana_emmc_defconfig | 5 ++ configs/gwventana_gw5904_defconfig | 5 ++ configs/gwventana_nand_defconfig | 5 ++ include/configs/gw_ventana.h | 10 --- 17 files changed, 61 insertions(+), 94 deletions(-)

diff --git a/arch/arm/dts/imx6qdl-gw51xx.dtsi b/arch/arm/dts/imx6qdl-gw51xx.dtsi index 2a21c6731e..7e28463084 100644 --- a/arch/arm/dts/imx6qdl-gw51xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw51xx.dtsi @@ -129,6 +129,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw52xx.dtsi b/arch/arm/dts/imx6qdl-gw52xx.dtsi index 6eedf8d40d..f1d9ba1fac 100644 --- a/arch/arm/dts/imx6qdl-gw52xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw52xx.dtsi @@ -195,6 +195,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw53xx.dtsi b/arch/arm/dts/imx6qdl-gw53xx.dtsi index 9deec7e352..172a45ba17 100644 --- a/arch/arm/dts/imx6qdl-gw53xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw53xx.dtsi @@ -188,6 +188,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; };

@@ -597,6 +599,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; };

diff --git a/arch/arm/dts/imx6qdl-gw54xx.dtsi b/arch/arm/dts/imx6qdl-gw54xx.dtsi index a30ba4848e..e09fad6068 100644 --- a/arch/arm/dts/imx6qdl-gw54xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw54xx.dtsi @@ -225,6 +225,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; };

@@ -675,6 +677,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; };

diff --git a/arch/arm/dts/imx6qdl-gw560x.dtsi b/arch/arm/dts/imx6qdl-gw560x.dtsi index 0786b0d546..bfe65fd3c0 100644 --- a/arch/arm/dts/imx6qdl-gw560x.dtsi +++ b/arch/arm/dts/imx6qdl-gw560x.dtsi @@ -279,6 +279,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw5903.dtsi b/arch/arm/dts/imx6qdl-gw5903.dtsi index 78f9ec90b7..6ebf6aef2f 100644 --- a/arch/arm/dts/imx6qdl-gw5903.dtsi +++ b/arch/arm/dts/imx6qdl-gw5903.dtsi @@ -223,6 +223,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw5904.dtsi b/arch/arm/dts/imx6qdl-gw5904.dtsi index 5b7bd56932..9adbd728dc 100644 --- a/arch/arm/dts/imx6qdl-gw5904.dtsi +++ b/arch/arm/dts/imx6qdl-gw5904.dtsi @@ -200,6 +200,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay";

fixed-link { diff --git a/arch/arm/dts/imx6qdl-gw5907.dtsi b/arch/arm/dts/imx6qdl-gw5907.dtsi index c8b29246b7..58f73a141e 100644 --- a/arch/arm/dts/imx6qdl-gw5907.dtsi +++ b/arch/arm/dts/imx6qdl-gw5907.dtsi @@ -131,6 +131,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw5910.dtsi b/arch/arm/dts/imx6qdl-gw5910.dtsi index 248e077a56..446c1043a7 100644 --- a/arch/arm/dts/imx6qdl-gw5910.dtsi +++ b/arch/arm/dts/imx6qdl-gw5910.dtsi @@ -146,6 +146,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw5912.dtsi b/arch/arm/dts/imx6qdl-gw5912.dtsi index 7593872c07..88234a6f13 100644 --- a/arch/arm/dts/imx6qdl-gw5912.dtsi +++ b/arch/arm/dts/imx6qdl-gw5912.dtsi @@ -141,6 +141,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; };

@@ -426,6 +429,7 @@ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; };

diff --git a/arch/arm/dts/imx6qdl-gw5913.dtsi b/arch/arm/dts/imx6qdl-gw5913.dtsi index 9fae4cccd7..f4c2b2189f 100644 --- a/arch/arm/dts/imx6qdl-gw5913.dtsi +++ b/arch/arm/dts/imx6qdl-gw5913.dtsi @@ -121,6 +121,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index d73850c5b9..813f7d9f56 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -11,7 +11,6 @@ #include "ventana_eeprom.h"

/* GPIO's common to all baseboards */ -#define GP_PHY_RST IMX_GPIO_NR(1, 30) #define GP_RS232_EN IMX_GPIO_NR(2, 11) #define GP_MSATA_SEL IMX_GPIO_NR(2, 8)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 5237f2dac4..1ed9c1a39f 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -31,7 +31,6 @@ #include <linux/ctype.h> #include <miiphy.h> #include <mtd_node.h> -#include <netdev.h> #include <pci.h> #include <linux/delay.h> #include <linux/libfdt.h> @@ -54,42 +53,6 @@ DECLARE_GLOBAL_DATA_PTR; struct ventana_board_info ventana_info; static int board_type;

-/* ENET */ -static iomux_v3_cfg_t const enet_pads[] = { - IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | - MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | - MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | - MUX_PAD_CTRL(ENET_PAD_CTRL)), - /* PHY nRST */ - IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | DIO_PAD_CFG), -}; - -static void setup_iomux_enet(int gpio) -{ - SETUP_IOMUX_PADS(enet_pads); - - /* toggle PHY_RST# */ - gpio_request(gpio, "phy_rst#"); - gpio_direction_output(gpio, 0); - mdelay(10); - gpio_set_value(gpio, 1); - mdelay(100); -} - #ifdef CONFIG_USB_EHCI_MX6 /* toggle USB_HUB_RST# for boards that have it; it is not defined in dt */ int board_ehci_hcd_init(int port) @@ -195,40 +158,7 @@ int mv88e61xx_hw_reset(struct phy_device *phydev) } #endif // CONFIG_MV88E61XX_SWITCH

-int board_eth_init(struct bd_info *bis) -{ -#ifdef CONFIG_FEC_MXC - struct ventana_board_info *info = &ventana_info; - - if (test_bit(EECONFIG_ETH0, info->config)) { - setup_iomux_enet(GP_PHY_RST); - cpu_eth_init(bis); - } -#endif - -#ifdef CONFIG_E1000 - e1000_initialize(bis); -#endif - -#ifdef CONFIG_CI_UDC - /* For otg ethernet*/ - usb_eth_initialize(bis); -#endif - - /* default to the first detected enet dev */ - if (!env_get("ethprime")) { - struct eth_device *dev = eth_get_dev_by_index(0); - if (dev) { - env_set("ethprime", dev->name); - printf("set ethprime to %s\n", env_get("ethprime")); - } - } - - return 0; -} - #if defined(CONFIG_VIDEO_IPUV3) - static void enable_hdmi(struct display_info_t const *dev) { imx_enable_hdmi_phy(); @@ -427,7 +357,6 @@ int power_init_board(void) return 0; }

-#if defined(CONFIG_CMD_PCI) int imx6_pcie_toggle_reset(void) { if (board_type < GW_UNKNOWN) { @@ -448,6 +377,7 @@ int imx6_pcie_toggle_reset(void) #define MAX_PCI_DEVS 32 struct pci_dev { pci_dev_t devfn; + struct udevice *dev; unsigned short vendor; unsigned short device; unsigned short class; @@ -458,18 +388,21 @@ struct pci_dev pci_devs[MAX_PCI_DEVS]; int pci_devno; int pci_bridgeno;

-void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, - unsigned short vendor, unsigned short device, - unsigned short class) +void board_pci_fixup_dev(struct udevice *bus, struct udevice *udev) { - int i; - u32 dw; + struct pci_child_plat *pdata = dev_get_parent_plat(udev); struct pci_dev *pdev = &pci_devs[pci_devno++]; + unsigned short vendor = pdata->vendor; + unsigned short device = pdata->device; + unsigned int class = pdata->class; + pci_dev_t dev = dm_pci_get_bdf(udev); + int i;

debug("%s: %02d:%02d.%02d: %04x:%04x\n", __func__, PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), vendor, device);

/* store array of devs for later use in device-tree fixup */ + pdev->dev = udev; pdev->devfn = dev; pdev->vendor = vendor; pdev->device = device; @@ -496,19 +429,19 @@ void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, if (vendor == PCI_VENDOR_ID_PLX && (device & 0xfff0) == 0x8600 && PCI_DEV(dev) == 0 && PCI_FUNC(dev) == 0) { + ulong val; debug("configuring PLX 860X downstream PERST#\n"); - pci_hose_read_config_dword(hose, dev, 0x62c, &dw); - dw |= 0xaaa8; /* GPIO1-7 outputs */ - pci_hose_write_config_dword(hose, dev, 0x62c, dw); + pci_bus_read_config(bus, dev, 0x62c, &val, PCI_SIZE_32); + val |= 0xaaa8; /* GPIO1-7 outputs */ + pci_bus_write_config(bus, dev, 0x62c, val, PCI_SIZE_32);

- pci_hose_read_config_dword(hose, dev, 0x644, &dw); - dw |= 0xfe; /* GPIO1-7 output high */ - pci_hose_write_config_dword(hose, dev, 0x644, dw); + pci_bus_read_config(bus, dev, 0x644, &val, PCI_SIZE_32); + val |= 0xfe; /* GPIO1-7 output high */ + pci_bus_write_config(bus, dev, 0x644, val, PCI_SIZE_32);

mdelay(100); } } -#endif /* CONFIG_CMD_PCI */

#ifdef CONFIG_SERIAL_TAG /* diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index fcdb12ad30..d8c63fa14f 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_ALLOC_BD=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y @@ -87,9 +88,13 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index c6c5114be3..b7e123bdb3 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_ALLOC_BD=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y @@ -91,9 +92,13 @@ CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=5 CONFIG_MV88E61XX_PHY_PORTS=0xf CONFIG_MV88E61XX_FIXED_PORTS=0x0 +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 14830c19af..f66ab1d53d 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_ALLOC_BD=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y @@ -93,9 +94,13 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_MXS=y CONFIG_NAND_MXS_DT=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 5754b6aef0..4f2f323b77 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -65,8 +65,6 @@ * PCI express */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCI_FIXUP_DEV #define CONFIG_PCIE_IMX #endif

@@ -82,13 +80,6 @@

/* Various command support */

-/* Ethernet support */ -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_ARP_TIMEOUT 200UL - /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) @@ -129,7 +120,6 @@ #define CONFIG_SERVERIP 192.168.1.146

#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ - "pcidisable=1\0" \ "splashpos=m,m\0" \ "usb_pgood_delay=2000\0" \ "console=ttymxc1\0" \

-- 2.17.1

Stefano Babic

2 May 2 May

1:38 p.m.

New subject: [PATCH 3/3] imx: ventana: enable dm support for PCI and FEC ethernet

Hi Tim,

I applied the first two patches of series, but this one has several conflicts in the configs file. Could you check and rebase it ? Thanks !

Best regards, Stefano

On 16.04.21 23:53, Tim Harvey wrote:

...

Enable driver model support for FEC ethernet which allows us to remove the iomux and board_eth_init function. Replace the toggling of the ethernet phy reset with dt configuration.

Enable driver model support for PCI which allows us to remove the eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for PCI devices on init such as the e1000 that is present on the GW552x.

Convert board_pci_fixup to use dm callback and remove pcidisable env variable which is not supported for DM_PCI and thus leave PCI always enabled during init.

Signed-off-by: Tim Harvey tharvey@gateworks.com

arch/arm/dts/imx6qdl-gw51xx.dtsi | 2 + arch/arm/dts/imx6qdl-gw52xx.dtsi | 2 + arch/arm/dts/imx6qdl-gw53xx.dtsi | 3 + arch/arm/dts/imx6qdl-gw54xx.dtsi | 3 + arch/arm/dts/imx6qdl-gw560x.dtsi | 2 + arch/arm/dts/imx6qdl-gw5903.dtsi | 3 + arch/arm/dts/imx6qdl-gw5904.dtsi | 3 + arch/arm/dts/imx6qdl-gw5907.dtsi | 2 + arch/arm/dts/imx6qdl-gw5910.dtsi | 3 + arch/arm/dts/imx6qdl-gw5912.dtsi | 4 + arch/arm/dts/imx6qdl-gw5913.dtsi | 3 + board/gateworks/gw_ventana/common.h | 1 - board/gateworks/gw_ventana/gw_ventana.c | 99 ++++--------------------- configs/gwventana_emmc_defconfig | 5 ++ configs/gwventana_gw5904_defconfig | 5 ++ configs/gwventana_nand_defconfig | 5 ++ include/configs/gw_ventana.h | 10 --- 17 files changed, 61 insertions(+), 94 deletions(-)

diff --git a/arch/arm/dts/imx6qdl-gw51xx.dtsi b/arch/arm/dts/imx6qdl-gw51xx.dtsi index 2a21c6731e..7e28463084 100644 --- a/arch/arm/dts/imx6qdl-gw51xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw51xx.dtsi @@ -129,6 +129,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;

phy-reset-duration = <10>;

phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw52xx.dtsi b/arch/arm/dts/imx6qdl-gw52xx.dtsi index 6eedf8d40d..f1d9ba1fac 100644 --- a/arch/arm/dts/imx6qdl-gw52xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw52xx.dtsi @@ -195,6 +195,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;

phy-reset-duration = <10>;

phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw53xx.dtsi b/arch/arm/dts/imx6qdl-gw53xx.dtsi index 9deec7e352..172a45ba17 100644 --- a/arch/arm/dts/imx6qdl-gw53xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw53xx.dtsi @@ -188,6 +188,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;

phy-reset-duration = <10>;

phy-reset-post-delay = <100>; status = "okay"; };

@@ -597,6 +599,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
	MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x1b0b0
...
;
};
diff --git a/arch/arm/dts/imx6qdl-gw54xx.dtsi b/arch/arm/dts/imx6qdl-gw54xx.dtsi index a30ba4848e..e09fad6068 100644 --- a/arch/arm/dts/imx6qdl-gw54xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw54xx.dtsi @@ -225,6 +225,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;

phy-reset-duration = <10>;

phy-reset-post-delay = <100>; status = "okay"; };

@@ -675,6 +677,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
	MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x1b0b0
...
;
};
diff --git a/arch/arm/dts/imx6qdl-gw560x.dtsi b/arch/arm/dts/imx6qdl-gw560x.dtsi index 0786b0d546..bfe65fd3c0 100644 --- a/arch/arm/dts/imx6qdl-gw560x.dtsi +++ b/arch/arm/dts/imx6qdl-gw560x.dtsi @@ -279,6 +279,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;

phy-reset-duration = <10>;

phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw5903.dtsi b/arch/arm/dts/imx6qdl-gw5903.dtsi index 78f9ec90b7..6ebf6aef2f 100644 --- a/arch/arm/dts/imx6qdl-gw5903.dtsi +++ b/arch/arm/dts/imx6qdl-gw5903.dtsi @@ -223,6 +223,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id";

phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;

phy-reset-duration = <10>;

phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw5904.dtsi b/arch/arm/dts/imx6qdl-gw5904.dtsi index 5b7bd56932..9adbd728dc 100644 --- a/arch/arm/dts/imx6qdl-gw5904.dtsi +++ b/arch/arm/dts/imx6qdl-gw5904.dtsi @@ -200,6 +200,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id";

phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;

phy-reset-duration = <10>;

phy-reset-post-delay = <100>; status = "okay";

fixed-link {

diff --git a/arch/arm/dts/imx6qdl-gw5907.dtsi b/arch/arm/dts/imx6qdl-gw5907.dtsi index c8b29246b7..58f73a141e 100644 --- a/arch/arm/dts/imx6qdl-gw5907.dtsi +++ b/arch/arm/dts/imx6qdl-gw5907.dtsi @@ -131,6 +131,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;

phy-reset-duration = <10>;

phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw5910.dtsi b/arch/arm/dts/imx6qdl-gw5910.dtsi index 248e077a56..446c1043a7 100644 --- a/arch/arm/dts/imx6qdl-gw5910.dtsi +++ b/arch/arm/dts/imx6qdl-gw5910.dtsi @@ -146,6 +146,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id";

phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;

phy-reset-duration = <10>;

phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/arch/arm/dts/imx6qdl-gw5912.dtsi b/arch/arm/dts/imx6qdl-gw5912.dtsi index 7593872c07..88234a6f13 100644 --- a/arch/arm/dts/imx6qdl-gw5912.dtsi +++ b/arch/arm/dts/imx6qdl-gw5912.dtsi @@ -141,6 +141,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id";

phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;

phy-reset-duration = <10>;

phy-reset-post-delay = <100>; status = "okay"; };

@@ -426,6 +429,7 @@ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
	MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	0x1b0b0
...
;
};
diff --git a/arch/arm/dts/imx6qdl-gw5913.dtsi b/arch/arm/dts/imx6qdl-gw5913.dtsi index 9fae4cccd7..f4c2b2189f 100644 --- a/arch/arm/dts/imx6qdl-gw5913.dtsi +++ b/arch/arm/dts/imx6qdl-gw5913.dtsi @@ -121,6 +121,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id";

phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;

phy-reset-duration = <10>;

phy-reset-post-delay = <100>; status = "okay"; };

diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index d73850c5b9..813f7d9f56 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -11,7 +11,6 @@ #include "ventana_eeprom.h"

/* GPIO's common to all baseboards */ -#define GP_PHY_RST IMX_GPIO_NR(1, 30) #define GP_RS232_EN IMX_GPIO_NR(2, 11) #define GP_MSATA_SEL IMX_GPIO_NR(2, 8)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 5237f2dac4..1ed9c1a39f 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -31,7 +31,6 @@ #include <linux/ctype.h> #include <miiphy.h> #include <mtd_node.h> -#include <netdev.h> #include <pci.h> #include <linux/delay.h> #include <linux/libfdt.h> @@ -54,42 +53,6 @@ DECLARE_GLOBAL_DATA_PTR; struct ventana_board_info ventana_info; static int board_type;

-/* ENET */ -static iomux_v3_cfg_t const enet_pads[] = {
IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL |
   MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK |
   MUX_PAD_CTRL(ENET_PAD_CTRL)),
IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)),

IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL |
   MUX_PAD_CTRL(ENET_PAD_CTRL)),
/* PHY nRST */

IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | DIO_PAD_CFG),
-};

-static void setup_iomux_enet(int gpio) -{

SETUP_IOMUX_PADS(enet_pads);

/* toggle PHY_RST# */

gpio_request(gpio, "phy_rst#");

gpio_direction_output(gpio, 0);

mdelay(10);

gpio_set_value(gpio, 1);

mdelay(100);

-}

#ifdef CONFIG_USB_EHCI_MX6 /* toggle USB_HUB_RST# for boards that have it; it is not defined in dt */ int board_ehci_hcd_init(int port)

@@ -195,40 +158,7 @@ int mv88e61xx_hw_reset(struct phy_device *phydev) } #endif // CONFIG_MV88E61XX_SWITCH

-int board_eth_init(struct bd_info *bis) -{ -#ifdef CONFIG_FEC_MXC
struct ventana_board_info *info = &ventana_info;

if (test_bit(EECONFIG_ETH0, info->config)) {
setup_iomux_enet(GP_PHY_RST);
cpu_eth_init(bis);
}
-#endif

-#ifdef CONFIG_E1000

e1000_initialize(bis);

-#endif

-#ifdef CONFIG_CI_UDC

/* For otg ethernet*/

usb_eth_initialize(bis);

-#endif
/* default to the first detected enet dev */

if (!env_get("ethprime")) {
struct eth_device *dev = eth_get_dev_by_index(0);
if (dev) {
	env_set("ethprime", dev->name);
	printf("set ethprime to %s\n", env_get("ethprime"));
}
}

return 0;
-}

#if defined(CONFIG_VIDEO_IPUV3)

static void enable_hdmi(struct display_info_t const *dev) { imx_enable_hdmi_phy();

@@ -427,7 +357,6 @@ int power_init_board(void) return 0; }

-#if defined(CONFIG_CMD_PCI) int imx6_pcie_toggle_reset(void) { if (board_type < GW_UNKNOWN) { @@ -448,6 +377,7 @@ int imx6_pcie_toggle_reset(void) #define MAX_PCI_DEVS 32 struct pci_dev { pci_dev_t devfn;

struct udevice *dev; unsigned short vendor; unsigned short device; unsigned short class;

@@ -458,18 +388,21 @@ struct pci_dev pci_devs[MAX_PCI_DEVS]; int pci_devno; int pci_bridgeno;

-void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev,
	 unsigned short vendor, unsigned short device,
	 unsigned short class)
+void board_pci_fixup_dev(struct udevice *bus, struct udevice *udev) {

int i;

u32 dw;

struct pci_child_plat *pdata = dev_get_parent_plat(udev); struct pci_dev *pdev = &pci_devs[pci_devno++];

unsigned short vendor = pdata->vendor;

unsigned short device = pdata->device;

unsigned int class = pdata->class;

pci_dev_t dev = dm_pci_get_bdf(udev);

int i;

debug("%s: %02d:%02d.%02d: %04x:%04x\n", __func__, PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), vendor, device);

/* store array of devs for later use in device-tree fixup */

pdev->dev = udev; pdev->devfn = dev; pdev->vendor = vendor; pdev->device = device;

@@ -496,19 +429,19 @@ void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, if (vendor == PCI_VENDOR_ID_PLX && (device & 0xfff0) == 0x8600 && PCI_DEV(dev) == 0 && PCI_FUNC(dev) == 0) {
ulong val;
debug("configuring PLX 860X downstream PERST#\n");
pci_hose_read_config_dword(hose, dev, 0x62c, &dw);
dw |= 0xaaa8; /* GPIO1-7 outputs */
pci_hose_write_config_dword(hose, dev, 0x62c, dw);
pci_bus_read_config(bus, dev, 0x62c, &val, PCI_SIZE_32);
val |= 0xaaa8; /* GPIO1-7 outputs */
pci_bus_write_config(bus, dev, 0x62c, val, PCI_SIZE_32);
pci_hose_read_config_dword(hose, dev, 0x644, &dw);
dw |= 0xfe;   /* GPIO1-7 output high */
pci_hose_write_config_dword(hose, dev, 0x644, dw);
pci_bus_read_config(bus, dev, 0x644, &val, PCI_SIZE_32);
val |= 0xfe;   /* GPIO1-7 output high */
pci_bus_write_config(bus, dev, 0x644, val, PCI_SIZE_32);
mdelay(100); } }
-#endif /* CONFIG_CMD_PCI */

#ifdef CONFIG_SERIAL_TAG /* diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index fcdb12ad30..d8c63fa14f 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_ALLOC_BD=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y @@ -87,9 +88,13 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index c6c5114be3..b7e123bdb3 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_ALLOC_BD=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y @@ -91,9 +92,13 @@ CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=5 CONFIG_MV88E61XX_PHY_PORTS=0xf CONFIG_MV88E61XX_FIXED_PORTS=0x0 +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 14830c19af..f66ab1d53d 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_ALLOC_BD=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y @@ -93,9 +94,13 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_MXS=y CONFIG_NAND_MXS_DT=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 5754b6aef0..4f2f323b77 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -65,8 +65,6 @@

PCI express

*/ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCI_FIXUP_DEV #define CONFIG_PCIE_IMX #endif

@@ -82,13 +80,6 @@

/* Various command support */

-/* Ethernet support */ -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_ARP_TIMEOUT 200UL

/* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)

@@ -129,7 +120,6 @@ #define CONFIG_SERVERIP 192.168.1.146

#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \

"pcidisable=1\0" \ "splashpos=m,m\0" \ "usb_pgood_delay=2000\0" \ "console=ttymxc1\0" \

Tim Harvey

3 May 3 May

8:21 p.m.

New subject: [PATCH] imx: ventana: enable dm support for PCI and FEC ethernet

Enable driver model support for FEC ethernet which allows us to remove the iomux and board_eth_init function. Replace the toggling of the ethernet phy reset with dt configuration.

Convert board_pci_fixup to use dm callback and remove pcidisable env variable which is not supported for DM_PCI and thus leave PCI always enabled during init.

Signed-off-by: Tim Harvey tharvey@gateworks.com --- v2: rebase --- arch/arm/dts/imx6qdl-gw51xx.dtsi | 2 + arch/arm/dts/imx6qdl-gw52xx.dtsi | 2 + arch/arm/dts/imx6qdl-gw53xx.dtsi | 3 + arch/arm/dts/imx6qdl-gw54xx.dtsi | 3 + arch/arm/dts/imx6qdl-gw560x.dtsi | 2 + arch/arm/dts/imx6qdl-gw5903.dtsi | 3 + arch/arm/dts/imx6qdl-gw5904.dtsi | 3 + arch/arm/dts/imx6qdl-gw5907.dtsi | 2 + arch/arm/dts/imx6qdl-gw5910.dtsi | 3 + arch/arm/dts/imx6qdl-gw5912.dtsi | 4 + arch/arm/dts/imx6qdl-gw5913.dtsi | 3 + board/gateworks/gw_ventana/common.h | 1 - board/gateworks/gw_ventana/gw_ventana.c | 99 ++++--------------------- configs/gwventana_emmc_defconfig | 5 ++ configs/gwventana_gw5904_defconfig | 5 ++ configs/gwventana_nand_defconfig | 5 ++ include/configs/gw_ventana.h | 10 --- 17 files changed, 61 insertions(+), 94 deletions(-)

@@ -597,6 +599,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; };

@@ -675,6 +677,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; };

@@ -426,6 +429,7 @@ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 >; };

/* GPIO's common to all baseboards */ -#define GP_PHY_RST IMX_GPIO_NR(1, 30) #define GP_RS232_EN IMX_GPIO_NR(2, 11) #define GP_MSATA_SEL IMX_GPIO_NR(2, 8)

debug("%s: %02d:%02d.%02d: %04x:%04x\n", __func__, PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), vendor, device);

mdelay(100); } } -#endif /* CONFIG_CMD_PCI */

#ifdef CONFIG_SERIAL_TAG /* diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index d5270c5232..c2d4ad3b5d 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -86,9 +87,13 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 091bf30c3b..3d349818cd 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -90,9 +91,13 @@ CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=5 CONFIG_MV88E61XX_PHY_PORTS=0xf CONFIG_MV88E61XX_FIXED_PORTS=0x0 +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 0ccd3e9dfd..2bb9a21585 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -92,9 +93,13 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_MXS=y CONFIG_NAND_MXS_DT=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 5754b6aef0..4f2f323b77 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -65,8 +65,6 @@ * PCI express */ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCI_FIXUP_DEV #define CONFIG_PCIE_IMX #endif

@@ -82,13 +80,6 @@

/* Various command support */

#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ - "pcidisable=1\0" \ "splashpos=m,m\0" \ "usb_pgood_delay=2000\0" \ "console=ttymxc1\0" \

-- 2.17.1

Tim Harvey

29 May 29 May

3:22 a.m.

New subject: [PATCH] imx: ventana: enable dm support for PCI and FEC ethernet

On Mon, May 3, 2021 at 11:21 AM Tim Harvey tharvey@gateworks.com wrote:

...

Enable driver model support for FEC ethernet which allows us to remove the iomux and board_eth_init function. Replace the toggling of the ethernet phy reset with dt configuration.

Enable driver model support for PCI which allows us to remove the eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for PCI devices on init such as the e1000 that is present on the GW552x.

Convert board_pci_fixup to use dm callback and remove pcidisable env variable which is not supported for DM_PCI and thus leave PCI always enabled during init.

Signed-off-by: Tim Harvey tharvey@gateworks.com

v2: rebase

arch/arm/dts/imx6qdl-gw51xx.dtsi | 2 + arch/arm/dts/imx6qdl-gw52xx.dtsi | 2 + arch/arm/dts/imx6qdl-gw53xx.dtsi | 3 + arch/arm/dts/imx6qdl-gw54xx.dtsi | 3 + arch/arm/dts/imx6qdl-gw560x.dtsi | 2 + arch/arm/dts/imx6qdl-gw5903.dtsi | 3 + arch/arm/dts/imx6qdl-gw5904.dtsi | 3 + arch/arm/dts/imx6qdl-gw5907.dtsi | 2 + arch/arm/dts/imx6qdl-gw5910.dtsi | 3 + arch/arm/dts/imx6qdl-gw5912.dtsi | 4 + arch/arm/dts/imx6qdl-gw5913.dtsi | 3 + board/gateworks/gw_ventana/common.h | 1 - board/gateworks/gw_ventana/gw_ventana.c | 99 ++++--------------------- configs/gwventana_emmc_defconfig | 5 ++ configs/gwventana_gw5904_defconfig | 5 ++ configs/gwventana_nand_defconfig | 5 ++ include/configs/gw_ventana.h | 10 --- 17 files changed, 61 insertions(+), 94 deletions(-)

diff --git a/arch/arm/dts/imx6qdl-gw51xx.dtsi b/arch/arm/dts/imx6qdl-gw51xx.dtsi index 2a21c6731e..7e28463084 100644 --- a/arch/arm/dts/imx6qdl-gw51xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw51xx.dtsi @@ -129,6 +129,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  phy-reset-duration = <10>;
  phy-reset-post-delay = <100>;
  status = "okay";
};

diff --git a/arch/arm/dts/imx6qdl-gw52xx.dtsi b/arch/arm/dts/imx6qdl-gw52xx.dtsi index 6eedf8d40d..f1d9ba1fac 100644 --- a/arch/arm/dts/imx6qdl-gw52xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw52xx.dtsi @@ -195,6 +195,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  phy-reset-duration = <10>;
  phy-reset-post-delay = <100>;
  status = "okay";
};

diff --git a/arch/arm/dts/imx6qdl-gw53xx.dtsi b/arch/arm/dts/imx6qdl-gw53xx.dtsi index 9deec7e352..172a45ba17 100644 --- a/arch/arm/dts/imx6qdl-gw53xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw53xx.dtsi @@ -188,6 +188,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  phy-reset-duration = <10>;
  phy-reset-post-delay = <100>;
  status = "okay";
};

@@ -597,6 +599,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
                  MX6QDL_PAD_ENET_TXD0__GPIO1_IO30        0x1b0b0
          >;
  };
diff --git a/arch/arm/dts/imx6qdl-gw54xx.dtsi b/arch/arm/dts/imx6qdl-gw54xx.dtsi index a30ba4848e..e09fad6068 100644 --- a/arch/arm/dts/imx6qdl-gw54xx.dtsi +++ b/arch/arm/dts/imx6qdl-gw54xx.dtsi @@ -225,6 +225,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  phy-reset-duration = <10>;
  phy-reset-post-delay = <100>;
  status = "okay";
};

@@ -675,6 +677,7 @@ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
                  MX6QDL_PAD_ENET_TXD0__GPIO1_IO30        0x1b0b0
          >;
  };
diff --git a/arch/arm/dts/imx6qdl-gw560x.dtsi b/arch/arm/dts/imx6qdl-gw560x.dtsi index 0786b0d546..bfe65fd3c0 100644 --- a/arch/arm/dts/imx6qdl-gw560x.dtsi +++ b/arch/arm/dts/imx6qdl-gw560x.dtsi @@ -279,6 +279,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  phy-reset-duration = <10>;
  phy-reset-post-delay = <100>;
  status = "okay";
};

diff --git a/arch/arm/dts/imx6qdl-gw5903.dtsi b/arch/arm/dts/imx6qdl-gw5903.dtsi index 78f9ec90b7..6ebf6aef2f 100644 --- a/arch/arm/dts/imx6qdl-gw5903.dtsi +++ b/arch/arm/dts/imx6qdl-gw5903.dtsi @@ -223,6 +223,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id";
  phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  phy-reset-duration = <10>;
  phy-reset-post-delay = <100>;
  status = "okay";
};

diff --git a/arch/arm/dts/imx6qdl-gw5904.dtsi b/arch/arm/dts/imx6qdl-gw5904.dtsi index 5b7bd56932..9adbd728dc 100644 --- a/arch/arm/dts/imx6qdl-gw5904.dtsi +++ b/arch/arm/dts/imx6qdl-gw5904.dtsi @@ -200,6 +200,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id";
  phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  phy-reset-duration = <10>;
  phy-reset-post-delay = <100>;
  status = "okay";

  fixed-link {
diff --git a/arch/arm/dts/imx6qdl-gw5907.dtsi b/arch/arm/dts/imx6qdl-gw5907.dtsi index c8b29246b7..58f73a141e 100644 --- a/arch/arm/dts/imx6qdl-gw5907.dtsi +++ b/arch/arm/dts/imx6qdl-gw5907.dtsi @@ -131,6 +131,8 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  phy-reset-duration = <10>;
  phy-reset-post-delay = <100>;
  status = "okay";
};

diff --git a/arch/arm/dts/imx6qdl-gw5910.dtsi b/arch/arm/dts/imx6qdl-gw5910.dtsi index 248e077a56..446c1043a7 100644 --- a/arch/arm/dts/imx6qdl-gw5910.dtsi +++ b/arch/arm/dts/imx6qdl-gw5910.dtsi @@ -146,6 +146,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id";
  phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  phy-reset-duration = <10>;
  phy-reset-post-delay = <100>;
  status = "okay";
};

diff --git a/arch/arm/dts/imx6qdl-gw5912.dtsi b/arch/arm/dts/imx6qdl-gw5912.dtsi index 7593872c07..88234a6f13 100644 --- a/arch/arm/dts/imx6qdl-gw5912.dtsi +++ b/arch/arm/dts/imx6qdl-gw5912.dtsi @@ -141,6 +141,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id";
  phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  phy-reset-duration = <10>;
  phy-reset-post-delay = <100>;
  status = "okay";
};

@@ -426,6 +429,7 @@ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
                  MX6QDL_PAD_ENET_TXD0__GPIO1_IO30        0x1b0b0
          >;
  };
diff --git a/arch/arm/dts/imx6qdl-gw5913.dtsi b/arch/arm/dts/imx6qdl-gw5913.dtsi index 9fae4cccd7..f4c2b2189f 100644 --- a/arch/arm/dts/imx6qdl-gw5913.dtsi +++ b/arch/arm/dts/imx6qdl-gw5913.dtsi @@ -121,6 +121,9 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id";
  phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
  phy-reset-duration = <10>;
  phy-reset-post-delay = <100>;
  status = "okay";
};

diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h index d73850c5b9..813f7d9f56 100644 --- a/board/gateworks/gw_ventana/common.h +++ b/board/gateworks/gw_ventana/common.h @@ -11,7 +11,6 @@ #include "ventana_eeprom.h"

/* GPIO's common to all baseboards */ -#define GP_PHY_RST IMX_GPIO_NR(1, 30) #define GP_RS232_EN IMX_GPIO_NR(2, 11) #define GP_MSATA_SEL IMX_GPIO_NR(2, 8)

diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index 5237f2dac4..1ed9c1a39f 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -31,7 +31,6 @@ #include <linux/ctype.h> #include <miiphy.h> #include <mtd_node.h> -#include <netdev.h> #include <pci.h> #include <linux/delay.h> #include <linux/libfdt.h> @@ -54,42 +53,6 @@ DECLARE_GLOBAL_DATA_PTR; struct ventana_board_info ventana_info; static int board_type;

-/* ENET */ -static iomux_v3_cfg_t const enet_pads[] = {
  IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_ENET_MDC__ENET_MDC    | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL |
             MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK |
             MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3  | MUX_PAD_CTRL(ENET_PAD_CTRL)),
  IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL |
             MUX_PAD_CTRL(ENET_PAD_CTRL)),
  /* PHY nRST */
  IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | DIO_PAD_CFG),
-};

-static void setup_iomux_enet(int gpio) -{
  SETUP_IOMUX_PADS(enet_pads);
  /* toggle PHY_RST# */
  gpio_request(gpio, "phy_rst#");
  gpio_direction_output(gpio, 0);
  mdelay(10);
  gpio_set_value(gpio, 1);
  mdelay(100);
-}

#ifdef CONFIG_USB_EHCI_MX6 /* toggle USB_HUB_RST# for boards that have it; it is not defined in dt */ int board_ehci_hcd_init(int port) @@ -195,40 +158,7 @@ int mv88e61xx_hw_reset(struct phy_device *phydev) } #endif // CONFIG_MV88E61XX_SWITCH

-int board_eth_init(struct bd_info *bis) -{ -#ifdef CONFIG_FEC_MXC
  struct ventana_board_info *info = &ventana_info;
  if (test_bit(EECONFIG_ETH0, info->config)) {
          setup_iomux_enet(GP_PHY_RST);
          cpu_eth_init(bis);
  }
-#endif

-#ifdef CONFIG_E1000
  e1000_initialize(bis);
-#endif

-#ifdef CONFIG_CI_UDC
  /* For otg ethernet*/
  usb_eth_initialize(bis);
-#endif
  /* default to the first detected enet dev */
  if (!env_get("ethprime")) {
          struct eth_device *dev = eth_get_dev_by_index(0);
          if (dev) {
                  env_set("ethprime", dev->name);
                  printf("set ethprime to %s\n", env_get("ethprime"));
          }
  }
  return 0;
-}

#if defined(CONFIG_VIDEO_IPUV3)

static void enable_hdmi(struct display_info_t const *dev) { imx_enable_hdmi_phy(); @@ -427,7 +357,6 @@ int power_init_board(void) return 0; }

-#if defined(CONFIG_CMD_PCI) int imx6_pcie_toggle_reset(void) { if (board_type < GW_UNKNOWN) { @@ -448,6 +377,7 @@ int imx6_pcie_toggle_reset(void) #define MAX_PCI_DEVS 32 struct pci_dev { pci_dev_t devfn;
  struct udevice *dev;
  unsigned short vendor;
  unsigned short device;
  unsigned short class;
@@ -458,18 +388,21 @@ struct pci_dev pci_devs[MAX_PCI_DEVS]; int pci_devno; int pci_bridgeno;

-void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev,
                   unsigned short vendor, unsigned short device,
                   unsigned short class)
+void board_pci_fixup_dev(struct udevice *bus, struct udevice *udev) {
  int i;
  u32 dw;
  struct pci_child_plat *pdata = dev_get_parent_plat(udev);
  struct pci_dev *pdev = &pci_devs[pci_devno++];
  unsigned short vendor = pdata->vendor;
  unsigned short device = pdata->device;
  unsigned int class = pdata->class;
  pci_dev_t dev = dm_pci_get_bdf(udev);
  int i;

  debug("%s: %02d:%02d.%02d: %04x:%04x\n", __func__,
        PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), vendor, device);

  /* store array of devs for later use in device-tree fixup */
  pdev->dev = udev;
  pdev->devfn = dev;
  pdev->vendor = vendor;
  pdev->device = device;
@@ -496,19 +429,19 @@ void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, if (vendor == PCI_VENDOR_ID_PLX && (device & 0xfff0) == 0x8600 && PCI_DEV(dev) == 0 && PCI_FUNC(dev) == 0) {
          ulong val;
          debug("configuring PLX 860X downstream PERST#\n");
          pci_hose_read_config_dword(hose, dev, 0x62c, &dw);
          dw |= 0xaaa8; /* GPIO1-7 outputs */
          pci_hose_write_config_dword(hose, dev, 0x62c, dw);
          pci_bus_read_config(bus, dev, 0x62c, &val, PCI_SIZE_32);
          val |= 0xaaa8; /* GPIO1-7 outputs */
          pci_bus_write_config(bus, dev, 0x62c, val, PCI_SIZE_32);
          pci_hose_read_config_dword(hose, dev, 0x644, &dw);
          dw |= 0xfe;   /* GPIO1-7 output high */
          pci_hose_write_config_dword(hose, dev, 0x644, dw);
          pci_bus_read_config(bus, dev, 0x644, &val, PCI_SIZE_32);
          val |= 0xfe;   /* GPIO1-7 output high */
          pci_bus_write_config(bus, dev, 0x644, val, PCI_SIZE_32);

          mdelay(100);
  }
} -#endif /* CONFIG_CMD_PCI */

#ifdef CONFIG_SERIAL_TAG /* diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index d5270c5232..c2d4ad3b5d 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -86,9 +87,13 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 091bf30c3b..3d349818cd 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -90,9 +91,13 @@ CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=5 CONFIG_MV88E61XX_PHY_PORTS=0xf CONFIG_MV88E61XX_FIXED_PORTS=0x0 +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index 0ccd3e9dfd..2bb9a21585 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_PREBOOT=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_MISC_INIT_R=y +CONFIG_PCI_INIT_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FIT_IMAGE_TINY=y @@ -92,9 +93,13 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_MXS=y CONFIG_NAND_MXS_DT=y CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y CONFIG_E1000=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y +CONFIG_DM_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 5754b6aef0..4f2f323b77 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -65,8 +65,6 @@

PCI express

*/ #ifdef CONFIG_CMD_PCI -#define CONFIG_PCI_SCAN_SHOW -#define CONFIG_PCI_FIXUP_DEV #define CONFIG_PCIE_IMX #endif

@@ -82,13 +80,6 @@

/* Various command support */

-/* Ethernet support */ -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_ARP_TIMEOUT 200UL

/* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) @@ -129,7 +120,6 @@ #define CONFIG_SERVERIP 192.168.1.146

#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
  "pcidisable=1\0" \
  "splashpos=m,m\0" \
  "usb_pgood_delay=2000\0" \
  "console=ttymxc1\0" \
-- 2.17.1

Stefano,

Is everything good with this? I don't see that you've picked it up yet. I'm anxious to get off the naughty list regarding moving to DM :)

Thanks,

Tim

sbabic＠denx.de

9 Jun 9 Jun

3:44 p.m.

New subject: [PATCH] imx: ventana: enable dm support for PCI and FEC ethernet

...

Enable driver model support for FEC ethernet which allows us to remove the iomux and board_eth_init function. Replace the toggling of the ethernet phy reset with dt configuration. Enable driver model support for PCI which allows us to remove the eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for PCI devices on init such as the e1000 that is present on the GW552x. Convert board_pci_fixup to use dm callback and remove pcidisable env variable which is not supported for DM_PCI and thus leave PCI always enabled during init. Signed-off-by: Tim Harvey tharvey@gateworks.com

Applied to u-boot-imx, master, thanks !

Best regards, Stefano Babic

Masami Hiramatsu

17 Apr 17 Apr

12:30 a.m.

Hi Tim,

Thanks for picking it up. I'll drop this patch from the next version.

Thank you,

2021年4月17日(土) 6:53 Tim Harvey tharvey@gateworks.com:

...

From: Masami Hiramatsu masami.hiramatsu@linaro.org

Update the highest subordinate bus number after probing the devices under the bus for setting up the bridge correctly. The commit 42f3663a3f67 ("pci: Update to use new sequence numbers") removed this but it is required if a PCIe bridge is under the bus.

Fixes: 42f3663a3f67 ("pci: Update to use new sequence numbers") Signed-off-by: Masami Hiramatsu masami.hiramatsu@linaro.org

drivers/pci/pci-uclass.c | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index dfd54b339f..f463ef3550 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -646,6 +646,9 @@ int dm_pci_hose_probe_bus(struct udevice *bus) return log_msg_ret("probe", ret); }
  if (!ea_pos)
          sub_bus = pci_get_bus_max();
  dm_pciauto_postscan_setup_bridge(bus, sub_bus);

  return sub_bus;
-- 2.17.1

-- Masami Hiramatsu

Tim Harvey

12:35 a.m.

On Fri, Apr 16, 2021 at 3:30 PM Masami Hiramatsu masami.hiramatsu@linaro.org wrote:

...

Hi Tim,

Thanks for picking it up. I'll drop this patch from the next version.

Thank you,

2021年4月17日(土) 6:53 Tim Harvey tharvey@gateworks.com:

...
From: Masami Hiramatsu masami.hiramatsu@linaro.org

Update the highest subordinate bus number after probing the devices under the bus for setting up the bridge correctly. The commit 42f3663a3f67 ("pci: Update to use new sequence numbers") removed this but it is required if a PCIe bridge is under the bus.

Fixes: 42f3663a3f67 ("pci: Update to use new sequence numbers") Signed-off-by: Masami Hiramatsu masami.hiramatsu@linaro.org

drivers/pci/pci-uclass.c | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index dfd54b339f..f463ef3550 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -646,6 +646,9 @@ int dm_pci_hose_probe_bus(struct udevice *bus) return log_msg_ret("probe", ret); }
  if (!ea_pos)
          sub_bus = pci_get_bus_max();
  dm_pciauto_postscan_setup_bridge(bus, sub_bus);

  return sub_bus;
-- 2.17.1

Masami,

I'm not a maintainer, I just re-posted it. I do need this fix for my Gateworks Ventana driver-model conversion completion however so I put it in my series as well. Hopefully 'someone' will pick it up :)

Tim

Masami Hiramatsu

1:19 a.m.

Hi Tim,

2021年4月17日(土) 7:35 Tim Harvey tharvey@gateworks.com:

...

On Fri, Apr 16, 2021 at 3:30 PM Masami Hiramatsu masami.hiramatsu@linaro.org wrote:

...
Hi Tim,

Thanks for picking it up. I'll drop this patch from the next version.

Thank you,

2021年4月17日(土) 6:53 Tim Harvey tharvey@gateworks.com:

...
From: Masami Hiramatsu masami.hiramatsu@linaro.org

Update the highest subordinate bus number after probing the devices under the bus for setting up the bridge correctly. The commit 42f3663a3f67 ("pci: Update to use new sequence numbers") removed this but it is required if a PCIe bridge is under the bus.

Fixes: 42f3663a3f67 ("pci: Update to use new sequence numbers") Signed-off-by: Masami Hiramatsu masami.hiramatsu@linaro.org

drivers/pci/pci-uclass.c | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index dfd54b339f..f463ef3550 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -646,6 +646,9 @@ int dm_pci_hose_probe_bus(struct udevice *bus) return log_msg_ret("probe", ret); }
  if (!ea_pos)
          sub_bus = pci_get_bus_max();
  dm_pciauto_postscan_setup_bridge(bus, sub_bus);

  return sub_bus;
-- 2.17.1
Masami,

I'm not a maintainer, I just re-posted it. I do need this fix for my Gateworks Ventana driver-model conversion completion however so I put it in my series as well. Hopefully 'someone' will pick it up :)

I got it. Anyway I can refer to this on the ML archive, so I'll point to this from the next version. Mine was not sent to ML because of my poor typo :(

Thank you!

...

Tim

-- Masami Hiramatsu

stefano.babic＠babic.homelinux.org

2 May 2 May

1:43 p.m.

...

From: Masami Hiramatsu masami.hiramatsu@linaro.org Update the highest subordinate bus number after probing the devices under the bus for setting up the bridge correctly. The commit 42f3663a3f67 ("pci: Update to use new sequence numbers") removed this but it is required if a PCIe bridge is under the bus. Fixes: 42f3663a3f67 ("pci: Update to use new sequence numbers") Signed-off-by: Masami Hiramatsu masami.hiramatsu@linaro.org

Applied to u-boot-imx, master, thanks !

Best regards, Stefano Babic

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Masami Hiramatsu
sbabic＠denx.de
Stefano Babic
stefano.babic＠babic.homelinux.org
Tim Harvey