[U-Boot] [PATCH] sunxi: lower the DDR frequency of Orange Pi Prime
When I use Orange Pi Prime to do some heavy compliation tasks, the gcc compiler sometimes mysteriously segfaults, and memtester catches memory error. As the lima-memtester cannot support H5 (Mali-450 GPU equipped), there's no really reliable way to detect DRAM stability except try and error.
Lower the DDR frequency to 624MHz seems to solved the issue.
Set the default frequency to 624MHz in the defconfig, as 672MHz is observed to be unstable at least on my board.
Signed-off-by: Icenowy Zheng icenowy@aosc.io --- configs/orangepi_prime_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 3d87374002..88eaf12741 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y CONFIG_MACH_SUN50I_H5=y -CONFIG_DRAM_CLK=672 +CONFIG_DRAM_CLK=624 CONFIG_DRAM_ZQ=3881977 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-orangepi-prime" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
On Tue, Oct 31, 2017 at 03:56:08PM +0800, Icenowy Zheng wrote:
When I use Orange Pi Prime to do some heavy compliation tasks, the gcc compiler sometimes mysteriously segfaults, and memtester catches memory error. As the lima-memtester cannot support H5 (Mali-450 GPU equipped), there's no really reliable way to detect DRAM stability except try and error.
Lower the DDR frequency to 624MHz seems to solved the issue.
Set the default frequency to 624MHz in the defconfig, as 672MHz is observed to be unstable at least on my board.
Signed-off-by: Icenowy Zheng icenowy@aosc.io
What is the value used in the fex file?
Maxime
在 2017-10-31 16:09，Maxime Ripard 写道：
On Tue, Oct 31, 2017 at 03:56:08PM +0800, Icenowy Zheng wrote:
When I use Orange Pi Prime to do some heavy compliation tasks, the gcc compiler sometimes mysteriously segfaults, and memtester catches memory error. As the lima-memtester cannot support H5 (Mali-450 GPU equipped), there's no really reliable way to detect DRAM stability except try and error.
Lower the DDR frequency to 624MHz seems to solved the issue.
Set the default frequency to 624MHz in the defconfig, as 672MHz is observed to be unstable at least on my board.
Signed-off-by: Icenowy Zheng icenowy@aosc.io
What is the value used in the fex file?
672MHz. The current frequency and ZQ are both the same with FEX. [1]
[1] https://github.com/OrangePiLibra/OrangePi_H5SDK/blob/master/external/sys_con...
Maxime
-- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
On Tue, Oct 31, 2017 at 04:17:06PM +0800, icenowy@aosc.io wrote:
在 2017-10-31 16:09，Maxime Ripard 写道：
On Tue, Oct 31, 2017 at 03:56:08PM +0800, Icenowy Zheng wrote:
When I use Orange Pi Prime to do some heavy compliation tasks, the gcc compiler sometimes mysteriously segfaults, and memtester catches memory error. As the lima-memtester cannot support H5 (Mali-450 GPU equipped), there's no really reliable way to detect DRAM stability except try and error.
Lower the DDR frequency to 624MHz seems to solved the issue.
Set the default frequency to 624MHz in the defconfig, as 672MHz is observed to be unstable at least on my board.
Signed-off-by: Icenowy Zheng icenowy@aosc.io
What is the value used in the fex file?
672MHz. The current frequency and ZQ are both the same with FEX. [1]
[1] https://github.com/OrangePiLibra/OrangePi_H5SDK/blob/master/external/sys_con...
And it breaks the same way on a legacy kernel?
Maxime
在 2017-10-31 18:21，Maxime Ripard 写道：
On Tue, Oct 31, 2017 at 04:17:06PM +0800, icenowy@aosc.io wrote:
在 2017-10-31 16:09，Maxime Ripard 写道：
On Tue, Oct 31, 2017 at 03:56:08PM +0800, Icenowy Zheng wrote:
When I use Orange Pi Prime to do some heavy compliation tasks, the gcc compiler sometimes mysteriously segfaults, and memtester catches memory error. As the lima-memtester cannot support H5 (Mali-450 GPU equipped), there's no really reliable way to detect DRAM stability except try and error.
Lower the DDR frequency to 624MHz seems to solved the issue.
Set the default frequency to 624MHz in the defconfig, as 672MHz is observed to be unstable at least on my board.
Signed-off-by: Icenowy Zheng icenowy@aosc.io
What is the value used in the fex file?
672MHz. The current frequency and ZQ are both the same with FEX. [1]
[1] https://github.com/OrangePiLibra/OrangePi_H5SDK/blob/master/external/sys_con...
And it breaks the same way on a legacy kernel?
Sorry but I didn't use any legacy-based solutions on H5.
Maxime
On Tue, Oct 31, 2017 at 06:22:51PM +0800, Icenowy Zheng wrote:
在 2017-10-31 18:21，Maxime Ripard 写道：
On Tue, Oct 31, 2017 at 04:17:06PM +0800, icenowy@aosc.io wrote:
在 2017-10-31 16:09，Maxime Ripard 写道：
On Tue, Oct 31, 2017 at 03:56:08PM +0800, Icenowy Zheng wrote:
When I use Orange Pi Prime to do some heavy compliation tasks, the gcc compiler sometimes mysteriously segfaults, and memtester catches memory error. As the lima-memtester cannot support H5 (Mali-450 GPU equipped), there's no really reliable way to detect DRAM stability except try and error.
Lower the DDR frequency to 624MHz seems to solved the issue.
Set the default frequency to 624MHz in the defconfig, as 672MHz is observed to be unstable at least on my board.
Signed-off-by: Icenowy Zheng icenowy@aosc.io
What is the value used in the fex file?
672MHz. The current frequency and ZQ are both the same with FEX. [1]
[1] https://github.com/OrangePiLibra/OrangePi_H5SDK/blob/master/external/sys_con...
And it breaks the same way on a legacy kernel?
Sorry but I didn't use any legacy-based solutions on H5.
That should be worth testing then, because if we're using the same RAM settings and we have stability issues, then we have a bug somewhere, and putting a blanket on top of it isn't a solution.
Maxime
在 2017-10-31二的 09:09 +0100，Maxime Ripard写道：
On Tue, Oct 31, 2017 at 03:56:08PM +0800, Icenowy Zheng wrote:
When I use Orange Pi Prime to do some heavy compliation tasks, the gcc compiler sometimes mysteriously segfaults, and memtester catches memory error. As the lima-memtester cannot support H5 (Mali-450 GPU equipped), there's no really reliable way to detect DRAM stability except try and error.
Lower the DDR frequency to 624MHz seems to solved the issue.
Set the default frequency to 624MHz in the defconfig, as 672MHz is observed to be unstable at least on my board.
Signed-off-by: Icenowy Zheng icenowy@aosc.io
What is the value used in the fex file?
When testing with BSP images made by Orange Pi, I found that in newer images they secretly tweaked the DDR freq of Orange Pi PC2 and Prime to 624MHz.
This is found by checking pll-dram frequency after booting.
Maxime
On Sun, Oct 28, 2018 at 12:26:18AM +0800, Icenowy Zheng wrote:
在 2017-10-31二的 09:09 +0100，Maxime Ripard写道：
On Tue, Oct 31, 2017 at 03:56:08PM +0800, Icenowy Zheng wrote:
When I use Orange Pi Prime to do some heavy compliation tasks, the gcc compiler sometimes mysteriously segfaults, and memtester catches memory error. As the lima-memtester cannot support H5 (Mali-450 GPU equipped), there's no really reliable way to detect DRAM stability except try and error.
Lower the DDR frequency to 624MHz seems to solved the issue.
Set the default frequency to 624MHz in the defconfig, as 672MHz is observed to be unstable at least on my board.
Signed-off-by: Icenowy Zheng icenowy@aosc.io
What is the value used in the fex file?
When testing with BSP images made by Orange Pi, I found that in newer images they secretly tweaked the DDR freq of Orange Pi PC2 and Prime to 624MHz.
This is found by checking pll-dram frequency after booting.
Ok then. Can you resend that patch?
Thanks! Maxime
On Tue, Oct 31, 2017 at 1:26 PM, Icenowy Zheng icenowy@aosc.io wrote:
When I use Orange Pi Prime to do some heavy compliation tasks, the gcc compiler sometimes mysteriously segfaults, and memtester catches memory error. As the lima-memtester cannot support H5 (Mali-450 GPU equipped), there's no really reliable way to detect DRAM stability except try and error.
Lower the DDR frequency to 624MHz seems to solved the issue.
I'm not sure, since ddr can be keyrole IP during relocation and falcon mode(which I'm trying) but we can make sure the ddr test in uboot atleast?
thanks!
于 2017年10月31日 GMT+08:00 下午4:59:34, Jagan Teki jagannadh.teki@gmail.com 写到:
On Tue, Oct 31, 2017 at 1:26 PM, Icenowy Zheng icenowy@aosc.io wrote:
When I use Orange Pi Prime to do some heavy compliation tasks, the
gcc
compiler sometimes mysteriously segfaults, and memtester catches
memory
error. As the lima-memtester cannot support H5 (Mali-450 GPU
equipped),
there's no really reliable way to detect DRAM stability except try
and
error.
Lower the DDR frequency to 624MHz seems to solved the issue.
I'm not sure, since ddr can be keyrole IP during relocation and falcon mode(which I'm trying) but we can make sure the ddr test in uboot atleast?
Some issues will only appear under heavy load, which is difficult to emulate by u-boot.
To expose the issue by memtester I used two background tasks: one is infinite tinymembench, the other is building a Linux kernel with -j4.
thanks!
participants (5)
-
Icenowy Zheng -
icenowy＠aosc.io
-
Jagan Teki -
Maxime Ripard -
Maxime Ripard