[U-Boot] [PATCH v6 00/21] sf: Updates on flash detection

From: Jagan Teki jagan@amarulasolutions.com
Updated spi_flash_info table in sync with Linux, and removed legacy and unsupported code.
Changes for v6: - Fix few comments from Simon - Rebase to master
Changes for v5: - Add dataflash fixes in this series - Rebase to master
Changes for v4: - Rebase to master
Changes for v3: - New patches - Fix checkpatch.pl - Fix BIT positions in spi.h - Fix ti_qspi.c mode - Fix commit Nit: s/becuase/because
Changes for v2: - New patches.
Testing: $ git clone git://git.denx.de/u-boot-spi.git $ cd u-boot-spi $ git checkout -b next origin/next
buildman: -------- $ ./tools/buildman/buildman -b next -c 21 -se boards.cfg is up to date. Nothing to do. Summary of 21 commits for 1219 boards (12 threads, 1 job per thread) 01: sf: Adopt flash table INFO macro from Linux blackfin: + cm-bf561 blackstamp bf527-ezkit-v2 cm-bf527 bf506f-ezkit ip04 bf527-sdp bf527-ad7160-eval bf609-ezkit tcm-bf518 bf527-ezkit bf533-ezkit ibf-dsp561 bf537-minotaur bf537-pnav bf537-srv1 cm-bf548 bf548-ezkit bf525-ucr2 blackvme pr1 bf518f-ezbrd bf526-ezbrd br4 x86: + galileo conga-qeval20-qa3-e3845-internal-uart coreboot-x86 qemu-x86_efi_payload32 conga-qeval20-qa3-e3845 bayleybay theadorable-x86-dfi-bt700 qemu-x86_efi_payload64 minnowmax dfi-bt700-q7x-151 efi-x86 som-db5800-som-6867 +/bin/sh: 1: bfin-uclinux-ldr: not found +make[1]: *** [u-boot.ldr] Error 127 +make: *** [sub-make] Error 2 +make[1]: bfin-uclinux-ldr: Command not found +/bin/sh: 1: iasl: not found +mv: cannot stat '../board/intel/galileo/dsdt.hex': No such file or directory +make[2]: *** [board/intel/galileo/dsdt.c] Error 1 +make[1]: *** [board/intel/galileo] Error 2 +cc1: error: -mcpu=bf506-0.0 is not valid +cc1: error: unrecognized command line option '-mcpu=bf506-0.0' +make[2]: *** [u-boot.cfg] Error 1 +make[1]: *** No rule to make target `include/config/auto.conf', needed by `include/config/uboot.release'. Stop. +cc1: error: -mcpu=bf609-0.0 is not valid +cc1: error: unrecognized command line option '-mcpu=bf609-0.0' +mv: cannot stat '../board/congatec/conga-qeval20-qa3-e3845/dsdt.hex': No such file or directory +make[2]: *** [board/congatec/conga-qeval20-qa3-e3845/dsdt.c] Error 1 +make[1]: *** [board/congatec/conga-qeval20-qa3-e3845] Error 2 + static u32 write_smbios_table_wrapper(u32 addr) + ^ +mv: cannot stat '../board/dfi/dfi-bt700/dsdt.hex': No such file or directory +make[2]: *** [board/dfi/dfi-bt700/dsdt.c] Error 1 +make[1]: *** [board/dfi/dfi-bt700] Error 2 +mv: cannot stat '../board/intel/bayleybay/dsdt.hex': No such file or directory +make[2]: *** [board/intel/bayleybay/dsdt.c] Error 1 +make[1]: *** [board/intel/bayleybay] Error 2 +../arch/x86/lib/efi/crt0-efi-x86_64.S: Assembler messages: +../arch/x86/lib/efi/crt0-efi-x86_64.S:16: Error: bad register name `%rsp' +../arch/x86/lib/efi/crt0-efi-x86_64.S:17: Error: bad register name `%rcx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:18: Error: bad register name `%rdx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:21: Error: bad register name `%rip)' +../arch/x86/lib/efi/crt0-efi-x86_64.S:22: Error: bad register name `%rip)' +../arch/x86/lib/efi/crt0-efi-x86_64.S:24: Error: bad register name `%rcx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:25: Error: bad register name `%rdx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:26: Error: bad register name `%rcx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:27: Error: bad register name `%rdx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:30: Error: bad register name `%rdi' +../arch/x86/lib/efi/crt0-efi-x86_64.S:31: Error: bad register name `%rsi' +../arch/x86/lib/efi/crt0-efi-x86_64.S:34: Error: bad register name `%rsp' +../arch/x86/lib/efi/crt0-efi-x86_64.S:47: Warning: setting incorrect section attributes for .reloc +make[3]: *** [arch/x86/lib/efi/crt0-efi-x86_64.o] Error 1 +make[2]: *** [arch/x86/lib/efi] Error 2 +make[1]: *** [arch/x86/lib] Error 2 +mv: cannot stat '../board/intel/minnowmax/dsdt.hex': No such file or directory +make[2]: *** [board/intel/minnowmax/dsdt.c] Error 1 +make[1]: *** [board/intel/minnowmax] Error 2 +mv: cannot stat '../board/advantech/som-db5800-som-6867/dsdt.hex': No such file or directory +make[2]: *** [board/advantech/som-db5800-som-6867/dsdt.c] Error 1 +make[1]: *** [board/advantech/som-db5800-som-6867] Error 2 w+../drivers/usb/musb/musb_hcd.c: In function 'config_hub_port': w+../drivers/usb/musb/musb_hcd.c:405:5: warning: variable 'hub' set but not used [-Wunused-but-set-variable] w+../drivers/usb/musb/musb_core.c: In function 'musb_configure_ep': w+../drivers/usb/musb/musb_core.c:71:6: warning: variable 'idx' set but not used [-Wunused-but-set-variable] w+../arch/x86/lib/tables.c:15:12: warning: 'write_smbios_table_wrapper' defined but not used [-Wunused-function] w+../board/bf533-ezkit/flash.c: In function 'read_data': w+../board/bf533-ezkit/flash.c:241:6: warning: variable 'iShift' set but not used [-Wunused-but-set-variable] w+../drivers/net/ax88180.c: In function 'ax88180_mac_reset': w+../drivers/net/ax88180.c:132:16: warning: variable 'tmpval' set but not used [-Wunused-but-set-variable] w+../drivers/net/ax88180.c: In function 'ax88180_recv': w+../drivers/net/ax88180.c:577:17: warning: variable 'tmp_regval' set but not used [-Wunused-but-set-variable] 02: sf: Simplify lock ops detection code 03: sf: sandbox: Use JEDEC_MFR|ID in id exctract 04: sf: Cleanup spi_flash_info{} 05: sf: nr_sectors -> n_sectors 06: sf: Add SPI_FLASH_MAX_ID_LEN 07: sf: Increase max id length by 1 byte 08: sf: Add INFO6 flash_info macro 09: sf: params: Add S25FS256S_64K spi flash support 10: sf: Remove legacy idcode detection code 11: sf: Remove non-meaningful comments 12: sf: Rename sf_params.c to spi_flash_ids.c 13: sf: ids: Use small letter's with flash name 14: sf: ids: Use small letter in ext_jedec 15: sf: Rename few local functions 16: spi: Remove dual flash options/flags 17: sf: dataflash: Remove unneeded spi data 18: sf: dataflash: Move flash id detection into jedec_probe 19: sf: dataflash: Fix add_dataflash return logic 20: sf: dataflash: Minor cleanups 21: sf: Fix s25fs512s id param table
$ ./tools/buildman/buildman -b next -c 21 -sS boards.cfg is up to date. Nothing to do. Summary of 21 commits for 1219 boards (12 threads, 1 job per thread) 01: sf: Adopt flash table INFO macro from Linux blackfin: + cm-bf561 blackstamp bf527-ezkit-v2 cm-bf527 bf506f-ezkit ip04 bf527-sdp bf527-ad7160-eval bf609-ezkit tcm-bf518 bf527-ezkit bf533-ezkit ibf-dsp561 bf537-minotaur bf537-pnav bf537-srv1 cm-bf548 bf548-ezkit bf525-ucr2 blackvme pr1 bf518f-ezbrd bf526-ezbrd br4 x86: + galileo conga-qeval20-qa3-e3845-internal-uart coreboot-x86 qemu-x86_efi_payload32 conga-qeval20-qa3-e3845 bayleybay theadorable-x86-dfi-bt700 qemu-x86_efi_payload64 minnowmax dfi-bt700-q7x-151 efi-x86 som-db5800-som-6867 02: sf: Simplify lock ops detection code avr32: (for 4/4 boards) all -2.0 text -2.0 powerpc: (for 415/415 boards) all +0.0 rodata +0.0 arm: (for 560/560 boards) all -1.6 bss -0.6 spl/u-boot-spl:all -0.2 spl/u-boot-spl:text -0.2 text -1.1 03: sf: sandbox: Use JEDEC_MFR|ID in id exctract 04: sf: Cleanup spi_flash_info{} powerpc: (for 415/415 boards) all -0.0 rodata -0.0 05: sf: nr_sectors -> n_sectors powerpc: (for 415/415 boards) all +0.0 rodata +0.0 06: sf: Add SPI_FLASH_MAX_ID_LEN 07: sf: Increase max id length by 1 byte m68k: (for 48/48 boards) all +12.1 data +12.1 powerpc: (for 415/415 boards) all -0.0 rodata -0.0 08: sf: Add INFO6 flash_info macro powerpc: (for 415/415 boards) all +0.0 rodata +0.0 09: sf: params: Add S25FS256S_64K spi flash support blackfin: (for 33/35 boards) all +2.4 rodata +2.4 aarch64: (for 61/61 boards) all +16.1 rodata +10.6 text +5.5 powerpc: (for 415/415 boards) all +14.3 data +8.2 rodata +4.8 spl/u-boot-spl:all +1.6 spl/u-boot-spl:data +1.4 spl/u-boot-spl:text +0.2 text +1.4 sandbox: (for 3/3 boards) all +48.0 rodata +48.0 mips: (for 35/35 boards) all +4.6 bss +0.5 data +2.1 rodata +1.4 text +0.7 arm: (for 560/560 boards) all +2.2 bss -0.2 rodata +2.0 spl/u-boot-spl:all +1.4 spl/u-boot-spl:rodata +1.4 text +0.4 10: sf: Remove legacy idcode detection code blackfin: (for 33/35 boards) all -16.2 text -16.2 aarch64: (for 61/61 boards) all -66.5 text -66.5 powerpc: (for 415/415 boards) all -115.6 spl/u-boot-spl:all -13.1 spl/u-boot-spl:text -13.1 text -115.6 sandbox: (for 3/3 boards) all -304.0 text -304.0 mips: (for 35/35 boards) all -34.4 bss -0.5 text -33.9 arm: (for 560/560 boards) all -12.7 bss +0.1 spl/u-boot-spl:all -8.9 spl/u-boot-spl:text -8.9 text -12.7 11: sf: Remove non-meaningful comments 12: sf: Rename sf_params.c to spi_flash_ids.c 13: sf: ids: Use small letter's with flash name blackfin: (for 33/35 boards) all +0.1 rodata +0.1 aarch64: (for 61/61 boards) all +0.1 rodata +0.1 powerpc: (for 415/415 boards) all -0.1 rodata -0.1 mips: (for 35/35 boards) all -5.7 bss +0.5 rodata -6.2 arm: (for 560/560 boards) bss -0.0 rodata +0.0 14: sf: ids: Use small letter in ext_jedec 15: sf: Rename few local functions 16: spi: Remove dual flash options/flags blackfin: (for 33/35 boards) all -0.6 text -0.6 x86: (for 9/18 boards) all -2.2 bss +1.3 text -3.6 aarch64: (for 61/61 boards) all -2.4 text -2.4 avr32: (for 4/4 boards) all -4.0 text -4.0 m68k: (for 48/48 boards) all -3.2 text -3.2 powerpc: (for 415/415 boards) all -2.3 spl/u-boot-spl:all -0.2 spl/u-boot-spl:text -0.2 text -2.3 mips: (for 35/35 boards) all -0.3 text -0.3 arm: (for 560/560 boards) all -0.8 bss +0.4 rodata -0.0 spl/u-boot-spl:all -0.3 spl/u-boot-spl:text -0.3 text -1.2 17: sf: dataflash: Remove unneeded spi data mips: (for 35/35 boards) all -2.4 text -2.4 arm: (for 560/560 boards) all -0.4 bss -0.4 rodata +0.0 text -0.1 18: sf: dataflash: Move flash id detection into jedec_probe mips: (for 35/35 boards) all -1.8 bss -0.5 text -1.4 arm: (for 560/560 boards) bss +0.1 text -0.1 19: sf: dataflash: Fix add_dataflash return logic mips: (for 35/35 boards) all +12.8 bss +0.3 data +0.3 text +12.1 arm: (for 560/560 boards) bss -0.1 text +0.1 20: sf: dataflash: Minor cleanups mips: (for 35/35 boards) all -6.6 bss -0.5 rodata -3.1 text -3.1 arm: (for 560/560 boards) all -0.0 bss +0.2 rodata -0.1 text -0.1 21: sf: Fix s25fs512s id param table
Jagan Teki (21): sf: Adopt flash table INFO macro from Linux sf: Simplify lock ops detection code sf: sandbox: Use JEDEC_MFR|ID in id exctract sf: Cleanup spi_flash_info{} sf: nr_sectors -> n_sectors sf: Add SPI_FLASH_MAX_ID_LEN sf: Increase max id length by 1 byte sf: Add INFO6 flash_info macro sf: params: Add S25FS256S_64K spi flash support sf: Remove legacy idcode detection code sf: Remove non-meaningful comments sf: Rename sf_params.c to spi_flash_ids.c sf: ids: Use small letter's with flash name sf: ids: Use small letter in ext_jedec sf: Rename few local functions spi: Remove dual flash options/flags sf: dataflash: Remove unneeded spi data sf: dataflash: Move flash id detection into jedec_probe sf: dataflash: Fix add_dataflash return logic sf: dataflash: Minor cleanups sf: Fix s25fs512s id param table
doc/device-tree-bindings/mtd/spi/spi-flash.txt | 2 +- drivers/mtd/spi/Makefile | 2 +- drivers/mtd/spi/sandbox.c | 11 +- drivers/mtd/spi/sf.c | 4 - drivers/mtd/spi/sf_dataflash.c | 178 +++++++++---------- drivers/mtd/spi/sf_internal.h | 55 +++--- drivers/mtd/spi/sf_params.c | 149 ---------------- drivers/mtd/spi/spi_flash.c | 228 ++++++++----------------- drivers/mtd/spi/spi_flash_ids.c | 180 +++++++++++++++++++ include/linux/err.h | 5 + include/spi.h | 6 - 11 files changed, 373 insertions(+), 447 deletions(-) delete mode 100644 drivers/mtd/spi/sf_params.c create mode 100644 drivers/mtd/spi/spi_flash_ids.c

INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes.
- Add JEDEC_ID - Add JEDEC_EXT macro - Add JEDEC_MFR - spi_flash_params => spi_flash_info - params => info
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com Signed-off-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sandbox.c | 10 +- drivers/mtd/spi/sf_internal.h | 26 +++-- drivers/mtd/spi/sf_params.c | 217 ++++++++++++++++++++++-------------------- drivers/mtd/spi/spi_flash.c | 136 +++++++++++++------------- include/linux/err.h | 5 + 5 files changed, 214 insertions(+), 180 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index f59134f..d68ee4a 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -88,7 +88,7 @@ struct sandbox_spi_flash { /* The current flash status (see STAT_XXX defines above) */ u16 status; /* Data describing the flash we're emulating */ - const struct spi_flash_params *data; + const struct spi_flash_info *data; /* The file on disk to serv up data from */ int fd; }; @@ -112,7 +112,7 @@ static int sandbox_sf_probe(struct udevice *dev) struct sandbox_spi_flash *sbsf = dev_get_priv(dev); const char *file; size_t len, idname_len; - const struct spi_flash_params *data; + const struct spi_flash_info *data; struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev); struct sandbox_state *state = state_get_current(); struct udevice *bus = dev->parent; @@ -168,7 +168,7 @@ static int sandbox_sf_probe(struct udevice *dev) } debug("%s: device='%s'\n", __func__, spec);
- for (data = spi_flash_params_table; data->name; data++) { + for (data = spi_flash_ids; data->name; data++) { len = strlen(data->name); if (idname_len != len) continue; @@ -359,7 +359,9 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, debug(" id: off:%u tx:", sbsf->off); if (sbsf->off < IDCODE_LEN) { /* Extract correct byte from ID 0x00aabbcc */ - id = sbsf->data->jedec >> + id = ((((sbsf->data)->id[0]) << 16) | + (((sbsf->data)->id[1]) << 8 | + ((sbsf->data)->id[2]))) >> (8 * (IDCODE_LEN - 1 - sbsf->off)); } else { id = 0; diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index cde4cfb..a9455ac 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -103,24 +103,36 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define CMD_SPANSION_RDAR 0x65 /* Read any device register */ #define CMD_SPANSION_WRAR 0x71 /* Write any device register */ #endif + +#define JEDEC_MFR(info) ((info)->id[0]) +#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) +#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) + /** - * struct spi_flash_params - SPI/QSPI flash device params structure + * struct spi_flash_info - SPI/QSPI flash device params structure * * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) - * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) - * @ext_jedec: Device ext_jedec ID * @sector_size: Isn't necessarily a sector size from vendor, * the size listed here is what works with CMD_ERASE_64K * @nr_sectors: No.of sectors on this device * @flags: Important param, for flash specific behaviour */ -struct spi_flash_params { +struct spi_flash_info { const char *name; - u32 jedec; - u16 ext_jedec; + + /* + * This array stores the ID bytes. + * The first three bytes are the JEDIC ID. + * JEDEC ID zero means "no ID" (mostly older chips). + */ + u8 id[5]; + u8 id_len; + u32 sector_size; u32 nr_sectors;
+ u16 page_size; + u16 flags; #define SECT_4K BIT(0) #define E_FSR BIT(1) @@ -133,7 +145,7 @@ struct spi_flash_params { #define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO) };
-extern const struct spi_flash_params spi_flash_params_table[]; +extern const struct spi_flash_info spi_flash_ids[];
/* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 5b50114..7fcc3bc 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -12,125 +12,140 @@
#include "sf_internal.h"
+/* Used when the "_ext_id" is two bytes at most */ +#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \ + .id = { \ + ((_jedec_id) >> 16) & 0xff, \ + ((_jedec_id) >> 8) & 0xff, \ + (_jedec_id) & 0xff, \ + ((_ext_id) >> 8) & 0xff, \ + (_ext_id) & 0xff, \ + }, \ + .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \ + .sector_size = (_sector_size), \ + .nr_sectors = (_n_sectors), \ + .page_size = 256, \ + .flags = (_flags), + /* SPI/QSPI flash device params structure */ -const struct spi_flash_params spi_flash_params_table[] = { +const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ - {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, SECT_4K}, - {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, SECT_4K}, - {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, SECT_4K}, - {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, SECT_4K}, - {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, SECT_4K}, - {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, SECT_4K}, - {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, SECT_4K}, - {"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K}, - {"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K}, - {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K}, + {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) }, + {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) }, + {"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) }, + {"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) }, + {"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) }, + {"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) }, + {"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) }, + {"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) }, + {"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) }, + {"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_EON /* EON */ - {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0}, - {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K}, - {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0}, - {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0}, + {"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) }, + {"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) }, + {"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) }, #endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ - {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K}, - {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K}, + {"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ - {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0}, - {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0}, - {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0}, + {"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) }, + {"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) }, + {"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) }, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ - {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0}, - {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0}, - {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0}, - {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0}, - {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0}, - {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0}, - {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, - {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP}, - {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP}, - {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, + {"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) }, + {"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) }, + {"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) }, + {"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) }, + {"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) }, + {"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) }, + {"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) }, + {"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) }, + {"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ - {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0}, - {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0}, - {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0}, - {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0}, - {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0}, - {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0}, - {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP}, - {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP}, - {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP}, - {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP}, - {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP}, - {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP}, - {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP}, - {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP}, - {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP}, - {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP}, - {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP}, - {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP}, + {"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) }, + {"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) }, + {"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) }, + {"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) }, + {"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) }, + {"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) }, + {"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) }, + {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) }, + {"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) }, + {"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) }, + {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, + {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, + {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) }, + {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, + {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, + {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ - {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0}, - {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0}, - {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0}, - {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0}, - {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0}, - {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0}, - {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL}, - {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0}, - {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0}, - {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0}, - {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K}, - {"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K}, - {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, - {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP}, - {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K}, - {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K}, - {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K}, - {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K}, - {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K}, + {"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) }, + {"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) }, + {"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) }, + {"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) }, + {"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) }, + {"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) }, + {"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) }, + {"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) }, + {"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) }, + {"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) }, + {"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) }, + {"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) }, + {"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */ - {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR}, - {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR}, - {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR}, - {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR}, - {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, SECT_4K}, - {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR}, - {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR}, - {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR}, - {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR}, - {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, SECT_4K}, - {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR}, + {"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, + {"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, + {"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) }, + {"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) }, + {"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) }, + {"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) }, + {"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) }, + {"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) }, + {"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, + {"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) }, + {"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ - {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0}, - {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0}, - {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0}, - {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K}, - {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K}, - {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K}, - {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K}, - {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K}, - {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K}, + {"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) }, + {"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) }, + {"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) }, + {"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) }, + {"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) }, + {"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) }, + {"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, #endif {}, /* Empty entry to terminate the list */ /* diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 7f6e9ae..95ee5ac 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -165,7 +165,8 @@ bar_end: return flash->bank_curr; }
-static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0) +static int spi_flash_read_bar(struct spi_flash *flash, + const struct spi_flash_info *info) { u8 curr_bank = 0; int ret; @@ -173,7 +174,7 @@ static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0) if (flash->size <= SPI_FLASH_16MB_BOUN) goto bar_end;
- switch (idcode0) { + switch (JEDEC_MFR(info)) { case SPI_FLASH_CFI_MFR_SPANSION: flash->bank_read_cmd = CMD_BANKADDR_BRRD; flash->bank_write_cmd = CMD_BANKADDR_BRWR; @@ -924,9 +925,35 @@ static int micron_quad_enable(struct spi_flash *flash) } #endif
-static int set_quad_mode(struct spi_flash *flash, u8 idcode0) +static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash) { - switch (idcode0) { + int tmp; + u8 id[5]; + const struct spi_flash_info *info; + + tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5); + if (tmp < 0) { + printf("SF: error %d reading JEDEC ID\n", tmp); + return ERR_PTR(tmp); + } + + info = spi_flash_ids; + for (; info->name != NULL; info++) { + if (info->id_len) { + if (!memcmp(info->id, id, info->id_len)) + return info; + } + } + + printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n", + id[0], id[1], id[2]); + return ERR_PTR(-ENODEV); +} + +static int set_quad_mode(struct spi_flash *flash, + const struct spi_flash_info *info) +{ + switch (JEDEC_MFR(info)) { #ifdef CONFIG_SPI_FLASH_MACRONIX case SPI_FLASH_CFI_MFR_MACRONIX: return macronix_quad_enable(flash); @@ -941,7 +968,8 @@ static int set_quad_mode(struct spi_flash *flash, u8 idcode0) return micron_quad_enable(flash); #endif default: - printf("SF: Need set QEB func for %02x flash\n", idcode0); + printf("SF: Need set QEB func for %02x flash\n", + JEDEC_MFR(info)); return -1; } } @@ -1011,45 +1039,12 @@ static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi) int spi_flash_scan(struct spi_flash *flash) { struct spi_slave *spi = flash->spi; - const struct spi_flash_params *params; - u16 jedec, ext_jedec; - u8 idcode[5]; - int ret; - - /* Read the ID codes */ - ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); - if (ret) { - printf("SF: Failed to get idcodes\n"); - return ret; - } - -#ifdef DEBUG - printf("SF: Got idcodes\n"); - print_buffer(0, idcode, 1, sizeof(idcode), 0); -#endif - - jedec = idcode[1] << 8 | idcode[2]; - ext_jedec = idcode[3] << 8 | idcode[4]; - - /* Validate params from spi_flash_params table */ - params = spi_flash_params_table; - for (; params->name != NULL; params++) { - if ((params->jedec >> 16) == idcode[0]) { - if ((params->jedec & 0xFFFF) == jedec) { - if (params->ext_jedec == 0) - break; - else if (params->ext_jedec == ext_jedec) - break; - } - } - } + const struct spi_flash_info *info = NULL; + int ret = -1;
- if (!params->name) { - printf("SF: Unsupported flash IDs: "); - printf("manuf %02x, jedec %04x, ext_jedec %04x\n", - idcode[0], jedec, ext_jedec); - return -EPROTONOSUPPORT; - } + info = spi_flash_read_id(flash); + if (IS_ERR_OR_NULL(info)) + return -ENOENT;
#ifdef CONFIG_SPI_FLASH_SPANSION /* @@ -1065,11 +1060,17 @@ int spi_flash_scan(struct spi_flash *flash) * sector that is not overlaid by the parameter sectors. * The uniform sector erase command has no effect on parameter sectors. */ - if ((jedec == 0x0219 || (jedec == 0x0220)) && - (ext_jedec & 0xff00) == 0x4d00) { + if ((JEDEC_ID(info) == 0x0219 || (JEDEC_ID(info) == 0x0220)) && + (JEDEC_EXT(info) & 0xff00) == 0x4d00) { int ret; + u8 idcode[5]; u8 id[6];
+ /* Read the ID codes again, 5 bytes */ + ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode, sizeof(idcode)); + if (ret) + return -EIO; + /* Read the ID codes again, 6 bytes */ ret = spi_flash_cmd(flash->spi, CMD_READ_ID, id, sizeof(id)); if (ret) @@ -1088,18 +1089,18 @@ int spi_flash_scan(struct spi_flash *flash) } #endif /* Flash powers up read-only, so clear BP# bits */ - if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL || - idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX || - idcode[0] == SPI_FLASH_CFI_MFR_SST) + if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL || + JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX || + JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) write_sr(flash, 0);
/* Assign spi data */ - flash->name = params->name; + flash->name = info->name; flash->memory_map = spi->memory_map; flash->dual_flash = spi->option;
/* Assign spi flash flags */ - if (params->flags & SST_WR) + if (info->flags & SST_WR) flash->flags |= SNOR_F_SST_WR;
/* Assign spi_flash ops */ @@ -1118,7 +1119,7 @@ int spi_flash_scan(struct spi_flash *flash) #endif
/* lock hooks are flash specific - assign them based on idcode0 */ - switch (idcode[0]) { + switch (JEDEC_MFR(info)) { #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) case SPI_FLASH_CFI_MFR_STMICRO: case SPI_FLASH_CFI_MFR_SST: @@ -1128,28 +1129,26 @@ int spi_flash_scan(struct spi_flash *flash) #endif break; default: - debug("SF: Lock ops not supported for %02x flash\n", idcode[0]); + debug("SF: Lock ops not supported for %02x flash\n", JEDEC_MFR(info)); }
/* Compute the flash size */ flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; + flash->page_size = info->page_size; /* * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with * the 0x4d00 Extended JEDEC code have 512b pages. All of the others * have 256b pages. */ - if (ext_jedec == 0x4d00) { - if ((jedec == 0x0215) || (jedec == 0x216) || (jedec == 0x220)) - flash->page_size = 256; - else + if (JEDEC_EXT(info) == 0x4d00) { + if ((JEDEC_ID(info) != 0x0215) && + (JEDEC_ID(info) != 0x0216)) flash->page_size = 512; - } else { - flash->page_size = 256; } flash->page_size <<= flash->shift; - flash->sector_size = params->sector_size << flash->shift; - flash->size = flash->sector_size * params->nr_sectors << flash->shift; + flash->sector_size = info->sector_size << flash->shift; + flash->size = flash->sector_size * info->nr_sectors << flash->shift; #ifdef CONFIG_SF_DUAL_FLASH if (flash->dual_flash & SF_DUAL_STACKED_FLASH) flash->size <<= 1; @@ -1157,7 +1156,7 @@ int spi_flash_scan(struct spi_flash *flash)
#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS /* Compute erase sector and command */ - if (params->flags & SECT_4K) { + if (info->flags & SECT_4K) { flash->erase_cmd = CMD_ERASE_4K; flash->erase_size = 4096 << flash->shift; } else @@ -1174,13 +1173,13 @@ int spi_flash_scan(struct spi_flash *flash) flash->read_cmd = CMD_READ_ARRAY_FAST; if (spi->mode & SPI_RX_SLOW) flash->read_cmd = CMD_READ_ARRAY_SLOW; - else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD) + else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD) flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST; - else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL) + else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL) flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
/* Look for write commands */ - if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD) + if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD) flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; else /* Go for default supported write cmd */ @@ -1190,9 +1189,10 @@ int spi_flash_scan(struct spi_flash *flash) if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) || (flash->read_cmd == CMD_READ_QUAD_IO_FAST) || (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) { - ret = set_quad_mode(flash, idcode[0]); + ret = set_quad_mode(flash, info); if (ret) { - debug("SF: Fail to set QEB for %02x\n", idcode[0]); + debug("SF: Fail to set QEB for %02x\n", + JEDEC_MFR(info)); return -EINVAL; } } @@ -1217,13 +1217,13 @@ int spi_flash_scan(struct spi_flash *flash) }
#ifdef CONFIG_SPI_FLASH_STMICRO - if (params->flags & E_FSR) + if (info->flags & E_FSR) flash->flags |= SNOR_F_USE_FSR; #endif
/* Configure the BAR - discover bank cmds and read current bank */ #ifdef CONFIG_SPI_FLASH_BAR - ret = spi_flash_read_bar(flash, idcode[0]); + ret = spi_flash_read_bar(flash, info); if (ret < 0) return ret; #endif diff --git a/include/linux/err.h b/include/linux/err.h index e4d22d5..22e5756 100644 --- a/include/linux/err.h +++ b/include/linux/err.h @@ -36,6 +36,11 @@ static inline long IS_ERR(const void *ptr) return IS_ERR_VALUE((unsigned long)ptr); }
+static inline bool IS_ERR_OR_NULL(const void *ptr) +{ + return !ptr || IS_ERR_VALUE((unsigned long)ptr); +} + /** * ERR_CAST - Explicitly cast an error-valued pointer to another pointer type * @ptr: The pointer to cast.

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Simon Glass sjg@chromium.org; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 01/21] sf: Adopt flash table INFO macro from Linux
INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes.
- Add JEDEC_ID
- Add JEDEC_EXT macro
- Add JEDEC_MFR
- spi_flash_params => spi_flash_info
- params => info
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com Signed-off-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sandbox.c | 10 +- drivers/mtd/spi/sf_internal.h | 26 +++-- drivers/mtd/spi/sf_params.c | 217 ++++++++++++++++++++++-------------------
drivers/mtd/spi/spi_flash.c | 136 +++++++++++++------------- include/linux/err.h | 5 + 5 files changed, 214 insertions(+), 180 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index f59134f..d68ee4a 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -88,7 +88,7 @@ struct sandbox_spi_flash { /* The current flash status (see STAT_XXX defines above) */ u16 status; /* Data describing the flash we're emulating */
- const struct spi_flash_params *data;
- const struct spi_flash_info *data; /* The file on disk to serv up data from */ int fd;
}; @@ -112,7 +112,7 @@ static int sandbox_sf_probe(struct udevice *dev) struct sandbox_spi_flash *sbsf = dev_get_priv(dev); const char *file; size_t len, idname_len;
- const struct spi_flash_params *data;
- const struct spi_flash_info *data; struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev); struct sandbox_state *state = state_get_current(); struct udevice *bus = dev->parent;
@@ -168,7 +168,7 @@ static int sandbox_sf_probe(struct udevice *dev) } debug("%s: device='%s'\n", __func__, spec);
- for (data = spi_flash_params_table; data->name; data++) {
- for (data = spi_flash_ids; data->name; data++) { len = strlen(data->name); if (idname_len != len) continue;
@@ -359,7 +359,9 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, debug(" id: off:%u tx:", sbsf->off); if (sbsf->off < IDCODE_LEN) { /* Extract correct byte from ID 0x00aabbcc */
id = sbsf->data->jedec >>
id = ((((sbsf->data)->id[0]) << 16) |
(((sbsf->data)->id[1]) << 8 |
((sbsf->data)->id[2]))) >> (8 * (IDCODE_LEN - 1 - sbsf->off));
Please, no magic 16 and 8 here and everywhere
} else { id = 0;
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index cde4cfb..a9455ac 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -103,24 +103,36 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define CMD_SPANSION_RDAR 0x65 /* Read any device register */ #define CMD_SPANSION_WRAR 0x71 /* Write any device register */ #endif
+#define JEDEC_MFR(info) ((info)->id[0]) +#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) +#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
/**
- struct spi_flash_params - SPI/QSPI flash device params structure
- struct spi_flash_info - SPI/QSPI flash device params structure
- @name: Device name
([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
- @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
- @ext_jedec: Device ext_jedec ID
- @sector_size: Isn't necessarily a sector size from vendor,
the size listed here is what works with
CMD_ERASE_64K
- @nr_sectors: No.of sectors on this device
- @flags: Important param, for flash specific behaviour
*/ -struct spi_flash_params { +struct spi_flash_info { const char *name;
- u32 jedec;
- u16 ext_jedec;
/*
* This array stores the ID bytes.
* The first three bytes are the JEDIC ID.
* JEDEC ID zero means "no ID" (mostly older chips).
*/
u8 id[5];
u8 id_len;
u32 sector_size; u32 nr_sectors;
u16 page_size;
u16 flags;
#define SECT_4K BIT(0) #define E_FSR BIT(1) @@ -133,7 +145,7 @@ struct spi_flash_params { #define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO) };
-extern const struct spi_flash_params spi_flash_params_table[]; +extern const struct spi_flash_info spi_flash_ids[];
/* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); diff - -git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 5b50114..7fcc3bc 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -12,125 +12,140 @@
#include "sf_internal.h"
+/* Used when the "_ext_id" is two bytes at most */ +#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
.id = { \
((_jedec_id) >> 16) & 0xff, \
((_jedec_id) >> 8) & 0xff, \
(_jedec_id) & 0xff, \
((_ext_id) >> 8) & 0xff, \
(_ext_id) & 0xff, \
}, \
.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
.sector_size = (_sector_size), \
.nr_sectors = (_n_sectors), \
.page_size = 256, \
.flags = (_flags),
Is it just the default page size? Because, there are some Spansion parts with 512 bytes page size, I hope we are taking care of it in runtime and it is just the default one you are filling here, please confirm.
/* SPI/QSPI flash device params structure */ -const struct spi_flash_params spi_flash_params_table[] = { +const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
- {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4,
SECT_4K},
- {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8,
SECT_4K},
- {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8,
SECT_4K},
- {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16,
SECT_4K},
- {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32,
SECT_4K},
- {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64,
SECT_4K},
- {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128,
SECT_4K},
- {"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K},
- {"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K},
- {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K},
- {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4,
SECT_4K) },
- {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8,
SECT_4K) },
- {"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8,
SECT_4K) },
- {"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16,
SECT_4K) },
- {"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32,
SECT_4K) },
- {"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64,
SECT_4K) },
- {"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128,
SECT_4K) },
- {"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
- {"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
- {"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
#endif #ifdef CONFIG_SPI_FLASH_EON /* EON */
- {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
- {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K},
- {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
- {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0},
- {"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
- {"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
- {"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
#endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
- {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
- {"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
#endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
- {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0},
- {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0},
- {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0},
- {"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
- {"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
- {"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
#endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
- {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0},
- {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
- {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
- {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
- {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
- {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
- {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP},
- {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512,
RD_FULL | WR_QPP},
- {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024,
RD_FULL | WR_QPP},
- {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP},
- {"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
- {"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
- {"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
- {"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
- {"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
- {"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
- {"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP) },
- {"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512,
RD_FULL | WR_QPP) },
- {"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024,
RD_FULL | WR_QPP) },
- {"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
- {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
- {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
- {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
- {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
- {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0},
- {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0},
- {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL |
WR_QPP},
- {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL |
WR_QPP},
- {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL |
WR_QPP},
- {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL |
WR_QPP},
- {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL |
WR_QPP},
- {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL |
WR_QPP},
- {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL |
WR_QPP},
- {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL |
WR_QPP},
- {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL |
WR_QPP},
- {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL |
WR_QPP},
- {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL |
WR_QPP},
- {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL |
WR_QPP},
- {"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
- {"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
- {"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
- {"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
- {"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
- {"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
- {"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64,
RD_FULL | WR_QPP) },
- {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256,
RD_FULL | WR_QPP) },
- {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL |
WR_QPP) },
- {"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL
| WR_QPP) },
- {"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64,
RD_FULL | WR_QPP) },
- {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256,
RD_FULL | WR_QPP) },
- {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128,
RD_FULL | WR_QPP) },
- {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512,
RD_FULL | WR_QPP) },
- {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL
| WR_QPP) },
- {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256,
RD_FULL | WR_QPP) },
- {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024,
RD_FULL | WR_QPP) },
- {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256,
RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
- {"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
- {"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
- {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
- {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
- {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
- {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0},
- {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD |
RD_DUAL},
- {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
- {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
- {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
- {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K},
- {"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K},
- {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
- {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
- {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
- {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
- {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP},
- {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP},
- {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
- {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
- {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
- {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
- {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
- {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
- {"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
- {"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
- {"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
- {"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
- {"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
- {"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
- {"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD |
RD_DUAL) },
- {"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
- {"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
- {"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
- {"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
- {"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
- {"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
- {"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
- {"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
- {"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
- {"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
- {"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */
- {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR},
- {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR},
- {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32,
SECT_4K | SST_WR},
- {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64,
SECT_4K | SST_WR},
- {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128,
SECT_4K},
- {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1,
SECT_4K | SST_WR},
- {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2,
SECT_4K | SST_WR},
- {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4,
SECT_4K | SST_WR},
- {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR},
- {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8,
SECT_4K},
- {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR},
- {"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR) },
- {"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR) },
- {"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32,
SECT_4K | SST_WR) },
- {"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64,
SECT_4K | SST_WR) },
- {"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128,
SECT_4K) },
- {"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1,
SECT_4K | SST_WR) },
- {"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2,
SECT_4K | SST_WR) },
- {"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4,
SECT_4K | SST_WR) },
- {"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR) },
- {"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8,
SECT_4K) },
- {"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR) }, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
- {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
- {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
- {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
- {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
- {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
- {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
- {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
- {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K},
- {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K},
- {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
- {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
- {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP | SECT_4K},
- {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
- {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K},
- {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K},
- {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
- {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
- {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP | SECT_4K},
- {"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
- {"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
- {"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
- {"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
- {"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
- {"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
- {"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP | SECT_4K) }, #endif {}, /* Empty entry to terminate the list */ /* diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 7f6e9ae..95ee5ac 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -165,7 +165,8 @@ bar_end: return flash->bank_curr; }
-static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0) +static int spi_flash_read_bar(struct spi_flash *flash,
const struct spi_flash_info *info)
{ u8 curr_bank = 0; int ret; @@ -173,7 +174,7 @@ static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0) if (flash->size <= SPI_FLASH_16MB_BOUN) goto bar_end;
- switch (idcode0) {
- switch (JEDEC_MFR(info)) { case SPI_FLASH_CFI_MFR_SPANSION: flash->bank_read_cmd = CMD_BANKADDR_BRRD; flash->bank_write_cmd = CMD_BANKADDR_BRWR; @@ -
924,9 +925,35 @@ static int micron_quad_enable(struct spi_flash *flash) } #endif
-static int set_quad_mode(struct spi_flash *flash, u8 idcode0) +static const struct spi_flash_info *spi_flash_read_id(struct spi_flash +*flash) {
- switch (idcode0) {
- int tmp;
- u8 id[5];
- const struct spi_flash_info *info;
- tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5);
- if (tmp < 0) {
printf("SF: error %d reading JEDEC ID\n", tmp);
return ERR_PTR(tmp);
- }
- info = spi_flash_ids;
- for (; info->name != NULL; info++) {
if (info->id_len) {
if (!memcmp(info->id, id, info->id_len))
return info;
}
- }
- printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
id[0], id[1], id[2]);
- return ERR_PTR(-ENODEV);
+}
+static int set_quad_mode(struct spi_flash *flash,
const struct spi_flash_info *info)
+{
- switch (JEDEC_MFR(info)) {
#ifdef CONFIG_SPI_FLASH_MACRONIX case SPI_FLASH_CFI_MFR_MACRONIX: return macronix_quad_enable(flash); @@ -941,7 +968,8 @@ static int set_quad_mode(struct spi_flash *flash, u8 idcode0) return micron_quad_enable(flash); #endif default:
printf("SF: Need set QEB func for %02x flash\n", idcode0);
printf("SF: Need set QEB func for %02x flash\n",
return -1; }JEDEC_MFR(info));
} @@ -1011,45 +1039,12 @@ static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi) int spi_flash_scan(struct spi_flash *flash) { struct spi_slave *spi = flash->spi;
- const struct spi_flash_params *params;
- u16 jedec, ext_jedec;
- u8 idcode[5];
- int ret;
- /* Read the ID codes */
- ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
- if (ret) {
printf("SF: Failed to get idcodes\n");
return ret;
- }
-#ifdef DEBUG
- printf("SF: Got idcodes\n");
- print_buffer(0, idcode, 1, sizeof(idcode), 0);
-#endif
- jedec = idcode[1] << 8 | idcode[2];
- ext_jedec = idcode[3] << 8 | idcode[4];
- /* Validate params from spi_flash_params table */
- params = spi_flash_params_table;
- for (; params->name != NULL; params++) {
if ((params->jedec >> 16) == idcode[0]) {
if ((params->jedec & 0xFFFF) == jedec) {
if (params->ext_jedec == 0)
break;
else if (params->ext_jedec == ext_jedec)
break;
}
}
- }
- const struct spi_flash_info *info = NULL;
- int ret = -1;
- if (!params->name) {
printf("SF: Unsupported flash IDs: ");
printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
idcode[0], jedec, ext_jedec);
return -EPROTONOSUPPORT;
- }
- info = spi_flash_read_id(flash);
- if (IS_ERR_OR_NULL(info))
return -ENOENT;
#ifdef CONFIG_SPI_FLASH_SPANSION /* @@ -1065,11 +1060,17 @@ int spi_flash_scan(struct spi_flash *flash) * sector that is not overlaid by the parameter sectors. * The uniform sector erase command has no effect on parameter sectors. */
- if ((jedec == 0x0219 || (jedec == 0x0220)) &&
(ext_jedec & 0xff00) == 0x4d00) {
if ((JEDEC_ID(info) == 0x0219 || (JEDEC_ID(info) == 0x0220)) &&
(JEDEC_EXT(info) & 0xff00) == 0x4d00) {
int ret;
u8 idcode[5];
u8 id[6];
/* Read the ID codes again, 5 bytes */
ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode,
sizeof(idcode));
if (ret)
return -EIO;
why are we reading id again, cant it be available as part of info?
/* Read the ID codes again, 6 bytes */ ret = spi_flash_cmd(flash->spi, CMD_READ_ID, id, sizeof(id)); if (ret)
@@ -1088,18 +1089,18 @@ int spi_flash_scan(struct spi_flash *flash) } #endif /* Flash powers up read-only, so clear BP# bits */
- if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
idcode[0] == SPI_FLASH_CFI_MFR_SST)
if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST)
write_sr(flash, 0);
/* Assign spi data */
- flash->name = params->name;
flash->name = info->name; flash->memory_map = spi->memory_map; flash->dual_flash = spi->option;
/* Assign spi flash flags */
- if (params->flags & SST_WR)
if (info->flags & SST_WR) flash->flags |= SNOR_F_SST_WR;
/* Assign spi_flash ops */
@@ -1118,7 +1119,7 @@ int spi_flash_scan(struct spi_flash *flash) #endif
/* lock hooks are flash specific - assign them based on idcode0 */
- switch (idcode[0]) {
- switch (JEDEC_MFR(info)) {
#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) case SPI_FLASH_CFI_MFR_STMICRO: case SPI_FLASH_CFI_MFR_SST: @@ -1128,28 +1129,26 @@ int spi_flash_scan(struct spi_flash *flash) #endif break; default:
debug("SF: Lock ops not supported for %02x flash\n",
idcode[0]);
debug("SF: Lock ops not supported for %02x flash\n",
+JEDEC_MFR(info)); }
/* Compute the flash size */ flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
- flash->page_size = info->page_size; /*
- The Spansion S25FL032P and S25FL064P have 256b pages, yet use
the * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with * the 0x4d00 Extended JEDEC code have 512b pages. All of the others * have 256b pages. */
- if (ext_jedec == 0x4d00) {
if ((jedec == 0x0215) || (jedec == 0x216) || (jedec == 0x220))
flash->page_size = 256;
else
- if (JEDEC_EXT(info) == 0x4d00) {
if ((JEDEC_ID(info) != 0x0215) &&
(JEDEC_ID(info) != 0x0216)) flash->page_size = 512;
- } else {
} flash->page_size <<= flash->shift;flash->page_size = 256;
- flash->sector_size = params->sector_size << flash->shift;
- flash->size = flash->sector_size * params->nr_sectors << flash->shift;
- flash->sector_size = info->sector_size << flash->shift;
- flash->size = flash->sector_size * info->nr_sectors << flash->shift;
This is incorrect, Dont do flash->shift again, as you already did above for sector size calculation. Doing this for second time causes double the actual size.
Thanks, Siva
#ifdef CONFIG_SF_DUAL_FLASH if (flash->dual_flash & SF_DUAL_STACKED_FLASH) flash->size <<= 1; @@ -1157,7 +1156,7 @@ int spi_flash_scan(struct spi_flash *flash)
#ifdef CONFIG_SPI_FLASH_USE_4K_SECTORS /* Compute erase sector and command */
- if (params->flags & SECT_4K) {
- if (info->flags & SECT_4K) { flash->erase_cmd = CMD_ERASE_4K; flash->erase_size = 4096 << flash->shift; } else
@@ -1174,13 +1173,13 @@ int spi_flash_scan(struct spi_flash *flash) flash->read_cmd = CMD_READ_ARRAY_FAST; if (spi->mode & SPI_RX_SLOW) flash->read_cmd = CMD_READ_ARRAY_SLOW;
- else if (spi->mode & SPI_RX_QUAD && params->flags & RD_QUAD)
- else if (spi->mode & SPI_RX_QUAD && info->flags & RD_QUAD) flash->read_cmd = CMD_READ_QUAD_OUTPUT_FAST;
- else if (spi->mode & SPI_RX_DUAL && params->flags & RD_DUAL)
else if (spi->mode & SPI_RX_DUAL && info->flags & RD_DUAL) flash->read_cmd = CMD_READ_DUAL_OUTPUT_FAST;
/* Look for write commands */
- if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD)
- if (info->flags & WR_QPP && spi->mode & SPI_TX_QUAD) flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; else /* Go for default supported write cmd */ @@ -1190,9
+1189,10 @@ int spi_flash_scan(struct spi_flash *flash) if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) || (flash->read_cmd == CMD_READ_QUAD_IO_FAST) || (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
ret = set_quad_mode(flash, idcode[0]);
if (ret) {ret = set_quad_mode(flash, info);
debug("SF: Fail to set QEB for %02x\n", idcode[0]);
debug("SF: Fail to set QEB for %02x\n",
} }JEDEC_MFR(info)); return -EINVAL;
@@ -1217,13 +1217,13 @@ int spi_flash_scan(struct spi_flash *flash) }
#ifdef CONFIG_SPI_FLASH_STMICRO
- if (params->flags & E_FSR)
- if (info->flags & E_FSR) flash->flags |= SNOR_F_USE_FSR;
#endif
/* Configure the BAR - discover bank cmds and read current bank */ #ifdef CONFIG_SPI_FLASH_BAR
- ret = spi_flash_read_bar(flash, idcode[0]);
- ret = spi_flash_read_bar(flash, info); if (ret < 0) return ret;
#endif diff --git a/include/linux/err.h b/include/linux/err.h index e4d22d5..22e5756 100644 --- a/include/linux/err.h +++ b/include/linux/err.h @@ -36,6 +36,11 @@ static inline long IS_ERR(const void *ptr) return IS_ERR_VALUE((unsigned long)ptr); }
+static inline bool IS_ERR_OR_NULL(const void *ptr) {
- return !ptr || IS_ERR_VALUE((unsigned long)ptr); }
/**
- ERR_CAST - Explicitly cast an error-valued pointer to another pointer type
- @ptr: The pointer to cast.
-- 1.9.1

On Wed, Nov 16, 2016 at 10:53 AM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Simon Glass sjg@chromium.org; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 01/21] sf: Adopt flash table INFO macro from Linux
INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes.
- Add JEDEC_ID
- Add JEDEC_EXT macro
- Add JEDEC_MFR
- spi_flash_params => spi_flash_info
- params => info
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com Signed-off-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sandbox.c | 10 +- drivers/mtd/spi/sf_internal.h | 26 +++-- drivers/mtd/spi/sf_params.c | 217 ++++++++++++++++++++++-------------------
drivers/mtd/spi/spi_flash.c | 136 +++++++++++++------------- include/linux/err.h | 5 + 5 files changed, 214 insertions(+), 180 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index f59134f..d68ee4a 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -88,7 +88,7 @@ struct sandbox_spi_flash { /* The current flash status (see STAT_XXX defines above) */ u16 status; /* Data describing the flash we're emulating */
const struct spi_flash_params *data;
const struct spi_flash_info *data; /* The file on disk to serv up data from */ int fd;
}; @@ -112,7 +112,7 @@ static int sandbox_sf_probe(struct udevice *dev) struct sandbox_spi_flash *sbsf = dev_get_priv(dev); const char *file; size_t len, idname_len;
const struct spi_flash_params *data;
const struct spi_flash_info *data; struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev); struct sandbox_state *state = state_get_current(); struct udevice *bus = dev->parent;
@@ -168,7 +168,7 @@ static int sandbox_sf_probe(struct udevice *dev) } debug("%s: device='%s'\n", __func__, spec);
for (data = spi_flash_params_table; data->name; data++) {
for (data = spi_flash_ids; data->name; data++) { len = strlen(data->name); if (idname_len != len) continue;
@@ -359,7 +359,9 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, debug(" id: off:%u tx:", sbsf->off); if (sbsf->off < IDCODE_LEN) { /* Extract correct byte from ID 0x00aabbcc */
id = sbsf->data->jedec >>
id = ((((sbsf->data)->id[0]) << 16) |
(((sbsf->data)->id[1]) << 8 |
((sbsf->data)->id[2]))) >> (8 * (IDCODE_LEN - 1 - sbsf->off));
Please, no magic 16 and 8 here and everywhere
These are existing macro exapnsions will update on future if required.
} else { id = 0;
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index cde4cfb..a9455ac 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -103,24 +103,36 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define CMD_SPANSION_RDAR 0x65 /* Read any device register */ #define CMD_SPANSION_WRAR 0x71 /* Write any device register */ #endif
+#define JEDEC_MFR(info) ((info)->id[0]) +#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) +#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
/**
- struct spi_flash_params - SPI/QSPI flash device params structure
- struct spi_flash_info - SPI/QSPI flash device params structure
- @name: Device name
([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
- @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
- @ext_jedec: Device ext_jedec ID
- @sector_size: Isn't necessarily a sector size from vendor,
the size listed here is what works with
CMD_ERASE_64K
- @nr_sectors: No.of sectors on this device
- @flags: Important param, for flash specific behaviour
*/ -struct spi_flash_params { +struct spi_flash_info { const char *name;
u32 jedec;
u16 ext_jedec;
/*
* This array stores the ID bytes.
* The first three bytes are the JEDIC ID.
* JEDEC ID zero means "no ID" (mostly older chips).
*/
u8 id[5];
u8 id_len;
u32 sector_size; u32 nr_sectors;
u16 page_size;
u16 flags;
#define SECT_4K BIT(0) #define E_FSR BIT(1) @@ -133,7 +145,7 @@ struct spi_flash_params { #define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO) };
-extern const struct spi_flash_params spi_flash_params_table[]; +extern const struct spi_flash_info spi_flash_ids[];
/* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); diff - -git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 5b50114..7fcc3bc 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -12,125 +12,140 @@
#include "sf_internal.h"
+/* Used when the "_ext_id" is two bytes at most */ +#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
.id = { \
((_jedec_id) >> 16) & 0xff, \
((_jedec_id) >> 8) & 0xff, \
(_jedec_id) & 0xff, \
((_ext_id) >> 8) & 0xff, \
(_ext_id) & 0xff, \
}, \
.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
.sector_size = (_sector_size), \
.nr_sectors = (_n_sectors), \
.page_size = 256, \
.flags = (_flags),
Is it just the default page size? Because, there are some Spansion parts with 512 bytes page size, I hope we are taking care of it in runtime and it is just the default one you are filling here, please confirm.
/* SPI/QSPI flash device params structure */ -const struct spi_flash_params spi_flash_params_table[] = { +const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
{"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4,
SECT_4K},
{"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8,
SECT_4K},
{"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8,
SECT_4K},
{"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16,
SECT_4K},
{"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32,
SECT_4K},
{"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64,
SECT_4K},
{"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128,
SECT_4K},
{"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K},
{"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K},
{"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K},
{"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4,
SECT_4K) },
{"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8,
SECT_4K) },
{"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8,
SECT_4K) },
{"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16,
SECT_4K) },
{"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32,
SECT_4K) },
{"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64,
SECT_4K) },
{"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128,
SECT_4K) },
{"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
{"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
{"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
#endif #ifdef CONFIG_SPI_FLASH_EON /* EON */
{"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
{"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K},
{"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
{"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0},
{"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
{"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
{"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
{"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
#endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
{"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
{"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
{"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
{"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
#endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
{"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0},
{"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0},
{"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0},
{"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
{"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
{"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
#endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
{"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0},
{"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
{"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
{"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
{"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
{"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
{"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP},
{"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512,
RD_FULL | WR_QPP},
{"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024,
RD_FULL | WR_QPP},
{"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP},
{"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
{"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
{"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
{"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
{"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
{"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
{"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP) },
{"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512,
RD_FULL | WR_QPP) },
{"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024,
RD_FULL | WR_QPP) },
{"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
{"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
{"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
{"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
{"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
{"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0},
{"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0},
{"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL |
WR_QPP},
{"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL |
WR_QPP},
{"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL |
WR_QPP},
{"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL |
WR_QPP},
{"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL |
WR_QPP},
{"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL |
WR_QPP},
{"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL |
WR_QPP},
{"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL |
WR_QPP},
{"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
{"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
{"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
{"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
{"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
{"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
{"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64,
RD_FULL | WR_QPP) },
{"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256,
RD_FULL | WR_QPP) },
{"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL |
WR_QPP) },
{"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL
| WR_QPP) },
{"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64,
RD_FULL | WR_QPP) },
{"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256,
RD_FULL | WR_QPP) },
{"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128,
RD_FULL | WR_QPP) },
{"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512,
RD_FULL | WR_QPP) },
{"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL
| WR_QPP) },
{"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256,
RD_FULL | WR_QPP) },
{"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024,
RD_FULL | WR_QPP) },
{"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256,
RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
{"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
{"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
{"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
{"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
{"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
{"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0},
{"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD |
RD_DUAL},
{"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
{"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
{"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
{"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K},
{"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K},
{"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
{"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
{"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
{"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
{"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
{"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
{"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD |
RD_DUAL) },
{"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
{"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
{"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
{"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
{"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
{"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
{"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
{"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
{"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
{"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
{"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */
{"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR},
{"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR},
{"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32,
SECT_4K | SST_WR},
{"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64,
SECT_4K | SST_WR},
{"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128,
SECT_4K},
{"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1,
SECT_4K | SST_WR},
{"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2,
SECT_4K | SST_WR},
{"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4,
SECT_4K | SST_WR},
{"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR},
{"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8,
SECT_4K},
{"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR},
{"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR) },
{"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR) },
{"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32,
SECT_4K | SST_WR) },
{"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64,
SECT_4K | SST_WR) },
{"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128,
SECT_4K) },
{"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1,
SECT_4K | SST_WR) },
{"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2,
SECT_4K | SST_WR) },
{"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4,
SECT_4K | SST_WR) },
{"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR) },
{"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8,
SECT_4K) },
{"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR) }, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
{"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
{"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
{"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
{"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
{"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
{"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
{"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
{"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP | SECT_4K},
{"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
{"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
{"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
{"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
{"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
{"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
{"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
{"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP | SECT_4K) }, #endif {}, /* Empty entry to terminate the list */ /* diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 7f6e9ae..95ee5ac 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -165,7 +165,8 @@ bar_end: return flash->bank_curr; }
-static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0) +static int spi_flash_read_bar(struct spi_flash *flash,
const struct spi_flash_info *info)
{ u8 curr_bank = 0; int ret; @@ -173,7 +174,7 @@ static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0) if (flash->size <= SPI_FLASH_16MB_BOUN) goto bar_end;
switch (idcode0) {
switch (JEDEC_MFR(info)) { case SPI_FLASH_CFI_MFR_SPANSION: flash->bank_read_cmd = CMD_BANKADDR_BRRD; flash->bank_write_cmd = CMD_BANKADDR_BRWR; @@ -
924,9 +925,35 @@ static int micron_quad_enable(struct spi_flash *flash) } #endif
-static int set_quad_mode(struct spi_flash *flash, u8 idcode0) +static const struct spi_flash_info *spi_flash_read_id(struct spi_flash +*flash) {
switch (idcode0) {
int tmp;
u8 id[5];
const struct spi_flash_info *info;
tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5);
if (tmp < 0) {
printf("SF: error %d reading JEDEC ID\n", tmp);
return ERR_PTR(tmp);
}
info = spi_flash_ids;
for (; info->name != NULL; info++) {
if (info->id_len) {
if (!memcmp(info->id, id, info->id_len))
return info;
}
}
printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
id[0], id[1], id[2]);
return ERR_PTR(-ENODEV);
+}
+static int set_quad_mode(struct spi_flash *flash,
const struct spi_flash_info *info)
+{
switch (JEDEC_MFR(info)) {
#ifdef CONFIG_SPI_FLASH_MACRONIX case SPI_FLASH_CFI_MFR_MACRONIX: return macronix_quad_enable(flash); @@ -941,7 +968,8 @@ static int set_quad_mode(struct spi_flash *flash, u8 idcode0) return micron_quad_enable(flash); #endif default:
printf("SF: Need set QEB func for %02x flash\n", idcode0);
printf("SF: Need set QEB func for %02x flash\n",
JEDEC_MFR(info)); return -1; }
} @@ -1011,45 +1039,12 @@ static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi) int spi_flash_scan(struct spi_flash *flash) { struct spi_slave *spi = flash->spi;
const struct spi_flash_params *params;
u16 jedec, ext_jedec;
u8 idcode[5];
int ret;
/* Read the ID codes */
ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
if (ret) {
printf("SF: Failed to get idcodes\n");
return ret;
}
-#ifdef DEBUG
printf("SF: Got idcodes\n");
print_buffer(0, idcode, 1, sizeof(idcode), 0);
-#endif
jedec = idcode[1] << 8 | idcode[2];
ext_jedec = idcode[3] << 8 | idcode[4];
/* Validate params from spi_flash_params table */
params = spi_flash_params_table;
for (; params->name != NULL; params++) {
if ((params->jedec >> 16) == idcode[0]) {
if ((params->jedec & 0xFFFF) == jedec) {
if (params->ext_jedec == 0)
break;
else if (params->ext_jedec == ext_jedec)
break;
}
}
}
const struct spi_flash_info *info = NULL;
int ret = -1;
if (!params->name) {
printf("SF: Unsupported flash IDs: ");
printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
idcode[0], jedec, ext_jedec);
return -EPROTONOSUPPORT;
}
info = spi_flash_read_id(flash);
if (IS_ERR_OR_NULL(info))
return -ENOENT;
#ifdef CONFIG_SPI_FLASH_SPANSION /* @@ -1065,11 +1060,17 @@ int spi_flash_scan(struct spi_flash *flash) * sector that is not overlaid by the parameter sectors. * The uniform sector erase command has no effect on parameter sectors. */
if ((jedec == 0x0219 || (jedec == 0x0220)) &&
(ext_jedec & 0xff00) == 0x4d00) {
if ((JEDEC_ID(info) == 0x0219 || (JEDEC_ID(info) == 0x0220)) &&
(JEDEC_EXT(info) & 0xff00) == 0x4d00) { int ret;
u8 idcode[5]; u8 id[6];
/* Read the ID codes again, 5 bytes */
ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode,
sizeof(idcode));
if (ret)
return -EIO;
why are we reading id again, cant it be available as part of info?
Yes, but I can say this is removable code getting idcodes from info it's again a separate code task so, for the proper bisectable I am reading the idcode based on the existing code logic. of-course this is removing in later patch.
/* Read the ID codes again, 6 bytes */ ret = spi_flash_cmd(flash->spi, CMD_READ_ID, id, sizeof(id)); if (ret)
@@ -1088,18 +1089,18 @@ int spi_flash_scan(struct spi_flash *flash) } #endif /* Flash powers up read-only, so clear BP# bits */
if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
idcode[0] == SPI_FLASH_CFI_MFR_SST)
if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) write_sr(flash, 0); /* Assign spi data */
flash->name = params->name;
flash->name = info->name; flash->memory_map = spi->memory_map; flash->dual_flash = spi->option; /* Assign spi flash flags */
if (params->flags & SST_WR)
if (info->flags & SST_WR) flash->flags |= SNOR_F_SST_WR; /* Assign spi_flash ops */
@@ -1118,7 +1119,7 @@ int spi_flash_scan(struct spi_flash *flash) #endif
/* lock hooks are flash specific - assign them based on idcode0 */
switch (idcode[0]) {
switch (JEDEC_MFR(info)) {
#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) case SPI_FLASH_CFI_MFR_STMICRO: case SPI_FLASH_CFI_MFR_SST: @@ -1128,28 +1129,26 @@ int spi_flash_scan(struct spi_flash *flash) #endif break; default:
debug("SF: Lock ops not supported for %02x flash\n",
idcode[0]);
debug("SF: Lock ops not supported for %02x flash\n",
+JEDEC_MFR(info)); }
/* Compute the flash size */ flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
flash->page_size = info->page_size; /* * The Spansion S25FL032P and S25FL064P have 256b pages, yet use
the * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with * the 0x4d00 Extended JEDEC code have 512b pages. All of the others * have 256b pages. */
if (ext_jedec == 0x4d00) {
if ((jedec == 0x0215) || (jedec == 0x216) || (jedec == 0x220))
flash->page_size = 256;
else
if (JEDEC_EXT(info) == 0x4d00) {
if ((JEDEC_ID(info) != 0x0215) &&
(JEDEC_ID(info) != 0x0216)) flash->page_size = 512;
} else {
flash->page_size = 256; } flash->page_size <<= flash->shift;
flash->sector_size = params->sector_size << flash->shift;
flash->size = flash->sector_size * params->nr_sectors << flash->shift;
flash->sector_size = info->sector_size << flash->shift;
flash->size = flash->sector_size * info->nr_sectors << flash->shift;
This is incorrect, Dont do flash->shift again, as you already did above for sector size calculation. Doing this for second time causes double the actual size.
How come? This is an the existing code with params replaced by info.
thanks!

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 6:09 PM To: Siva Durga Prasad Paladugu sivadur@xilinx.com Cc: u-boot@lists.denx.de; Michal Simek michal.simek@xilinx.com Subject: Re: [U-Boot] [PATCH v6 01/21] sf: Adopt flash table INFO macro from Linux
On Wed, Nov 16, 2016 at 10:53 AM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Simon Glass
Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com;
Vignesh R
vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal
Simek
michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 01/21] sf: Adopt flash table INFO macro from Linux
INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes.
- Add JEDEC_ID
- Add JEDEC_EXT macro
- Add JEDEC_MFR
- spi_flash_params => spi_flash_info
- params => info
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com Signed-off-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sandbox.c | 10 +- drivers/mtd/spi/sf_internal.h | 26 +++-- drivers/mtd/spi/sf_params.c | 217 ++++++++++++++++++++++---------------
drivers/mtd/spi/spi_flash.c | 136 +++++++++++++------------- include/linux/err.h | 5 + 5 files changed, 214 insertions(+), 180 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index f59134f..d68ee4a 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -88,7 +88,7 @@ struct sandbox_spi_flash { /* The current flash status (see STAT_XXX defines above) */ u16 status; /* Data describing the flash we're emulating */
const struct spi_flash_params *data;
const struct spi_flash_info *data; /* The file on disk to serv up data from */ int fd;
}; @@ -112,7 +112,7 @@ static int sandbox_sf_probe(struct udevice *dev) struct sandbox_spi_flash *sbsf = dev_get_priv(dev); const char *file; size_t len, idname_len;
const struct spi_flash_params *data;
const struct spi_flash_info *data; struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev); struct sandbox_state *state = state_get_current(); struct udevice *bus = dev->parent; @@ -168,7 +168,7 @@ static
int sandbox_sf_probe(struct udevice *dev) } debug("%s: device='%s'\n", __func__, spec);
for (data = spi_flash_params_table; data->name; data++) {
for (data = spi_flash_ids; data->name; data++) { len = strlen(data->name); if (idname_len != len) continue;
@@ -359,7 +359,9 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, debug(" id: off:%u tx:", sbsf->off); if (sbsf->off < IDCODE_LEN) { /* Extract correct byte from ID 0x00aabbcc */
id = sbsf->data->jedec >>
id = ((((sbsf->data)->id[0]) << 16) |
(((sbsf->data)->id[1]) << 8 |
((sbsf->data)->id[2]))) >> (8 * (IDCODE_LEN - 1 -
sbsf->off));
Please, no magic 16 and 8 here and everywhere
These are existing macro exapnsions will update on future if required.
Its upto you.
} else { id = 0; diff --git
a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index cde4cfb..a9455ac 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -103,24 +103,36 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define CMD_SPANSION_RDAR 0x65 /* Read any device register */ #define CMD_SPANSION_WRAR 0x71 /* Write any device register */ #endif
+#define JEDEC_MFR(info) ((info)->id[0]) +#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) +#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
/**
- struct spi_flash_params - SPI/QSPI flash device params structure
- struct spi_flash_info - SPI/QSPI flash device params structure
- @name: Device name
([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
- @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
- @ext_jedec: Device ext_jedec ID
- @sector_size: Isn't necessarily a sector size from vendor,
the size listed here is what works with
CMD_ERASE_64K
- @nr_sectors: No.of sectors on this device
- @flags: Important param, for flash specific behaviour
*/ -struct spi_flash_params { +struct spi_flash_info { const char *name;
u32 jedec;
u16 ext_jedec;
/*
* This array stores the ID bytes.
* The first three bytes are the JEDIC ID.
* JEDEC ID zero means "no ID" (mostly older chips).
*/
u8 id[5];
u8 id_len;
u32 sector_size; u32 nr_sectors;
u16 page_size;
u16 flags;
#define SECT_4K BIT(0) #define E_FSR BIT(1) @@ -133,7 +145,7 @@ struct spi_flash_params { #define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO) };
-extern const struct spi_flash_params spi_flash_params_table[]; +extern const struct spi_flash_info spi_flash_ids[];
/* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); diff - -git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 5b50114..7fcc3bc 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -12,125 +12,140 @@
#include "sf_internal.h"
+/* Used when the "_ext_id" is two bytes at most */ +#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
.id = { \
((_jedec_id) >> 16) & 0xff, \
((_jedec_id) >> 8) & 0xff, \
(_jedec_id) & 0xff, \
((_ext_id) >> 8) & 0xff, \
(_ext_id) & 0xff, \
}, \
.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
.sector_size = (_sector_size), \
.nr_sectors = (_n_sectors), \
.page_size = 256, \
.flags = (_flags),
Is it just the default page size? Because, there are some Spansion parts with 512 bytes page size, I hope we are taking care of it in runtime
and it is just the default one you are filling here, please confirm.
/* SPI/QSPI flash device params structure */ -const struct spi_flash_params spi_flash_params_table[] = { +const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
{"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4,
SECT_4K},
{"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8,
SECT_4K},
{"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8,
SECT_4K},
{"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16,
SECT_4K},
{"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32,
SECT_4K},
{"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64,
SECT_4K},
{"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128,
SECT_4K},
{"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K},
{"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K},
{"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K},
{"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4,
SECT_4K) },
{"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8,
SECT_4K) },
{"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8,
SECT_4K) },
{"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16,
SECT_4K) },
{"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32,
SECT_4K) },
{"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64,
SECT_4K) },
{"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128,
SECT_4K) },
{"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
{"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
{"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
#endif #ifdef CONFIG_SPI_FLASH_EON /* EON */
{"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
{"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K},
{"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
{"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0},
{"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
{"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
{"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
{"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
#endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
{"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
{"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
{"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
{"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
#endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
{"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0},
{"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0},
{"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0},
{"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
{"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
{"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
#endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
{"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0},
{"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
{"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
{"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
{"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
{"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
{"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP},
{"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512,
RD_FULL | WR_QPP},
{"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024,
RD_FULL | WR_QPP},
{"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP},
{"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
{"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
{"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
{"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
{"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
{"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
{"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP) },
{"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512,
RD_FULL | WR_QPP) },
{"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024,
RD_FULL | WR_QPP) },
{"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
{"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
{"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
{"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
{"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
{"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0},
{"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0},
{"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL |
WR_QPP},
{"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL |
WR_QPP},
{"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL |
WR_QPP},
{"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL |
WR_QPP},
{"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL |
WR_QPP},
{"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL |
WR_QPP},
{"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL |
WR_QPP},
{"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL |
WR_QPP},
{"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
{"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
{"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
{"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
{"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
{"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
{"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64,
RD_FULL | WR_QPP) },
{"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256,
RD_FULL | WR_QPP) },
{"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL |
WR_QPP) },
{"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL
| WR_QPP) },
{"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64,
RD_FULL | WR_QPP) },
{"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256,
RD_FULL | WR_QPP) },
{"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128,
RD_FULL | WR_QPP) },
{"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512,
RD_FULL | WR_QPP) },
{"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL
| WR_QPP) },
{"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256,
RD_FULL | WR_QPP) },
{"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024,
RD_FULL | WR_QPP) },
{"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256,
RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
{"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
{"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
{"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
{"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
{"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
{"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0},
{"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD |
RD_DUAL},
{"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
{"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
{"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
{"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K},
{"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K},
{"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
{"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
{"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
{"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
{"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
{"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
{"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD |
RD_DUAL) },
{"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
{"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
{"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
{"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
{"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
{"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
{"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
{"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
{"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
{"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
{"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */
{"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR},
{"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR},
{"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32,
SECT_4K | SST_WR},
{"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64,
SECT_4K | SST_WR},
{"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128,
SECT_4K},
{"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1,
SECT_4K | SST_WR},
{"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2,
SECT_4K | SST_WR},
{"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4,
SECT_4K | SST_WR},
{"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR},
{"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8,
SECT_4K},
{"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR},
{"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR) },
{"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR) },
{"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32,
SECT_4K | SST_WR) },
{"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64,
SECT_4K | SST_WR) },
{"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128,
SECT_4K) },
{"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1,
SECT_4K | SST_WR) },
{"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2,
SECT_4K | SST_WR) },
{"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4,
SECT_4K | SST_WR) },
{"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR) },
{"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8,
SECT_4K) },
{"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR) }, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
{"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
{"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
{"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
{"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
{"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
{"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
{"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
{"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP | SECT_4K},
{"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
{"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
{"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
{"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
{"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
{"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
{"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
{"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP | SECT_4K) }, #endif {}, /* Empty entry to terminate the list */ /* diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 7f6e9ae..95ee5ac 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -165,7 +165,8 @@ bar_end: return flash->bank_curr; }
-static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0) +static int spi_flash_read_bar(struct spi_flash *flash,
const struct spi_flash_info *info)
{ u8 curr_bank = 0; int ret; @@ -173,7 +174,7 @@ static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0) if (flash->size <= SPI_FLASH_16MB_BOUN) goto bar_end;
switch (idcode0) {
switch (JEDEC_MFR(info)) { case SPI_FLASH_CFI_MFR_SPANSION: flash->bank_read_cmd = CMD_BANKADDR_BRRD; flash->bank_write_cmd = CMD_BANKADDR_BRWR; @@ -
924,9 +925,35 @@ static int micron_quad_enable(struct spi_flash *flash) } #endif
-static int set_quad_mode(struct spi_flash *flash, u8 idcode0) +static const struct spi_flash_info *spi_flash_read_id(struct +spi_flash +*flash) {
switch (idcode0) {
int tmp;
u8 id[5];
const struct spi_flash_info *info;
tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5);
if (tmp < 0) {
printf("SF: error %d reading JEDEC ID\n", tmp);
return ERR_PTR(tmp);
}
info = spi_flash_ids;
for (; info->name != NULL; info++) {
if (info->id_len) {
if (!memcmp(info->id, id, info->id_len))
return info;
}
}
printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
id[0], id[1], id[2]);
return ERR_PTR(-ENODEV);
+}
+static int set_quad_mode(struct spi_flash *flash,
const struct spi_flash_info *info) {
switch (JEDEC_MFR(info)) {
#ifdef CONFIG_SPI_FLASH_MACRONIX case SPI_FLASH_CFI_MFR_MACRONIX: return macronix_quad_enable(flash); @@ -941,7 +968,8 @@ static int set_quad_mode(struct spi_flash *flash, u8 idcode0) return micron_quad_enable(flash); #endif default:
printf("SF: Need set QEB func for %02x flash\n", idcode0);
printf("SF: Need set QEB func for %02x flash\n",
JEDEC_MFR(info)); return -1; }
} @@ -1011,45 +1039,12 @@ static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi) int spi_flash_scan(struct spi_flash *flash) { struct spi_slave *spi = flash->spi;
const struct spi_flash_params *params;
u16 jedec, ext_jedec;
u8 idcode[5];
int ret;
/* Read the ID codes */
ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
if (ret) {
printf("SF: Failed to get idcodes\n");
return ret;
}
-#ifdef DEBUG
printf("SF: Got idcodes\n");
print_buffer(0, idcode, 1, sizeof(idcode), 0);
-#endif
jedec = idcode[1] << 8 | idcode[2];
ext_jedec = idcode[3] << 8 | idcode[4];
/* Validate params from spi_flash_params table */
params = spi_flash_params_table;
for (; params->name != NULL; params++) {
if ((params->jedec >> 16) == idcode[0]) {
if ((params->jedec & 0xFFFF) == jedec) {
if (params->ext_jedec == 0)
break;
else if (params->ext_jedec == ext_jedec)
break;
}
}
}
const struct spi_flash_info *info = NULL;
int ret = -1;
if (!params->name) {
printf("SF: Unsupported flash IDs: ");
printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
idcode[0], jedec, ext_jedec);
return -EPROTONOSUPPORT;
}
info = spi_flash_read_id(flash);
if (IS_ERR_OR_NULL(info))
return -ENOENT;
#ifdef CONFIG_SPI_FLASH_SPANSION /* @@ -1065,11 +1060,17 @@ int spi_flash_scan(struct spi_flash *flash) * sector that is not overlaid by the parameter sectors. * The uniform sector erase command has no effect on parameter sectors. */
if ((jedec == 0x0219 || (jedec == 0x0220)) &&
(ext_jedec & 0xff00) == 0x4d00) {
if ((JEDEC_ID(info) == 0x0219 || (JEDEC_ID(info) == 0x0220)) &&
(JEDEC_EXT(info) & 0xff00) == 0x4d00) { int ret;
u8 idcode[5]; u8 id[6];
/* Read the ID codes again, 5 bytes */
ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode,
sizeof(idcode));
if (ret)
return -EIO;
why are we reading id again, cant it be available as part of info?
Yes, but I can say this is removable code getting idcodes from info it's again a separate code task so, for the proper bisectable I am reading the idcode based on the existing code logic. of-course this is removing in later patch.
OK That’s fine. while reviewing this 1/21, I am not aware that its removed in follow up patches in series.
/* Read the ID codes again, 6 bytes */ ret = spi_flash_cmd(flash->spi, CMD_READ_ID, id, sizeof(id)); if (ret)
@@ -1088,18 +1089,18 @@ int spi_flash_scan(struct spi_flash *flash) } #endif /* Flash powers up read-only, so clear BP# bits */
if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
idcode[0] == SPI_FLASH_CFI_MFR_SST)
if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) write_sr(flash, 0); /* Assign spi data */
flash->name = params->name;
flash->name = info->name; flash->memory_map = spi->memory_map; flash->dual_flash = spi->option; /* Assign spi flash flags */
if (params->flags & SST_WR)
if (info->flags & SST_WR) flash->flags |= SNOR_F_SST_WR; /* Assign spi_flash ops */
@@ -1118,7 +1119,7 @@ int spi_flash_scan(struct spi_flash *flash) #endif
/* lock hooks are flash specific - assign them based on idcode0 */
switch (idcode[0]) {
switch (JEDEC_MFR(info)) {
#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) case SPI_FLASH_CFI_MFR_STMICRO: case SPI_FLASH_CFI_MFR_SST: @@ -1128,28 +1129,26 @@ int spi_flash_scan(struct spi_flash *flash)
#endif
break; default:
debug("SF: Lock ops not supported for %02x flash\n",
idcode[0]);
debug("SF: Lock ops not supported for %02x flash\n",
+JEDEC_MFR(info)); }
/* Compute the flash size */ flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1
: 0;
flash->page_size = info->page_size; /* * The Spansion S25FL032P and S25FL064P have 256b pages, yet
use the * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with * the 0x4d00 Extended JEDEC code have 512b pages. All of the others * have 256b pages. */
if (ext_jedec == 0x4d00) {
if ((jedec == 0x0215) || (jedec == 0x216) || (jedec == 0x220))
flash->page_size = 256;
else
if (JEDEC_EXT(info) == 0x4d00) {
if ((JEDEC_ID(info) != 0x0215) &&
(JEDEC_ID(info) != 0x0216)) flash->page_size = 512;
} else {
flash->page_size = 256; } flash->page_size <<= flash->shift;
flash->sector_size = params->sector_size << flash->shift;
flash->size = flash->sector_size * params->nr_sectors << flash->shift;
flash->sector_size = info->sector_size << flash->shift;
flash->size = flash->sector_size * info->nr_sectors <<
- flash->shift;
This is incorrect, Dont do flash->shift again, as you already did above for
sector size calculation.
Doing this for second time causes double the actual size.
How come? This is an the existing code with params replaced by info.
Probably, the issue exist in old code as well, I found while reviewing this. You are doing shift two times, which will result double the actual size.
Thanks, Siva
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.

Hi,
-----Original Message----- From: Siva Durga Prasad Paladugu Sent: Wednesday, November 16, 2016 6:21 PM To: 'Jagan Teki' jagan@openedev.com Cc: u-boot@lists.denx.de; Michal Simek michal.simek@xilinx.com Subject: RE: [U-Boot] [PATCH v6 01/21] sf: Adopt flash table INFO macro from Linux
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 6:09 PM To: Siva Durga Prasad Paladugu sivadur@xilinx.com Cc: u-boot@lists.denx.de; Michal Simek michal.simek@xilinx.com Subject: Re: [U-Boot] [PATCH v6 01/21] sf: Adopt flash table INFO macro from Linux
On Wed, Nov 16, 2016 at 10:53 AM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Simon Glass
Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com;
Vignesh R
vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal
Simek
michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 01/21] sf: Adopt flash table INFO macro from Linux
INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes.
- Add JEDEC_ID
- Add JEDEC_EXT macro
- Add JEDEC_MFR
- spi_flash_params => spi_flash_info
- params => info
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com Signed-off-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sandbox.c | 10 +- drivers/mtd/spi/sf_internal.h | 26 +++-- drivers/mtd/spi/sf_params.c | 217 ++++++++++++++++++++++-------------
--
drivers/mtd/spi/spi_flash.c | 136 +++++++++++++------------- include/linux/err.h | 5 + 5 files changed, 214 insertions(+), 180 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index f59134f..d68ee4a 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -88,7 +88,7 @@ struct sandbox_spi_flash { /* The current flash status (see STAT_XXX defines above) */ u16 status; /* Data describing the flash we're emulating */
const struct spi_flash_params *data;
const struct spi_flash_info *data; /* The file on disk to serv up data from */ int fd;
}; @@ -112,7 +112,7 @@ static int sandbox_sf_probe(struct udevice *dev) struct sandbox_spi_flash *sbsf = dev_get_priv(dev); const char *file; size_t len, idname_len;
const struct spi_flash_params *data;
const struct spi_flash_info *data; struct sandbox_spi_flash_plat_data *pdata =
dev_get_platdata(dev);
struct sandbox_state *state = state_get_current(); struct udevice *bus = dev->parent; @@ -168,7 +168,7 @@ static
int sandbox_sf_probe(struct udevice *dev) } debug("%s: device='%s'\n", __func__, spec);
for (data = spi_flash_params_table; data->name; data++) {
for (data = spi_flash_ids; data->name; data++) { len = strlen(data->name); if (idname_len != len) continue;
@@ -359,7 +359,9 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, debug(" id: off:%u tx:", sbsf->off); if (sbsf->off < IDCODE_LEN) { /* Extract correct byte from ID 0x00aabbcc */
id = sbsf->data->jedec >>
id = ((((sbsf->data)->id[0]) << 16) |
(((sbsf->data)->id[1]) << 8 |
((sbsf->data)->id[2]))) >> (8 * (IDCODE_LEN - 1 -
sbsf->off));
Please, no magic 16 and 8 here and everywhere
These are existing macro exapnsions will update on future if required.
Its upto you.
} else { id = 0; diff --git
a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index cde4cfb..a9455ac 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -103,24 +103,36 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define CMD_SPANSION_RDAR 0x65 /* Read any device register */ #define CMD_SPANSION_WRAR 0x71 /* Write any device register */ #endif
+#define JEDEC_MFR(info) ((info)->id[0]) +#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) +#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
/**
- struct spi_flash_params - SPI/QSPI flash device params
structure
- struct spi_flash_info - SPI/QSPI flash device params structure
- @name: Device name
([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
- @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
- @ext_jedec: Device ext_jedec ID
- @sector_size: Isn't necessarily a sector size from vendor,
the size listed here is what works with
CMD_ERASE_64K
- @nr_sectors: No.of sectors on this device
- @flags: Important param, for flash specific behaviour
*/ -struct spi_flash_params { +struct spi_flash_info { const char *name;
u32 jedec;
u16 ext_jedec;
/*
* This array stores the ID bytes.
* The first three bytes are the JEDIC ID.
* JEDEC ID zero means "no ID" (mostly older chips).
*/
u8 id[5];
u8 id_len;
u32 sector_size; u32 nr_sectors;
u16 page_size;
u16 flags;
#define SECT_4K BIT(0) #define E_FSR BIT(1) @@ -133,7 +145,7 @@ struct spi_flash_params { #define RD_FULL (RD_QUAD | RD_DUAL | RD_QUADIO | RD_DUALIO) };
-extern const struct spi_flash_params spi_flash_params_table[]; +extern const struct spi_flash_info spi_flash_ids[];
/* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); diff - -git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 5b50114..7fcc3bc 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -12,125 +12,140 @@
#include "sf_internal.h"
+/* Used when the "_ext_id" is two bytes at most */ +#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
.id = { \
((_jedec_id) >> 16) & 0xff, \
((_jedec_id) >> 8) & 0xff, \
(_jedec_id) & 0xff, \
((_ext_id) >> 8) & 0xff, \
(_ext_id) & 0xff, \
}, \
.id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
.sector_size = (_sector_size), \
.nr_sectors = (_n_sectors), \
.page_size = 256, \
.flags = (_flags),
Is it just the default page size? Because, there are some Spansion parts with 512 bytes page size, I hope we are taking care of it in runtime
and it is just the default one you are filling here, please confirm.
/* SPI/QSPI flash device params structure */ -const struct spi_flash_params spi_flash_params_table[] = { +const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
{"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4,
SECT_4K},
{"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8,
SECT_4K},
{"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8,
SECT_4K},
{"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16,
SECT_4K},
{"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32,
SECT_4K},
{"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64,
SECT_4K},
{"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128,
SECT_4K},
{"AT25DF321A", 0x1f4701, 0x0, 64 * 1024, 64, SECT_4K},
{"AT25DF321", 0x1f4700, 0x0, 64 * 1024, 64, SECT_4K},
{"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, SECT_4K},
{"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4,
SECT_4K) },
{"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8,
SECT_4K) },
{"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8,
SECT_4K) },
{"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16,
SECT_4K) },
{"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32,
SECT_4K) },
{"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64,
SECT_4K) },
{"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128,
SECT_4K) },
{"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
{"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
{"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
#endif #ifdef CONFIG_SPI_FLASH_EON /* EON */
{"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, 0},
{"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, SECT_4K},
{"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, 0},
{"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, 0},
{"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
{"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
{"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
{"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
#endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
{"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, SECT_4K},
{"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, SECT_4K},
{"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
{"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
#endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
{"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, 0},
{"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, 0},
{"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, 0},
{"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
{"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
{"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
#endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
{"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, 0},
{"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, 0},
{"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, 0},
{"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, 0},
{"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, 0},
{"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, 0},
{"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP},
{"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512,
RD_FULL | WR_QPP},
{"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024,
RD_FULL | WR_QPP},
{"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP},
{"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
{"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
{"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
{"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
{"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
{"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
{"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP) },
{"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512,
RD_FULL | WR_QPP) },
{"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024,
RD_FULL | WR_QPP) },
{"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
{"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, 0},
{"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, 0},
{"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, 0},
{"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, 0},
{"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, 0},
{"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, 0},
{"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL |
WR_QPP},
{"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL |
WR_QPP},
{"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL |
WR_QPP},
{"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL |
WR_QPP},
{"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL |
WR_QPP},
{"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL |
WR_QPP},
{"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL |
WR_QPP},
{"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL |
WR_QPP},
{"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL |
WR_QPP},
{"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
{"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
{"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
{"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
{"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
{"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
{"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64,
RD_FULL | WR_QPP) },
{"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256,
RD_FULL | WR_QPP) },
{"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL
|
WR_QPP) },
{"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL
| WR_QPP) },
{"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64,
RD_FULL | WR_QPP) },
{"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256,
RD_FULL | WR_QPP) },
{"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128,
RD_FULL | WR_QPP) },
{"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512,
RD_FULL | WR_QPP) },
{"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL
| WR_QPP) },
{"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256,
RD_FULL | WR_QPP) },
{"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024,
RD_FULL | WR_QPP) },
{"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256,
RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
{"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0},
{"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0},
{"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0},
{"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0},
{"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0},
{"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0},
{"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_QUAD |
RD_DUAL},
{"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0},
{"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0},
{"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0},
{"M25PX64", 0x207117, 0x0, 64 * 1024, 128, SECT_4K},
{"N25Q016A", 0x20bb15, 0x0, 64 * 1024, 32, SECT_4K},
{"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP},
{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K},
{"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
{"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
{"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
{"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
{"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
{"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
{"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD |
RD_DUAL) },
{"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
{"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
{"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
{"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
{"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
{"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
{"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
{"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
{"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
{"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
{"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
{"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */
{"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR},
{"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR},
{"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32,
SECT_4K | SST_WR},
{"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64,
SECT_4K | SST_WR},
{"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128,
SECT_4K},
{"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1,
SECT_4K | SST_WR},
{"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2,
SECT_4K | SST_WR},
{"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4,
SECT_4K | SST_WR},
{"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR},
{"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8,
SECT_4K},
{"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR},
{"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR) },
{"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR) },
{"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32,
SECT_4K | SST_WR) },
{"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64,
SECT_4K | SST_WR) },
{"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128,
SECT_4K) },
{"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1,
SECT_4K | SST_WR) },
{"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2,
SECT_4K | SST_WR) },
{"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4,
SECT_4K | SST_WR) },
{"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR) },
{"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8,
SECT_4K) },
{"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR) }, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
{"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0},
{"W25P16", 0xef2015, 0x0, 64 * 1024, 32, 0},
{"W25P32", 0xef2016, 0x0, 64 * 1024, 64, 0},
{"W25X40", 0xef3013, 0x0, 64 * 1024, 8, SECT_4K},
{"W25X16", 0xef3015, 0x0, 64 * 1024, 32, SECT_4K},
{"W25X32", 0xef3016, 0x0, 64 * 1024, 64, SECT_4K},
{"W25X64", 0xef3017, 0x0, 64 * 1024, 128, SECT_4K},
{"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K},
{"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP | SECT_4K},
{"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
{"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
{"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
{"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
{"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
{"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
{"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
{"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
{"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP | SECT_4K) }, #endif {}, /* Empty entry to terminate the list */ /* diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 7f6e9ae..95ee5ac 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -165,7 +165,8 @@ bar_end: return flash->bank_curr; }
-static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0) +static int spi_flash_read_bar(struct spi_flash *flash,
const struct spi_flash_info *info)
{ u8 curr_bank = 0; int ret; @@ -173,7 +174,7 @@ static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0) if (flash->size <= SPI_FLASH_16MB_BOUN) goto bar_end;
switch (idcode0) {
switch (JEDEC_MFR(info)) { case SPI_FLASH_CFI_MFR_SPANSION: flash->bank_read_cmd = CMD_BANKADDR_BRRD; flash->bank_write_cmd = CMD_BANKADDR_BRWR; @@ -
924,9 +925,35 @@ static int micron_quad_enable(struct spi_flash *flash) } #endif
-static int set_quad_mode(struct spi_flash *flash, u8 idcode0) +static const struct spi_flash_info *spi_flash_read_id(struct +spi_flash +*flash) {
switch (idcode0) {
int tmp;
u8 id[5];
const struct spi_flash_info *info;
tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5);
if (tmp < 0) {
printf("SF: error %d reading JEDEC ID\n", tmp);
return ERR_PTR(tmp);
}
info = spi_flash_ids;
for (; info->name != NULL; info++) {
if (info->id_len) {
if (!memcmp(info->id, id, info->id_len))
return info;
}
}
printf("SF: unrecognized JEDEC id bytes: %02x, %02x, %02x\n",
id[0], id[1], id[2]);
return ERR_PTR(-ENODEV);
+}
+static int set_quad_mode(struct spi_flash *flash,
const struct spi_flash_info *info) {
switch (JEDEC_MFR(info)) {
#ifdef CONFIG_SPI_FLASH_MACRONIX case SPI_FLASH_CFI_MFR_MACRONIX: return macronix_quad_enable(flash); @@ -941,7 +968,8 @@ static int set_quad_mode(struct spi_flash *flash, u8 idcode0) return micron_quad_enable(flash); #endif default:
printf("SF: Need set QEB func for %02x flash\n", idcode0);
printf("SF: Need set QEB func for %02x flash\n",
JEDEC_MFR(info)); return -1; }
} @@ -1011,45 +1039,12 @@ static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi) int spi_flash_scan(struct spi_flash *flash) { struct spi_slave *spi = flash->spi;
const struct spi_flash_params *params;
u16 jedec, ext_jedec;
u8 idcode[5];
int ret;
/* Read the ID codes */
ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
if (ret) {
printf("SF: Failed to get idcodes\n");
return ret;
}
-#ifdef DEBUG
printf("SF: Got idcodes\n");
print_buffer(0, idcode, 1, sizeof(idcode), 0);
-#endif
jedec = idcode[1] << 8 | idcode[2];
ext_jedec = idcode[3] << 8 | idcode[4];
/* Validate params from spi_flash_params table */
params = spi_flash_params_table;
for (; params->name != NULL; params++) {
if ((params->jedec >> 16) == idcode[0]) {
if ((params->jedec & 0xFFFF) == jedec) {
if (params->ext_jedec == 0)
break;
else if (params->ext_jedec == ext_jedec)
break;
}
}
}
const struct spi_flash_info *info = NULL;
int ret = -1;
if (!params->name) {
printf("SF: Unsupported flash IDs: ");
printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
idcode[0], jedec, ext_jedec);
return -EPROTONOSUPPORT;
}
info = spi_flash_read_id(flash);
if (IS_ERR_OR_NULL(info))
return -ENOENT;
#ifdef CONFIG_SPI_FLASH_SPANSION /* @@ -1065,11 +1060,17 @@ int spi_flash_scan(struct spi_flash *flash) * sector that is not overlaid by the parameter sectors. * The uniform sector erase command has no effect on parameter sectors. */
if ((jedec == 0x0219 || (jedec == 0x0220)) &&
(ext_jedec & 0xff00) == 0x4d00) {
if ((JEDEC_ID(info) == 0x0219 || (JEDEC_ID(info) == 0x0220)) &&
(JEDEC_EXT(info) & 0xff00) == 0x4d00) { int ret;
u8 idcode[5]; u8 id[6];
/* Read the ID codes again, 5 bytes */
ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode,
sizeof(idcode));
if (ret)
return -EIO;
why are we reading id again, cant it be available as part of info?
Yes, but I can say this is removable code getting idcodes from info it's again a separate code task so, for the proper bisectable I am reading the idcode based on the existing code logic. of-course this is
removing in later patch. OK That’s fine. while reviewing this 1/21, I am not aware that its removed in follow up patches in series.
/* Read the ID codes again, 6 bytes */ ret = spi_flash_cmd(flash->spi, CMD_READ_ID, id, sizeof(id)); if (ret)
@@ -1088,18 +1089,18 @@ int spi_flash_scan(struct spi_flash *flash) } #endif /* Flash powers up read-only, so clear BP# bits */
if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL ||
idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX ||
idcode[0] == SPI_FLASH_CFI_MFR_SST)
if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL ||
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||
JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) write_sr(flash, 0); /* Assign spi data */
flash->name = params->name;
flash->name = info->name; flash->memory_map = spi->memory_map; flash->dual_flash = spi->option; /* Assign spi flash flags */
if (params->flags & SST_WR)
if (info->flags & SST_WR) flash->flags |= SNOR_F_SST_WR; /* Assign spi_flash ops */
@@ -1118,7 +1119,7 @@ int spi_flash_scan(struct spi_flash *flash) #endif
/* lock hooks are flash specific - assign them based on idcode0 */
switch (idcode[0]) {
switch (JEDEC_MFR(info)) {
#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) case SPI_FLASH_CFI_MFR_STMICRO: case SPI_FLASH_CFI_MFR_SST: @@ -1128,28 +1129,26 @@ int spi_flash_scan(struct spi_flash *flash)
#endif
break; default:
debug("SF: Lock ops not supported for %02x flash\n",
idcode[0]);
debug("SF: Lock ops not supported for %02x flash\n",
+JEDEC_MFR(info)); }
/* Compute the flash size */ flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ?
1 : 0;
flash->page_size = info->page_size; /* * The Spansion S25FL032P and S25FL064P have 256b pages, yet
use the * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with * the 0x4d00 Extended JEDEC code have 512b pages. All of the others * have 256b pages. */
if (ext_jedec == 0x4d00) {
if ((jedec == 0x0215) || (jedec == 0x216) || (jedec == 0x220))
flash->page_size = 256;
else
if (JEDEC_EXT(info) == 0x4d00) {
if ((JEDEC_ID(info) != 0x0215) &&
(JEDEC_ID(info) != 0x0216)) flash->page_size = 512;
} else {
flash->page_size = 256; } flash->page_size <<= flash->shift;
flash->sector_size = params->sector_size << flash->shift;
flash->size = flash->sector_size * params->nr_sectors << flash->shift;
flash->sector_size = info->sector_size << flash->shift;
flash->size = flash->sector_size * info->nr_sectors <<
- flash->shift;
This is incorrect, Dont do flash->shift again, as you already did above for
sector size calculation.
Doing this for second time causes double the actual size.
How come? This is an the existing code with params replaced by info.
Probably, the issue exist in old code as well, I found while reviewing this. You are doing shift two times, which will result double the actual size.
Please check and try to fix this as well.
Thanks, Siva
Thanks, Siva
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.

On 11/15/2016 08:03 PM, Jagan Teki wrote:
INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes.
- Add JEDEC_ID
- Add JEDEC_EXT macro
- Add JEDEC_MFR
- spi_flash_params => spi_flash_info
- params => info
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com Signed-off-by: Jagan Teki jagan@openedev.com
Jagan,
This set compiles OK for the platforms I tested (powerpc, arm & freescale, aarch64 sandbox).
York

Simplify the flash_lock ops detection code and added meaningful comment.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/spi_flash.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 95ee5ac..220c961 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1118,19 +1118,15 @@ int spi_flash_scan(struct spi_flash *flash) flash->read = spi_flash_cmd_read_ops; #endif
- /* lock hooks are flash specific - assign them based on idcode0 */ - switch (JEDEC_MFR(info)) { #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) - case SPI_FLASH_CFI_MFR_STMICRO: - case SPI_FLASH_CFI_MFR_SST: + /* NOR protection support for STmicro/Micron chips and similar */ + if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_STMICRO || + JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) { flash->flash_lock = stm_lock; flash->flash_unlock = stm_unlock; flash->flash_is_locked = stm_is_locked; -#endif - break; - default: - debug("SF: Lock ops not supported for %02x flash\n", JEDEC_MFR(info)); } +#endif
/* Compute the flash size */ flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 02/21] sf: Simplify lock ops detection code
Simplify the flash_lock ops detection code and added meaningful comment.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com
Reviewed-by: Siva Durga Prasad Paladugu sivadur@xilinx.com
Tested-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/spi_flash.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 95ee5ac..220c961 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1118,19 +1118,15 @@ int spi_flash_scan(struct spi_flash *flash) flash->read = spi_flash_cmd_read_ops; #endif
- /* lock hooks are flash specific - assign them based on idcode0 */
- switch (JEDEC_MFR(info)) {
#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
- case SPI_FLASH_CFI_MFR_STMICRO:
- case SPI_FLASH_CFI_MFR_SST:
- /* NOR protection support for STmicro/Micron chips and similar */
- if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_STMICRO ||
flash->flash_lock = stm_lock; flash->flash_unlock = stm_unlock; flash->flash_is_locked = stm_is_locked; -#endifJEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) {
break;
- default:
debug("SF: Lock ops not supported for %02x flash\n",
JEDEC_MFR(info)); } +#endif
I feel switch case is better but no issues here as it is single if. Hence, reviewed-by.
Thanks, Siva
/* Compute the flash size */ flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; -- 1.9.1

Instead of extracting id's separately better to use JEDEC_MFR|ID for code simplicity.
Cc: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sandbox.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index d68ee4a..09ce783 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -359,9 +359,8 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, debug(" id: off:%u tx:", sbsf->off); if (sbsf->off < IDCODE_LEN) { /* Extract correct byte from ID 0x00aabbcc */ - id = ((((sbsf->data)->id[0]) << 16) | - (((sbsf->data)->id[1]) << 8 | - ((sbsf->data)->id[2]))) >> + id = ((JEDEC_MFR(sbsf->data) << 16) | + JEDEC_ID(sbsf->data)) >> (8 * (IDCODE_LEN - 1 - sbsf->off)); } else { id = 0;

Hi,
-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Jagan Teki Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com Subject: [U-Boot] [PATCH v6 03/21] sf: sandbox: Use JEDEC_MFR|ID in id exctract
Instead of extracting id's separately better to use JEDEC_MFR|ID for code simplicity.
Cc: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sandbox.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index d68ee4a..09ce783 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -359,9 +359,8 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, debug(" id: off:%u tx:", sbsf->off); if (sbsf->off < IDCODE_LEN) { /* Extract correct byte from ID 0x00aabbcc */
id = ((((sbsf->data)->id[0]) << 16) |
(((sbsf->data)->id[1]) << 8 |
((sbsf->data)->id[2]))) >>
id = ((JEDEC_MFR(sbsf->data) << 16) |
JEDEC_ID(sbsf->data)) >>
As mentioned in 01/21, no magic numbers here as well. Otherwise, Reviewed-by
Regards, Siva
(8 * (IDCODE_LEN - 1 - sbsf->off)); } else { id = 0;
-- 1.9.1
U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

- Proper tabs spaces - Removed unnecessary - Added meaningful comments
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_internal.h | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index a9455ac..d7ac6b3 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -108,17 +108,9 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
-/** - * struct spi_flash_info - SPI/QSPI flash device params structure - * - * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) - * @sector_size: Isn't necessarily a sector size from vendor, - * the size listed here is what works with CMD_ERASE_64K - * @nr_sectors: No.of sectors on this device - * @flags: Important param, for flash specific behaviour - */ struct spi_flash_info { - const char *name; + /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */ + const char *name;
/* * This array stores the ID bytes. @@ -128,12 +120,16 @@ struct spi_flash_info { u8 id[5]; u8 id_len;
- u32 sector_size; - u32 nr_sectors; + /* + * The size listed here is what works with SPINOR_OP_SE, which isn't + * necessarily called a "sector" by the vendor. + */ + u32 sector_size; + u32 nr_sectors;
- u16 page_size; + u16 page_size;
- u16 flags; + u16 flags; #define SECT_4K BIT(0) #define E_FSR BIT(1) #define SST_WR BIT(2)

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Simon Glass sjg@chromium.org; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 04/21] sf: Cleanup spi_flash_info{}
- Proper tabs spaces
- Removed unnecessary
- Added meaningful comments
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com
Reviewed-by: Siva Durga Prasad Paladugu sivadur@xilinx.com
Thanks, Siva
drivers/mtd/spi/sf_internal.h | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index a9455ac..d7ac6b3 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -108,17 +108,9 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4]))
-/**
- struct spi_flash_info - SPI/QSPI flash device params structure
- @name: Device name
([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
- @sector_size: Isn't necessarily a sector size from vendor,
the size listed here is what works with
CMD_ERASE_64K
- @nr_sectors: No.of sectors on this device
- @flags: Important param, for flash specific behaviour
- */
struct spi_flash_info {
- const char *name;
/* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */
const char *name;
/*
- This array stores the ID bytes.
@@ -128,12 +120,16 @@ struct spi_flash_info { u8 id[5]; u8 id_len;
- u32 sector_size;
- u32 nr_sectors;
- /*
* The size listed here is what works with SPINOR_OP_SE, which isn't
* necessarily called a "sector" by the vendor.
*/
- u32 sector_size;
- u32 nr_sectors;
- u16 page_size;
- u16 page_size;
- u16 flags;
- u16 flags;
#define SECT_4K BIT(0) #define E_FSR BIT(1)
#define SST_WR BIT(2)
1.9.1

Rename nr_sectors as n_sectors to sync with Linux.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sandbox.c | 2 +- drivers/mtd/spi/sf_internal.h | 2 +- drivers/mtd/spi/sf_params.c | 2 +- drivers/mtd/spi/spi_flash.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index 09ce783..4944059 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -289,7 +289,7 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, /* we only support erase here */ if (sbsf->cmd == CMD_ERASE_CHIP) { sbsf->erase_size = sbsf->data->sector_size * - sbsf->data->nr_sectors; + sbsf->data->n_sectors; } else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) { sbsf->erase_size = 4 << 10; } else if (sbsf->cmd == CMD_ERASE_64K && !(flags & SECT_4K)) { diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index d7ac6b3..70617f2 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -125,7 +125,7 @@ struct spi_flash_info { * necessarily called a "sector" by the vendor. */ u32 sector_size; - u32 nr_sectors; + u32 n_sectors;
u16 page_size;
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 7fcc3bc..d46a276 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -23,7 +23,7 @@ }, \ .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \ .sector_size = (_sector_size), \ - .nr_sectors = (_n_sectors), \ + .n_sectors = (_n_sectors), \ .page_size = 256, \ .flags = (_flags),
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 220c961..f7634df 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1144,7 +1144,7 @@ int spi_flash_scan(struct spi_flash *flash) } flash->page_size <<= flash->shift; flash->sector_size = info->sector_size << flash->shift; - flash->size = flash->sector_size * info->nr_sectors << flash->shift; + flash->size = flash->sector_size * info->n_sectors << flash->shift; #ifdef CONFIG_SF_DUAL_FLASH if (flash->dual_flash & SF_DUAL_STACKED_FLASH) flash->size <<= 1;

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 05/21] sf: nr_sectors -> n_sectors
Rename nr_sectors as n_sectors to sync with Linux.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
Reviewed-by: Siva Durga Prasad Paladugu sivadur@xilinx.com
Thanks, Siva
drivers/mtd/spi/sandbox.c | 2 +- drivers/mtd/spi/sf_internal.h | 2 +- drivers/mtd/spi/sf_params.c | 2 +- drivers/mtd/spi/spi_flash.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index 09ce783..4944059 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -289,7 +289,7 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, /* we only support erase here */ if (sbsf->cmd == CMD_ERASE_CHIP) { sbsf->erase_size = sbsf->data->sector_size *
sbsf->data->nr_sectors;
} else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K))sbsf->data->n_sectors;
{ sbsf->erase_size = 4 << 10; } else if (sbsf->cmd == CMD_ERASE_64K && !(flags & SECT_4K)) { diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index d7ac6b3..70617f2 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -125,7 +125,7 @@ struct spi_flash_info { * necessarily called a "sector" by the vendor. */ u32 sector_size;
- u32 nr_sectors;
u32 n_sectors;
u16 page_size;
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 7fcc3bc..d46a276 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -23,7 +23,7 @@ }, \ .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \ .sector_size = (_sector_size), \
.nr_sectors = (_n_sectors), \
.page_size = 256, \ .flags = (_flags),.n_sectors = (_n_sectors), \
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 220c961..f7634df 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1144,7 +1144,7 @@ int spi_flash_scan(struct spi_flash *flash) } flash->page_size <<= flash->shift; flash->sector_size = info->sector_size << flash->shift;
- flash->size = flash->sector_size * info->nr_sectors << flash->shift;
- flash->size = flash->sector_size * info->n_sectors << flash->shift;
#ifdef CONFIG_SF_DUAL_FLASH if (flash->dual_flash & SF_DUAL_STACKED_FLASH) flash->size <<= 1; -- 1.9.1

Add id length of 5 bytes numerical value to macro.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_internal.h | 3 ++- drivers/mtd/spi/spi_flash.c | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 70617f2..770f628 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -107,6 +107,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) +#define SPI_FLASH_MAX_ID_LEN 5
struct spi_flash_info { /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */ @@ -117,7 +118,7 @@ struct spi_flash_info { * The first three bytes are the JEDIC ID. * JEDEC ID zero means "no ID" (mostly older chips). */ - u8 id[5]; + u8 id[SPI_FLASH_MAX_ID_LEN]; u8 id_len;
/* diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index f7634df..9430424 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -928,10 +928,10 @@ static int micron_quad_enable(struct spi_flash *flash) static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash) { int tmp; - u8 id[5]; + u8 id[SPI_FLASH_MAX_ID_LEN]; const struct spi_flash_info *info;
- tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5); + tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, SPI_FLASH_MAX_ID_LEN); if (tmp < 0) { printf("SF: error %d reading JEDEC ID\n", tmp); return ERR_PTR(tmp);

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 06/21] sf: Add SPI_FLASH_MAX_ID_LEN
Add id length of 5 bytes numerical value to macro.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sf_internal.h | 3 ++- drivers/mtd/spi/spi_flash.c | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 70617f2..770f628 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -107,6 +107,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) +#define SPI_FLASH_MAX_ID_LEN 5
struct spi_flash_info { /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */ @@ -117,7 +118,7 @@ struct spi_flash_info { * The first three bytes are the JEDIC ID. * JEDEC ID zero means "no ID" (mostly older chips). */
- u8 id[5];
u8 id[SPI_FLASH_MAX_ID_LEN]; u8 id_len;
/*
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index f7634df..9430424 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -928,10 +928,10 @@ static int micron_quad_enable(struct spi_flash *flash) static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash) { int tmp;
- u8 id[5];
- u8 id[SPI_FLASH_MAX_ID_LEN]; const struct spi_flash_info *info;
- tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5);
- tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id,
+SPI_FLASH_MAX_ID_LEN);
Not only here, you are reading Id again in spi_flash_scan(), use same macro there as well. Also, you are reading 6 bytes of ID, please consider the same there.
Thanks, Siva
if (tmp < 0) { printf("SF: error %d reading JEDEC ID\n", tmp); return ERR_PTR(tmp); -- 1.9.1

On Wed, Nov 16, 2016 at 11:26 AM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 06/21] sf: Add SPI_FLASH_MAX_ID_LEN
Add id length of 5 bytes numerical value to macro.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sf_internal.h | 3 ++- drivers/mtd/spi/spi_flash.c | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 70617f2..770f628 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -107,6 +107,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) +#define SPI_FLASH_MAX_ID_LEN 5
struct spi_flash_info { /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */ @@ -117,7 +118,7 @@ struct spi_flash_info { * The first three bytes are the JEDIC ID. * JEDEC ID zero means "no ID" (mostly older chips). */
u8 id[5];
u8 id[SPI_FLASH_MAX_ID_LEN]; u8 id_len; /*
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index f7634df..9430424 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -928,10 +928,10 @@ static int micron_quad_enable(struct spi_flash *flash) static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash) { int tmp;
u8 id[5];
u8 id[SPI_FLASH_MAX_ID_LEN]; const struct spi_flash_info *info;
tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5);
tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id,
+SPI_FLASH_MAX_ID_LEN);
Not only here, you are reading Id again in spi_flash_scan(), use same macro there as well. Also, you are reading 6 bytes of ID, please consider the same there.
This call is from spi_flash_scan itself , spi_flash_read_id
thanks!

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 6:12 PM To: Siva Durga Prasad Paladugu sivadur@xilinx.com Cc: u-boot@lists.denx.de; Michal Simek michal.simek@xilinx.com Subject: Re: [U-Boot] [PATCH v6 06/21] sf: Add SPI_FLASH_MAX_ID_LEN
On Wed, Nov 16, 2016 at 11:26 AM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng
York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com;
Mugunthan V
N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com;
Siva
Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 06/21] sf: Add SPI_FLASH_MAX_ID_LEN
Add id length of 5 bytes numerical value to macro.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sf_internal.h | 3 ++- drivers/mtd/spi/spi_flash.c | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 70617f2..770f628 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -107,6 +107,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) +#define SPI_FLASH_MAX_ID_LEN 5
struct spi_flash_info { /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */ @@ -117,7 +118,7 @@ struct spi_flash_info { * The first three bytes are the JEDIC ID. * JEDEC ID zero means "no ID" (mostly older chips). */
u8 id[5];
u8 id[SPI_FLASH_MAX_ID_LEN]; u8 id_len; /*
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index f7634df..9430424 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -928,10 +928,10 @@ static int micron_quad_enable(struct spi_flash *flash) static const struct spi_flash_info *spi_flash_read_id(struct spi_flash *flash) { int tmp;
u8 id[5];
u8 id[SPI_FLASH_MAX_ID_LEN]; const struct spi_flash_info *info;
tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id, 5);
tmp = spi_flash_cmd(flash->spi, CMD_READ_ID, id,
+SPI_FLASH_MAX_ID_LEN);
Not only here, you are reading Id again in spi_flash_scan(), use same macro there as well. Also, you are reading 6 bytes of ID, please consider the same there.
This call is from spi_flash_scan itself , spi_flash_read_id
I meant here in spi_flash_scan(), but anyway you removed this code in 10/21.
/* Read the ID codes again, 5 bytes */ - ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode, sizeof(idcode));
Thanks, Siva
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.

So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for few spansion flash families S25FS-S
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_internal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 770f628..cbed6e8 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -107,7 +107,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) -#define SPI_FLASH_MAX_ID_LEN 5 +#define SPI_FLASH_MAX_ID_LEN 6
struct spi_flash_info { /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 07/21] sf: Increase max id length by 1 byte
So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for few spansion flash families S25FS-S
Good, This is what, I want to see from first patch.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
Reviewed-by: Siva Durga Prasad Paladugu sivadur@xilinx.com
Thanks, Siva
drivers/mtd/spi/sf_internal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 770f628..cbed6e8 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -107,7 +107,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) -#define SPI_FLASH_MAX_ID_LEN 5 +#define SPI_FLASH_MAX_ID_LEN 6
struct spi_flash_info { /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */ -- 1.9.1
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Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 07/21] sf: Increase max id length by 1 byte
So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for few spansion flash families S25FS-S
Good, This is what, I want to see from first patch.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
Reviewed-by: Siva Durga Prasad Paladugu sivadur@xilinx.com
Thanks, Siva
drivers/mtd/spi/sf_internal.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 770f628..cbed6e8 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -107,7 +107,7 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) -#define SPI_FLASH_MAX_ID_LEN 5 +#define SPI_FLASH_MAX_ID_LEN 6
struct spi_flash_info { /* Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) */ -- 1.9.1

INFO6 is for tabulating 6 byte flash parts, Ex: S25FS256S_64K
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_params.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index d46a276..d0c978e 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -27,6 +27,21 @@ .page_size = 256, \ .flags = (_flags),
+#define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \ + .id = { \ + ((_jedec_id) >> 16) & 0xff, \ + ((_jedec_id) >> 8) & 0xff, \ + (_jedec_id) & 0xff, \ + ((_ext_id) >> 16) & 0xff, \ + ((_ext_id) >> 8) & 0xff, \ + (_ext_id) & 0xff, \ + }, \ + .id_len = 6, \ + .sector_size = (_sector_size), \ + .n_sectors = (_n_sectors), \ + .page_size = 256, \ + .flags = (_flags), + /* SPI/QSPI flash device params structure */ const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 08/21] sf: Add INFO6 flash_info macro
INFO6 is for tabulating 6 byte flash parts, Ex: S25FS256S_64K
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sf_params.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index d46a276..d0c978e 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -27,6 +27,21 @@ .page_size = 256, \ .flags = (_flags),
+#define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
.id = { \
((_jedec_id) >> 16) & 0xff, \
((_jedec_id) >> 8) & 0xff, \
(_jedec_id) & 0xff, \
((_ext_id) >> 16) & 0xff, \
((_ext_id) >> 8) & 0xff, \
(_ext_id) & 0xff, \
}, \
.id_len = 6,
Why cant you use macro which you defined in 07/21.
Thanks, Siva \
.sector_size = (_sector_size), \
.n_sectors = (_n_sectors), \
.page_size = 256, \
.flags = (_flags),
/* SPI/QSPI flash device params structure */ const struct spi_flash_info spi_flash_ids[] = {
#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
1.9.1

On Wed, Nov 16, 2016 at 11:39 AM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 08/21] sf: Add INFO6 flash_info macro
INFO6 is for tabulating 6 byte flash parts, Ex: S25FS256S_64K
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sf_params.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index d46a276..d0c978e 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -27,6 +27,21 @@ .page_size = 256, \ .flags = (_flags),
+#define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
.id = { \
((_jedec_id) >> 16) & 0xff, \
((_jedec_id) >> 8) & 0xff, \
(_jedec_id) & 0xff, \
((_ext_id) >> 16) & 0xff, \
((_ext_id) >> 8) & 0xff, \
(_ext_id) & 0xff, \
}, \
.id_len = 6,
Why cant you use macro which you defined in 07/21.
Mayn't be, SPI_FLASH_ID_MAX_LEN is 6 byte length but it may increase in future technically INFO6 id_len shouldn't be same as MAX_LEN.
thanks!

Add Spansion S25FS256S_64K spi flash to the list of spi_flash_ids.
In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB.
To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately.
So better to erase the whole flash using 4K sector erase instead of detecting these family parts again and do two different erase operations.
Cc: Yunhui Cui yunhui.cui@nxp.com Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Michael Trimarchi michael@amarulasolutions.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_params.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index d0c978e..6157e29 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -98,6 +98,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) }, {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, + {"S25FS256S_64K", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) }, {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) },

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Yunhui Cui yunhui.cui@nxp.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Michael Trimarchi michael@amarulasolutions.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 09/21] sf: params: Add S25FS256S_64K spi flash support
Add Spansion S25FS256S_64K spi flash to the list of spi_flash_ids.
In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB.
To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately.
So better to erase the whole flash using 4K sector erase instead of detecting these family parts again and do two different erase operations.
Cc: Yunhui Cui yunhui.cui@nxp.com Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Michael Trimarchi michael@amarulasolutions.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sf_params.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index d0c978e..6157e29 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -98,6 +98,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) }, {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) },
- {"S25FS256S_64K", INFO6(0x010219, 0x4d0181, 64 * 1024, 512,
RD_FULL | +WR_QPP | SECT_4K) },
How about the below part S25FS512S, it is also from S25FS family, doesn't it need SECT_4K? AFAIK, S25FS family, by default ships with some 4K sectors at top/Bottom but it can be configurable to uniform Sector size.
Thanks, Siva
{"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) }, {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, -- 1.9.1

From: Jagan Teki jagan@amarulasolutions.com
Since flash detection code is more mature to detect even with 6 bytes id length devices removed old code and related references.
Cc: Yunhui Cui yunhui.cui@nxp.com Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Michael Trimarchi michael@amarulasolutions.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_internal.h | 6 ---- drivers/mtd/spi/spi_flash.c | 79 ------------------------------------------- 2 files changed, 85 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index cbed6e8..6a39cdd 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -98,12 +98,6 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, const void *buf); #endif
-#ifdef CONFIG_SPI_FLASH_SPANSION -/* Used for Spansion S25FS-S family flash only. */ -#define CMD_SPANSION_RDAR 0x65 /* Read any device register */ -#define CMD_SPANSION_WRAR 0x71 /* Write any device register */ -#endif - #define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 9430424..b126a21 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -999,43 +999,6 @@ int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) } #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
-#ifdef CONFIG_SPI_FLASH_SPANSION -static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi) -{ - u8 cmd[4]; - u32 offset = 0x800004; /* CR3V register offset */ - u8 cr3v; - int ret; - - cmd[0] = CMD_SPANSION_RDAR; - cmd[1] = offset >> 16; - cmd[2] = offset >> 8; - cmd[3] = offset >> 0; - - ret = spi_flash_cmd_read(spi, cmd, 4, &cr3v, 1); - if (ret) - return -EIO; - /* CR3V bit3: 4-KB Erase */ - if (cr3v & 0x8) - return 0; - - cmd[0] = CMD_SPANSION_WRAR; - cr3v |= 0x8; - ret = spi_flash_cmd_write(spi, cmd, 4, &cr3v, 1); - if (ret) - return -EIO; - - cmd[0] = CMD_SPANSION_RDAR; - ret = spi_flash_cmd_read(spi, cmd, 4, &cr3v, 1); - if (ret) - return -EIO; - if (!(cr3v & 0x8)) - return -EFAULT; - - return 0; -} -#endif - int spi_flash_scan(struct spi_flash *flash) { struct spi_slave *spi = flash->spi; @@ -1046,48 +1009,6 @@ int spi_flash_scan(struct spi_flash *flash) if (IS_ERR_OR_NULL(info)) return -ENOENT;
-#ifdef CONFIG_SPI_FLASH_SPANSION - /* - * The S25FS-S family physical sectors may be configured as a - * hybrid combination of eight 4-kB parameter sectors - * at the top or bottom of the address space with all - * but one of the remaining sectors being uniform size. - * The Parameter Sector Erase commands (20h or 21h) must - * be used to erase the 4-kB parameter sectors individually. - * The Sector (uniform sector) Erase commands (D8h or DCh) - * must be used to erase any of the remaining - * sectors, including the portion of highest or lowest address - * sector that is not overlaid by the parameter sectors. - * The uniform sector erase command has no effect on parameter sectors. - */ - if ((JEDEC_ID(info) == 0x0219 || (JEDEC_ID(info) == 0x0220)) && - (JEDEC_EXT(info) & 0xff00) == 0x4d00) { - int ret; - u8 idcode[5]; - u8 id[6]; - - /* Read the ID codes again, 5 bytes */ - ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode, sizeof(idcode)); - if (ret) - return -EIO; - - /* Read the ID codes again, 6 bytes */ - ret = spi_flash_cmd(flash->spi, CMD_READ_ID, id, sizeof(id)); - if (ret) - return -EIO; - - ret = memcmp(id, idcode, 5); - if (ret) - return -EIO; - - /* 0x81: S25FS-S family 0x80: S25FL-S family */ - if (id[5] == 0x81) { - ret = spansion_s25fss_disable_4KB_erase(spi); - if (ret) - return ret; - } - } -#endif /* Flash powers up read-only, so clear BP# bits */ if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL || JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX ||

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@amarulasolutions.com; Yunhui Cui yunhui.cui@nxp.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Michael Trimarchi michael@amarulasolutions.com; Siva Durga Prasad Paladugu sivadur@xilinx.com; Jagan Teki jagan@openedev.com Subject: [PATCH v6 10/21] sf: Remove legacy idcode detection code
From: Jagan Teki jagan@amarulasolutions.com
Since flash detection code is more mature to detect even with 6 bytes id length devices removed old code and related references.
As I said earlier in 9/21, this patch may break S25FS512S until we add SECT_4K to its flags. Please take care of this.
Thanks, Siva
Cc: Yunhui Cui yunhui.cui@nxp.com Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Michael Trimarchi michael@amarulasolutions.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sf_internal.h | 6 ---- drivers/mtd/spi/spi_flash.c | 79 ------------------------------------------- 2 files changed, 85 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index cbed6e8..6a39cdd 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -98,12 +98,6 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, const void *buf); #endif
-#ifdef CONFIG_SPI_FLASH_SPANSION -/* Used for Spansion S25FS-S family flash only. */ -#define CMD_SPANSION_RDAR 0x65 /* Read any device register */ -#define CMD_SPANSION_WRAR 0x71 /* Write any device register */ -#endif
#define JEDEC_MFR(info) ((info)->id[0]) #define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) #define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 9430424..b126a21 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -999,43 +999,6 @@ int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) } #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
-#ifdef CONFIG_SPI_FLASH_SPANSION -static int spansion_s25fss_disable_4KB_erase(struct spi_slave *spi) -{
- u8 cmd[4];
- u32 offset = 0x800004; /* CR3V register offset */
- u8 cr3v;
- int ret;
- cmd[0] = CMD_SPANSION_RDAR;
- cmd[1] = offset >> 16;
- cmd[2] = offset >> 8;
- cmd[3] = offset >> 0;
- ret = spi_flash_cmd_read(spi, cmd, 4, &cr3v, 1);
- if (ret)
return -EIO;
- /* CR3V bit3: 4-KB Erase */
- if (cr3v & 0x8)
return 0;
- cmd[0] = CMD_SPANSION_WRAR;
- cr3v |= 0x8;
- ret = spi_flash_cmd_write(spi, cmd, 4, &cr3v, 1);
- if (ret)
return -EIO;
- cmd[0] = CMD_SPANSION_RDAR;
- ret = spi_flash_cmd_read(spi, cmd, 4, &cr3v, 1);
- if (ret)
return -EIO;
- if (!(cr3v & 0x8))
return -EFAULT;
- return 0;
-} -#endif
int spi_flash_scan(struct spi_flash *flash) { struct spi_slave *spi = flash->spi; @@ -1046,48 +1009,6 @@ int spi_flash_scan(struct spi_flash *flash) if (IS_ERR_OR_NULL(info)) return -ENOENT;
-#ifdef CONFIG_SPI_FLASH_SPANSION
- /*
* The S25FS-S family physical sectors may be configured as a
* hybrid combination of eight 4-kB parameter sectors
* at the top or bottom of the address space with all
* but one of the remaining sectors being uniform size.
* The Parameter Sector Erase commands (20h or 21h) must
* be used to erase the 4-kB parameter sectors individually.
* The Sector (uniform sector) Erase commands (D8h or DCh)
* must be used to erase any of the remaining
* sectors, including the portion of highest or lowest address
* sector that is not overlaid by the parameter sectors.
* The uniform sector erase command has no effect on parameter
sectors.
*/
- if ((JEDEC_ID(info) == 0x0219 || (JEDEC_ID(info) == 0x0220)) &&
(JEDEC_EXT(info) & 0xff00) == 0x4d00) {
int ret;
u8 idcode[5];
u8 id[6];
/* Read the ID codes again, 5 bytes */
ret = spi_flash_cmd(flash->spi, CMD_READ_ID, idcode,
sizeof(idcode));
if (ret)
return -EIO;
/* Read the ID codes again, 6 bytes */
ret = spi_flash_cmd(flash->spi, CMD_READ_ID, id, sizeof(id));
if (ret)
return -EIO;
ret = memcmp(id, idcode, 5);
if (ret)
return -EIO;
/* 0x81: S25FS-S family 0x80: S25FL-S family */
if (id[5] == 0x81) {
ret = spansion_s25fss_disable_4KB_erase(spi);
if (ret)
return ret;
}
- }
-#endif /* Flash powers up read-only, so clear BP# bits */ if (JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_ATMEL || JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_MACRONIX || -- 1.9.1

Remove unneeded/non-meaningful commit message on params and flash.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_params.c | 1 - drivers/mtd/spi/spi_flash.c | 3 --- 2 files changed, 4 deletions(-)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 6157e29..05cedf1 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -42,7 +42,6 @@ .page_size = 256, \ .flags = (_flags),
-/* SPI/QSPI flash device params structure */ const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) }, diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index b126a21..813f08d 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1015,16 +1015,13 @@ int spi_flash_scan(struct spi_flash *flash) JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) write_sr(flash, 0);
- /* Assign spi data */ flash->name = info->name; flash->memory_map = spi->memory_map; flash->dual_flash = spi->option;
- /* Assign spi flash flags */ if (info->flags & SST_WR) flash->flags |= SNOR_F_SST_WR;
- /* Assign spi_flash ops */ #ifndef CONFIG_DM_SPI_FLASH flash->write = spi_flash_cmd_write_ops; #if defined(CONFIG_SPI_FLASH_SST)

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 11/21] sf: Remove non-meaningful comments
Remove unneeded/non-meaningful commit message on params and flash.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com
Reviewed-by: Siva Durga Prasad Paladugu sivadur@xilinx.com
Thanks, Siva
drivers/mtd/spi/sf_params.c | 1 - drivers/mtd/spi/spi_flash.c | 3 --- 2 files changed, 4 deletions(-)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 6157e29..05cedf1 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -42,7 +42,6 @@ .page_size = 256, \ .flags = (_flags),
-/* SPI/QSPI flash device params structure */ const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) }, diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index b126a21..813f08d 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1015,16 +1015,13 @@ int spi_flash_scan(struct spi_flash *flash) JEDEC_MFR(info) == SPI_FLASH_CFI_MFR_SST) write_sr(flash, 0);
/* Assign spi data */ flash->name = info->name; flash->memory_map = spi->memory_map; flash->dual_flash = spi->option;
/* Assign spi flash flags */ if (info->flags & SST_WR) flash->flags |= SNOR_F_SST_WR;
/* Assign spi_flash ops */
#ifndef CONFIG_DM_SPI_FLASH flash->write = spi_flash_cmd_write_ops; #if defined(CONFIG_SPI_FLASH_SST) -- 1.9.1

Now the flash params table as renamed to spi_flash_ids structure, so rename the sf_params.c to spi_flash_ids.c and remove the legacy.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com --- doc/device-tree-bindings/mtd/spi/spi-flash.txt | 2 +- drivers/mtd/spi/Makefile | 2 +- drivers/mtd/spi/{sf_params.c => spi_flash_ids.c} | 3 ++- 3 files changed, 4 insertions(+), 3 deletions(-) rename drivers/mtd/spi/{sf_params.c => spi_flash_ids.c} (99%)
diff --git a/doc/device-tree-bindings/mtd/spi/spi-flash.txt b/doc/device-tree-bindings/mtd/spi/spi-flash.txt index 85522d8..3327890 100644 --- a/doc/device-tree-bindings/mtd/spi/spi-flash.txt +++ b/doc/device-tree-bindings/mtd/spi/spi-flash.txt @@ -6,7 +6,7 @@ Required properties: - compatible : Should be the manufacturer and the name of the chip. Bear in mind that the DT binding is not U-Boot-only, but in case of U-Boot, see spi_flash_params_table table in - drivers/mtd/spi/sf_params.c for the list of supported chips. + drivers/mtd/spi/spi_flash_ids.c for the list of supported chips. - reg : Chip-Select number - spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index f3dc409..fcda023 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -12,7 +12,7 @@ obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o obj-$(CONFIG_SPL_SPI_SUNXI) += sunxi_spi_spl.o endif
-obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi_flash.o sf_params.o sf.o +obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi_flash.o spi_flash_ids.o sf.o obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o obj-$(CONFIG_SPI_FLASH_MTD) += sf_mtd.o obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/spi_flash_ids.c similarity index 99% rename from drivers/mtd/spi/sf_params.c rename to drivers/mtd/spi/spi_flash_ids.c index 05cedf1..655ed01 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -1,6 +1,7 @@ /* - * SPI flash Params table + * SPI Flash ID's. * + * Copyright (C) 2016 Jagan Teki jagan@openedev.com * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. * * SPDX-License-Identifier: GPL-2.0+

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 12/21] sf: Rename sf_params.c to spi_flash_ids.c
Now the flash params table as renamed to spi_flash_ids structure, so rename the sf_params.c to spi_flash_ids.c and remove the legacy.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
Reviewed-by: Siva Durga Prasad Paladugu sivadur@xilinx.com
doc/device-tree-bindings/mtd/spi/spi-flash.txt | 2 +- drivers/mtd/spi/Makefile | 2 +- drivers/mtd/spi/{sf_params.c => spi_flash_ids.c} | 3 ++- 3 files changed, 4 insertions(+), 3 deletions(-) rename drivers/mtd/spi/{sf_params.c => spi_flash_ids.c} (99%)
diff --git a/doc/device-tree-bindings/mtd/spi/spi-flash.txt b/doc/device-tree- bindings/mtd/spi/spi-flash.txt index 85522d8..3327890 100644 --- a/doc/device-tree-bindings/mtd/spi/spi-flash.txt +++ b/doc/device-tree-bindings/mtd/spi/spi-flash.txt @@ -6,7 +6,7 @@ Required properties:
- compatible : Should be the manufacturer and the name of the chip. Bear
in mind that the DT binding is not U-Boot-only, but in case of U-Boot, see spi_flash_params_table table in
drivers/mtd/spi/sf_params.c for the list of supported chips.
drivers/mtd/spi/spi_flash_ids.c for the list of supported chips.
- reg : Chip-Select number
- spi-max-frequency : Maximum frequency of the SPI bus the chip can
operate at
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index f3dc409..fcda023 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -12,7 +12,7 @@ obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o obj-$(CONFIG_SPL_SPI_SUNXI) += sunxi_spi_spl.o endif
-obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi_flash.o sf_params.o sf.o +obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi_flash.o spi_flash_ids.o sf.o obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o obj-$(CONFIG_SPI_FLASH_MTD) += sf_mtd.o obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/spi_flash_ids.c similarity index 99% rename from drivers/mtd/spi/sf_params.c rename to drivers/mtd/spi/spi_flash_ids.c index 05cedf1..655ed01 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -1,6 +1,7 @@ /*
- SPI flash Params table
- SPI Flash ID's.
- Copyright (C) 2016 Jagan Teki jagan@openedev.com
- Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
- SPDX-License-Identifier: GPL-2.0+
-- 1.9.1

For readability use small letter's with flash name.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/spi_flash_ids.c | 220 ++++++++++++++++++++-------------------- 1 file changed, 110 insertions(+), 110 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 655ed01..61677c9 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -45,136 +45,136 @@
const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ - {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) }, - {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) }, - {"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) }, - {"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) }, - {"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) }, - {"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) }, - {"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) }, - {"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) }, - {"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) }, - {"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) }, + {"at45db011d", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) }, + {"at45db021d", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) }, + {"at45db041d", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) }, + {"at45db081d", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) }, + {"at45db161d", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) }, + {"at45db321d", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) }, + {"at45db641d", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) }, + {"at25df321a", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) }, + {"at25df321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) }, + {"at26df081a", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_EON /* EON */ - {"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) }, - {"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) }, - {"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) }, - {"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) }, + {"en25q32b", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) }, + {"en25q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"en25q128b", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) }, + {"en25s64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) }, #endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ - {"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) }, - {"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) }, + {"gd25q64b", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"gd25lq32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ - {"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) }, - {"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) }, - {"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) }, + {"is25lp032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) }, + {"is25lp064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) }, + {"is25lp128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) }, #endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ - {"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) }, - {"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) }, - {"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) }, - {"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) }, - {"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) }, - {"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) }, - {"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, - {"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) }, - {"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) }, - {"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"mx25l2006e", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) }, + {"mx25l4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) }, + {"mx25l8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) }, + {"mx25l1605d", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) }, + {"mx25l3205d", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) }, + {"mx25l6405d", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) }, + {"mx25l12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"mx25l25635f", INFO(0xc22019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP) }, + {"mx25l51235f", INFO(0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP) }, + {"mx25l12855e", INFO(0xc22618, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ - {"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) }, - {"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) }, - {"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) }, - {"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) }, - {"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) }, - {"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) }, - {"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) }, - {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) }, - {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) }, - {"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) }, - {"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) }, - {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) }, - {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, - {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, - {"S25FS256S_64K", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) }, - {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, - {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, - {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) }, + {"s25fl008a", INFO(0x010213, 0x0, 64 * 1024, 16, 0) }, + {"s25fl016a", INFO(0x010214, 0x0, 64 * 1024, 32, 0) }, + {"s25fl032a", INFO(0x010215, 0x0, 64 * 1024, 64, 0) }, + {"s25fl064a", INFO(0x010216, 0x0, 64 * 1024, 128, 0) }, + {"s25fl116k", INFO(0x014015, 0x0, 64 * 1024, 128, 0) }, + {"s25fl164k", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) }, + {"s25fl128p_256k", INFO(0x012018, 0x0300, 256 * 1024, 64, RD_FULL | WR_QPP) }, + {"s25fl128p_64k", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"s25fl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL | WR_QPP) }, + {"s25fl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL | WR_QPP) }, + {"s25fl128s_256k", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL | WR_QPP) }, + {"s25fl128s_64k", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, + {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, + {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"s25fs512s", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) }, + {"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, + {"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, + {"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ - {"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) }, - {"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) }, - {"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) }, - {"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) }, - {"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) }, - {"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) }, - {"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) }, - {"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) }, - {"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) }, - {"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) }, - {"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) }, - {"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) }, - {"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, - {"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, - {"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, - {"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, - {"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, - {"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"m25p10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) }, + {"m25p20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) }, + {"m25p40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) }, + {"m25p80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) }, + {"m25p16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) }, + {"m25pE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) }, + {"m25pX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD | RD_DUAL) }, + {"m25p32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) }, + {"m25p64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) }, + {"m25p128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) }, + {"m25pX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) }, + {"n25q016a", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) }, + {"n25q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q32a", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q64a", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"n25q128a", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP) }, + {"n25q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q256a", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"n25q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"n25q512a", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"n25q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, + {"n25q1024a", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL | WR_QPP | E_FSR | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */ - {"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, - {"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, - {"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) }, - {"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) }, - {"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) }, - {"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) }, - {"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) }, - {"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) }, - {"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, - {"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) }, - {"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, + {"sst25vf040b", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, + {"sst25vf080b", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, + {"sst25vf016b", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K | SST_WR) }, + {"sst25vf032b", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K | SST_WR) }, + {"sst25vf064c", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) }, + {"sst25wf512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K | SST_WR) }, + {"sst25wf010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K | SST_WR) }, + {"sst25wf020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K | SST_WR) }, + {"sst25wf040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K | SST_WR) }, + {"sst25wf040b", INFO(0x621613, 0x0, 64 * 1024, 8, SECT_4K) }, + {"sst25wf080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K | SST_WR) }, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ - {"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) }, - {"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) }, - {"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) }, - {"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) }, - {"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) }, - {"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) }, - {"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) }, - {"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, - {"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, + {"w25p80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) }, + {"w25p16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) }, + {"w25p32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) }, + {"w25x40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) }, + {"w25x16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) }, + {"w25x32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) }, + {"w25x64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) }, + {"w25q80bl", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q16cl", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q32bv", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q64cv", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q128bv", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q80bw", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q16dw", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q32dw", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q64dw", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL | WR_QPP | SECT_4K) }, + {"w25q128fw", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL | WR_QPP | SECT_4K) }, #endif {}, /* Empty entry to terminate the list */ /* * Note: * Below paired flash devices has similar spi_flash params. - * (S25FL129P_64K, S25FL128S_64K) - * (W25Q80BL, W25Q80BV) - * (W25Q16CL, W25Q16DV) - * (W25Q32BV, W25Q32FV_SPI) - * (W25Q64CV, W25Q64FV_SPI) - * (W25Q128BV, W25Q128FV_SPI) - * (W25Q32DW, W25Q32FV_QPI) - * (W25Q64DW, W25Q64FV_QPI) - * (W25Q128FW, W25Q128FV_QPI) + * (s25fl129p_64k, s25fl128s_64k) + * (w25q80bl, w25q80bv) + * (w25q16cl, w25q16dv) + * (w25q32bv, w25q32fv_spi) + * (w25q64cv, w25q64fv_spi) + * (w25q128bv, w25q128fv_spi) + * (w25q32dw, w25q32fv_qpi) + * (w25q64dw, w25q64fv_qpi) + * (w25q128fw, w25q128fv_qpi) */ };

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 13/21] sf: ids: Use small letter's with flash name
For readability use small letter's with flash name.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com Tested-by: Jagan Teki jagan@openedev.com
Reviewed-by: Siva Durga Prasad Paladugu sivadur@xilinx.com
Thanks, Siva
drivers/mtd/spi/spi_flash_ids.c | 220 ++++++++++++++++++++-------------------- 1 file changed, 110 insertions(+), 110 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 655ed01..61677c9 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -45,136 +45,136 @@
const struct spi_flash_info spi_flash_ids[] = { #ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */
- {"AT45DB011D", INFO(0x1f2200, 0x0, 64 * 1024, 4,
SECT_4K) },
- {"AT45DB021D", INFO(0x1f2300, 0x0, 64 * 1024, 8,
SECT_4K) },
- {"AT45DB041D", INFO(0x1f2400, 0x0, 64 * 1024, 8,
SECT_4K) },
- {"AT45DB081D", INFO(0x1f2500, 0x0, 64 * 1024, 16,
SECT_4K) },
- {"AT45DB161D", INFO(0x1f2600, 0x0, 64 * 1024, 32,
SECT_4K) },
- {"AT45DB321D", INFO(0x1f2700, 0x0, 64 * 1024, 64,
SECT_4K) },
- {"AT45DB641D", INFO(0x1f2800, 0x0, 64 * 1024, 128,
SECT_4K) },
- {"AT25DF321A", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
- {"AT25DF321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
- {"AT26DF081A", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
- {"at45db011d", INFO(0x1f2200, 0x0, 64 * 1024, 4, SECT_4K) },
- {"at45db021d", INFO(0x1f2300, 0x0, 64 * 1024, 8, SECT_4K) },
- {"at45db041d", INFO(0x1f2400, 0x0, 64 * 1024, 8, SECT_4K) },
- {"at45db081d", INFO(0x1f2500, 0x0, 64 * 1024, 16, SECT_4K) },
- {"at45db161d", INFO(0x1f2600, 0x0, 64 * 1024, 32, SECT_4K) },
- {"at45db321d", INFO(0x1f2700, 0x0, 64 * 1024, 64, SECT_4K) },
- {"at45db641d", INFO(0x1f2800, 0x0, 64 * 1024, 128, SECT_4K) },
- {"at25df321a", INFO(0x1f4701, 0x0, 64 * 1024, 64, SECT_4K) },
- {"at25df321", INFO(0x1f4700, 0x0, 64 * 1024, 64, SECT_4K) },
- {"at26df081a", INFO(0x1f4501, 0x0, 64 * 1024, 16, SECT_4K) },
#endif #ifdef CONFIG_SPI_FLASH_EON /* EON */
- {"EN25Q32B", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
- {"EN25Q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"EN25Q128B", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
- {"EN25S64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
- {"en25q32b", INFO(0x1c3016, 0x0, 64 * 1024, 64, 0) },
- {"en25q64", INFO(0x1c3017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"en25q128b", INFO(0x1c3018, 0x0, 64 * 1024, 256, 0) },
- {"en25s64", INFO(0x1c3817, 0x0, 64 * 1024, 128, 0) },
#endif #ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
- {"GD25Q64B", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"GD25LQ32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
- {"gd25q64b", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"gd25lq32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
#endif #ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
- {"IS25LP032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
- {"IS25LP064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
- {"IS25LP128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
- {"is25lp032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
- {"is25lp064", INFO(0x9d6017, 0x0, 64 * 1024, 128, 0) },
- {"is25lp128", INFO(0x9d6018, 0x0, 64 * 1024, 256, 0) },
#endif #ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */
- {"MX25L2006E", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
- {"MX25L4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
- {"MX25L8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
- {"MX25L1605D", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
- {"MX25L3205D", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
- {"MX25L6405D", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
- {"MX25L12805", INFO(0xc22018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP) },
- {"MX25L25635F", INFO(0xc22019, 0x0, 64 * 1024, 512,
RD_FULL | WR_QPP) },
- {"MX25L51235F", INFO(0xc2201a, 0x0, 64 * 1024, 1024,
RD_FULL | WR_QPP) },
- {"MX25L12855E", INFO(0xc22618, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP) },
- {"mx25l2006e", INFO(0xc22012, 0x0, 64 * 1024, 4, 0) },
- {"mx25l4005", INFO(0xc22013, 0x0, 64 * 1024, 8, 0) },
- {"mx25l8005", INFO(0xc22014, 0x0, 64 * 1024, 16, 0) },
- {"mx25l1605d", INFO(0xc22015, 0x0, 64 * 1024, 32, 0) },
- {"mx25l3205d", INFO(0xc22016, 0x0, 64 * 1024, 64, 0) },
- {"mx25l6405d", INFO(0xc22017, 0x0, 64 * 1024, 128, 0) },
- {"mx25l12805", INFO(0xc22018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
- {"mx25l25635f", INFO(0xc22019, 0x0, 64 * 1024, 512,
RD_FULL | WR_QPP) },
- {"mx25l51235f", INFO(0xc2201a, 0x0, 64 * 1024, 1024,
RD_FULL | WR_QPP) },
- {"mx25l12855e", INFO(0xc22618, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */
- {"S25FL008A", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
- {"S25FL016A", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
- {"S25FL032A", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
- {"S25FL064A", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
- {"S25FL116K", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
- {"S25FL164K", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
- {"S25FL128P_256K", INFO(0x012018, 0x0300, 256 * 1024, 64,
RD_FULL | WR_QPP) },
- {"S25FL128P_64K", INFO(0x012018, 0x0301, 64 * 1024, 256,
RD_FULL | WR_QPP) },
- {"S25FL032P", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL |
WR_QPP) },
- {"S25FL064P", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL
| WR_QPP) },
- {"S25FL128S_256K", INFO(0x012018, 0x4d00, 256 * 1024, 64,
RD_FULL | WR_QPP) },
- {"S25FL128S_64K", INFO(0x012018, 0x4d01, 64 * 1024, 256,
RD_FULL | WR_QPP) },
- {"S25FL256S_256K", INFO(0x010219, 0x4d00, 256 * 1024, 128,
RD_FULL | WR_QPP) },
- {"S25FL256S_64K", INFO(0x010219, 0x4d01, 64 * 1024, 512,
RD_FULL | WR_QPP) },
- {"S25FS256S_64K", INFO6(0x010219, 0x4d0181, 64 * 1024, 512,
RD_FULL | WR_QPP | SECT_4K) },
- {"S25FS512S", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL
| WR_QPP) },
- {"S25FL512S_256K", INFO(0x010220, 0x4d00, 256 * 1024, 256,
RD_FULL | WR_QPP) },
- {"S25FL512S_64K", INFO(0x010220, 0x4d01, 64 * 1024, 1024,
RD_FULL | WR_QPP) },
- {"S25FL512S_512K", INFO(0x010220, 0x4f00, 256 * 1024, 256,
RD_FULL | WR_QPP) },
- {"s25fl008a", INFO(0x010213, 0x0, 64 * 1024, 16, 0) },
- {"s25fl016a", INFO(0x010214, 0x0, 64 * 1024, 32, 0) },
- {"s25fl032a", INFO(0x010215, 0x0, 64 * 1024, 64, 0) },
- {"s25fl064a", INFO(0x010216, 0x0, 64 * 1024, 128, 0) },
- {"s25fl116k", INFO(0x014015, 0x0, 64 * 1024, 128, 0) },
- {"s25fl164k", INFO(0x014017, 0x0140, 64 * 1024, 128, 0) },
- {"s25fl128p_256k", INFO(0x012018, 0x0300, 256 * 1024, 64,
RD_FULL | WR_QPP) },
- {"s25fl128p_64k", INFO(0x012018, 0x0301, 64 * 1024, 256, RD_FULL
| WR_QPP) },
- {"s25fl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, RD_FULL |
WR_QPP) },
- {"s25fl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128, RD_FULL
| WR_QPP) },
- {"s25fl128s_256k", INFO(0x012018, 0x4d00, 256 * 1024, 64, RD_FULL
| WR_QPP) },
- {"s25fl128s_64k", INFO(0x012018, 0x4d01, 64 * 1024, 256, RD_FULL
| WR_QPP) },
- {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128,
RD_FULL | WR_QPP) },
- {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL
| WR_QPP) },
- {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512,
RD_FULL | WR_QPP | SECT_4K) },
- {"s25fs512s", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL |
WR_QPP) },
- {"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256,
RD_FULL | WR_QPP) },
- {"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL
| WR_QPP) },
- {"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL
| WR_QPP) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
- {"M25P10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
- {"M25P20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
- {"M25P40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
- {"M25P80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
- {"M25P16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
- {"M25PE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
- {"M25PX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD |
RD_DUAL) },
- {"M25P32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
- {"M25P64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
- {"M25P128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
- {"M25PX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
- {"N25Q016A", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
- {"N25Q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q32A", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q64A", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
- {"N25Q128A", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
- {"N25Q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q256A", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
- {"N25Q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
- {"N25Q512A", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
- {"N25Q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
- {"N25Q1024A", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
- {"m25p10", INFO(0x202011, 0x0, 32 * 1024, 4, 0) },
- {"m25p20", INFO(0x202012, 0x0, 64 * 1024, 4, 0) },
- {"m25p40", INFO(0x202013, 0x0, 64 * 1024, 8, 0) },
- {"m25p80", INFO(0x202014, 0x0, 64 * 1024, 16, 0) },
- {"m25p16", INFO(0x202015, 0x0, 64 * 1024, 32, 0) },
- {"m25pE16", INFO(0x208015, 0x1000, 64 * 1024, 32, 0) },
- {"m25pX16", INFO(0x207115, 0x1000, 64 * 1024, 32, RD_QUAD |
RD_DUAL) },
- {"m25p32", INFO(0x202016, 0x0, 64 * 1024, 64, 0) },
- {"m25p64", INFO(0x202017, 0x0, 64 * 1024, 128, 0) },
- {"m25p128", INFO(0x202018, 0x0, 256 * 1024, 64, 0) },
- {"m25pX64", INFO(0x207117, 0x0, 64 * 1024, 128, SECT_4K) },
- {"n25q016a", INFO(0x20bb15, 0x0, 64 * 1024, 32, SECT_4K) },
- {"n25q32", INFO(0x20ba16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"n25q32a", INFO(0x20bb16, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"n25q64", INFO(0x20ba17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"n25q64a", INFO(0x20bb17, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"n25q128", INFO(0x20ba18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
- {"n25q128a", INFO(0x20bb18, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP) },
- {"n25q256", INFO(0x20ba19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
- {"n25q256a", INFO(0x20bb19, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
- {"n25q512", INFO(0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
- {"n25q512a", INFO(0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
- {"n25q1024", INFO(0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) },
- {"n25q1024a", INFO(0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL |
WR_QPP | E_FSR | SECT_4K) }, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */
- {"SST25VF040B", INFO(0xbf258d, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR) },
- {"SST25VF080B", INFO(0xbf258e, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR) },
- {"SST25VF016B", INFO(0xbf2541, 0x0, 64 * 1024, 32,
SECT_4K | SST_WR) },
- {"SST25VF032B", INFO(0xbf254a, 0x0, 64 * 1024, 64,
SECT_4K | SST_WR) },
- {"SST25VF064C", INFO(0xbf254b, 0x0, 64 * 1024, 128,
SECT_4K) },
- {"SST25WF512", INFO(0xbf2501, 0x0, 64 * 1024, 1,
SECT_4K | SST_WR) },
- {"SST25WF010", INFO(0xbf2502, 0x0, 64 * 1024, 2,
SECT_4K | SST_WR) },
- {"SST25WF020", INFO(0xbf2503, 0x0, 64 * 1024, 4,
SECT_4K | SST_WR) },
- {"SST25WF040", INFO(0xbf2504, 0x0, 64 * 1024, 8,
SECT_4K | SST_WR) },
- {"SST25WF040B", INFO(0x621613, 0x0, 64 * 1024, 8,
SECT_4K) },
- {"SST25WF080", INFO(0xbf2505, 0x0, 64 * 1024, 16,
SECT_4K | SST_WR) },
- {"sst25vf040b", INFO(0xbf258d, 0x0, 64 * 1024, 8, SECT_4K |
SST_WR) },
- {"sst25vf080b", INFO(0xbf258e, 0x0, 64 * 1024, 16, SECT_4K |
SST_WR) },
- {"sst25vf016b", INFO(0xbf2541, 0x0, 64 * 1024, 32, SECT_4K |
SST_WR) },
- {"sst25vf032b", INFO(0xbf254a, 0x0, 64 * 1024, 64, SECT_4K |
SST_WR) },
- {"sst25vf064c", INFO(0xbf254b, 0x0, 64 * 1024, 128, SECT_4K) },
- {"sst25wf512", INFO(0xbf2501, 0x0, 64 * 1024, 1, SECT_4K |
SST_WR) },
- {"sst25wf010", INFO(0xbf2502, 0x0, 64 * 1024, 2, SECT_4K |
SST_WR) },
- {"sst25wf020", INFO(0xbf2503, 0x0, 64 * 1024, 4, SECT_4K |
SST_WR) },
- {"sst25wf040", INFO(0xbf2504, 0x0, 64 * 1024, 8, SECT_4K |
SST_WR) },
- {"sst25wf040b", INFO(0x621613, 0x0, 64 * 1024, 8,
SECT_4K) },
- {"sst25wf080", INFO(0xbf2505, 0x0, 64 * 1024, 16, SECT_4K |
SST_WR) }, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */
- {"W25P80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
- {"W25P16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
- {"W25P32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
- {"W25X40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
- {"W25X16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
- {"W25X32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
- {"W25X64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"W25Q80BL", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q16CL", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q32BV", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q64CV", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q128BV", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q80BW", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q16DW", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q32DW", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q64DW", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"W25Q128FW", INFO(0xef6018, 0x0, 64 * 1024, 256,
RD_FULL | WR_QPP | SECT_4K) },
- {"w25p80", INFO(0xef2014, 0x0, 64 * 1024, 16, 0) },
- {"w25p16", INFO(0xef2015, 0x0, 64 * 1024, 32, 0) },
- {"w25p32", INFO(0xef2016, 0x0, 64 * 1024, 64, 0) },
- {"w25x40", INFO(0xef3013, 0x0, 64 * 1024, 8, SECT_4K) },
- {"w25x16", INFO(0xef3015, 0x0, 64 * 1024, 32, SECT_4K) },
- {"w25x32", INFO(0xef3016, 0x0, 64 * 1024, 64, SECT_4K) },
- {"w25x64", INFO(0xef3017, 0x0, 64 * 1024, 128, SECT_4K) },
- {"w25q80bl", INFO(0xef4014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
- {"w25q16cl", INFO(0xef4015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
- {"w25q32bv", INFO(0xef4016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"w25q64cv", INFO(0xef4017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"w25q128bv", INFO(0xef4018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP | SECT_4K) },
- {"w25q256", INFO(0xef4019, 0x0, 64 * 1024, 512, RD_FULL |
WR_QPP | SECT_4K) },
- {"w25q80bw", INFO(0xef5014, 0x0, 64 * 1024, 16, RD_FULL |
WR_QPP | SECT_4K) },
- {"w25q16dw", INFO(0xef6015, 0x0, 64 * 1024, 32, RD_FULL |
WR_QPP | SECT_4K) },
- {"w25q32dw", INFO(0xef6016, 0x0, 64 * 1024, 64, RD_FULL |
WR_QPP | SECT_4K) },
- {"w25q64dw", INFO(0xef6017, 0x0, 64 * 1024, 128, RD_FULL |
WR_QPP | SECT_4K) },
- {"w25q128fw", INFO(0xef6018, 0x0, 64 * 1024, 256, RD_FULL |
WR_QPP | SECT_4K) }, #endif {}, /* Empty entry to terminate the list */ /* * Note: * Below paired flash devices has similar spi_flash params.
* (S25FL129P_64K, S25FL128S_64K)
* (W25Q80BL, W25Q80BV)
* (W25Q16CL, W25Q16DV)
* (W25Q32BV, W25Q32FV_SPI)
* (W25Q64CV, W25Q64FV_SPI)
* (W25Q128BV, W25Q128FV_SPI)
* (W25Q32DW, W25Q32FV_QPI)
* (W25Q64DW, W25Q64FV_QPI)
* (W25Q128FW, W25Q128FV_QPI)
* (s25fl129p_64k, s25fl128s_64k)
* (w25q80bl, w25q80bv)
* (w25q16cl, w25q16dv)
* (w25q32bv, w25q32fv_spi)
* (w25q64cv, w25q64fv_spi)
* (w25q128bv, w25q128fv_spi)
* (w25q32dw, w25q32fv_qpi)
* (w25q64dw, w25q64fv_qpi)
*/* (w25q128fw, w25q128fv_qpi)
};
1.9.1

Use small 'd' in s25s512s ext_jedec
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 61677c9..4ec2255 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -99,7 +99,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"s25fs512s", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL | WR_QPP) }, + {"s25fs512s", INFO(0x010220, 0x4d00, 128 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, {"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, {"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) },

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 14/21] sf: ids: Use small letter in ext_jedec
Use small 'd' in s25s512s ext_jedec
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com
Reviewed-by: Siva Durga Prasad Paladugu sivadur@xilinx.com
drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 61677c9..4ec2255 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -99,7 +99,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
- {"s25fs512s", INFO(0x010220, 0x4D00, 128 * 1024, 512, RD_FULL |
WR_QPP) },
- {"s25fs512s", INFO(0x010220, 0x4d00, 128 * 1024, 512, RD_FULL |
WR_QPP) }, {"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, {"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, {"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) }, -- 1.9.1

spi_flash_write_bar-> write_bar spi_flash_write_bar -> read_bar spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_internal.h | 2 +- drivers/mtd/spi/spi_flash.c | 23 +++++++++++------------ 2 files changed, 12 insertions(+), 13 deletions(-)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 6a39cdd..51f0bde 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -185,7 +185,7 @@ static inline int spi_flash_cmd_write_disable(struct spi_flash *flash) * - SPI claim * - spi_flash_cmd_write_enable * - spi_flash_cmd_write - * - spi_flash_cmd_wait_ready + * - spi_flash_wait_till_ready * - SPI release */ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 813f08d..cfecd53 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -144,7 +144,7 @@ static int write_evcr(struct spi_flash *flash, u8 evcr) #endif
#ifdef CONFIG_SPI_FLASH_BAR -static int spi_flash_write_bar(struct spi_flash *flash, u32 offset) +static int write_bar(struct spi_flash *flash, u32 offset) { u8 cmd, bank_sel; int ret; @@ -165,8 +165,7 @@ bar_end: return flash->bank_curr; }
-static int spi_flash_read_bar(struct spi_flash *flash, - const struct spi_flash_info *info) +static int read_bar(struct spi_flash *flash, const struct spi_flash_info *info) { u8 curr_bank = 0; int ret; @@ -263,8 +262,8 @@ static int spi_flash_ready(struct spi_flash *flash) return sr && fsr; }
-static int spi_flash_cmd_wait_ready(struct spi_flash *flash, - unsigned long timeout) +static int spi_flash_wait_till_ready(struct spi_flash *flash, + unsigned long timeout) { unsigned long timebase; int ret; @@ -312,7 +311,7 @@ int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, return ret; }
- ret = spi_flash_cmd_wait_ready(flash, timeout); + ret = spi_flash_wait_till_ready(flash, timeout); if (ret < 0) { debug("SF: write %s timed out\n", timeout == SPI_FLASH_PROG_TIMEOUT ? @@ -354,7 +353,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len) spi_flash_dual(flash, &erase_addr); #endif #ifdef CONFIG_SPI_FLASH_BAR - ret = spi_flash_write_bar(flash, erase_addr); + ret = write_bar(flash, erase_addr); if (ret < 0) return ret; #endif @@ -405,7 +404,7 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, spi_flash_dual(flash, &write_addr); #endif #ifdef CONFIG_SPI_FLASH_BAR - ret = spi_flash_write_bar(flash, write_addr); + ret = write_bar(flash, write_addr); if (ret < 0) return ret; #endif @@ -509,7 +508,7 @@ int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, spi_flash_dual(flash, &read_addr); #endif #ifdef CONFIG_SPI_FLASH_BAR - ret = spi_flash_write_bar(flash, read_addr); + ret = write_bar(flash, read_addr); if (ret < 0) return ret; bank_sel = flash->bank_curr; @@ -561,7 +560,7 @@ static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf) if (ret) return ret;
- return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); + return spi_flash_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT); }
int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, @@ -609,7 +608,7 @@ int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, break; }
- ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); + ret = spi_flash_wait_till_ready(flash, SPI_FLASH_PROG_TIMEOUT); if (ret) break;
@@ -1137,7 +1136,7 @@ int spi_flash_scan(struct spi_flash *flash)
/* Configure the BAR - discover bank cmds and read current bank */ #ifdef CONFIG_SPI_FLASH_BAR - ret = spi_flash_read_bar(flash, info); + ret = read_bar(flash, info); if (ret < 0) return ret; #endif

Dual flash code in spi are usually take the spi controller to work with dual connected flash devices. Usually these dual connection operation's are referred to flash controller protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers.
So, this patch remove the dual_flash options or flags in sf which are triggered from spi controller side.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf.c | 4 ---- drivers/mtd/spi/spi_flash.c | 1 - include/spi.h | 6 ------ 3 files changed, 11 deletions(-)
diff --git a/drivers/mtd/spi/sf.c b/drivers/mtd/spi/sf.c index 664e860..d5e175c 100644 --- a/drivers/mtd/spi/sf.c +++ b/drivers/mtd/spi/sf.c @@ -18,10 +18,6 @@ static int spi_flash_read_write(struct spi_slave *spi, unsigned long flags = SPI_XFER_BEGIN; int ret;
-#ifdef CONFIG_SF_DUAL_FLASH - if (spi->flags & SPI_XFER_U_PAGE) - flags |= SPI_XFER_U_PAGE; -#endif if (data_len == 0) flags |= SPI_XFER_END;
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index cfecd53..d3a9975 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1016,7 +1016,6 @@ int spi_flash_scan(struct spi_flash *flash)
flash->name = info->name; flash->memory_map = spi->memory_map; - flash->dual_flash = spi->option;
if (info->flags & SST_WR) flash->flags |= SNOR_F_SST_WR; diff --git a/include/spi.h b/include/spi.h index 4c17983..deb65ef 100644 --- a/include/spi.h +++ b/include/spi.h @@ -30,10 +30,6 @@ #define SPI_RX_DUAL BIT(12) /* receive with 2 wires */ #define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
-/* SPI bus connection options - see enum spi_dual_flash */ -#define SPI_CONN_DUAL_SHARED (1 << 0) -#define SPI_CONN_DUAL_SEPARATED (1 << 1) - /* Header byte that marks the start of the message */ #define SPI_PREAMBLE_END_BYTE 0xec
@@ -93,7 +89,6 @@ struct dm_spi_slave_platdata { * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. * @memory_map: Address of read-only SPI flash access. - * @option: Varies SPI bus options - separate, shared bus. * @flags: Indication of SPI flags. */ struct spi_slave { @@ -117,7 +112,6 @@ struct spi_slave { #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) #define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ #define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ -#define SPI_XFER_U_PAGE BIT(4) };
/**

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 16/21] spi: Remove dual flash options/flags
Dual flash code in spi are usually take the spi controller to work with dual connected flash devices. Usually these dual connection operation's are referred to flash controller protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers.
So, this patch remove the dual_flash options or flags in sf which are triggered from spi controller side.
How are you going to handle this? any followup patches on this? This will break for some who are using dual flash till now. Isnt it?
Regards, Siva
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Cc: Vignesh R vigneshr@ti.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/sf.c | 4 ---- drivers/mtd/spi/spi_flash.c | 1 - include/spi.h | 6 ------ 3 files changed, 11 deletions(-)
diff --git a/drivers/mtd/spi/sf.c b/drivers/mtd/spi/sf.c index 664e860..d5e175c 100644 --- a/drivers/mtd/spi/sf.c +++ b/drivers/mtd/spi/sf.c @@ -18,10 +18,6 @@ static int spi_flash_read_write(struct spi_slave *spi, unsigned long flags = SPI_XFER_BEGIN; int ret;
-#ifdef CONFIG_SF_DUAL_FLASH
- if (spi->flags & SPI_XFER_U_PAGE)
flags |= SPI_XFER_U_PAGE;
-#endif if (data_len == 0) flags |= SPI_XFER_END;
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index cfecd53..d3a9975 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1016,7 +1016,6 @@ int spi_flash_scan(struct spi_flash *flash)
flash->name = info->name; flash->memory_map = spi->memory_map;
flash->dual_flash = spi->option;
if (info->flags & SST_WR) flash->flags |= SNOR_F_SST_WR;
diff --git a/include/spi.h b/include/spi.h index 4c17983..deb65ef 100644 --- a/include/spi.h +++ b/include/spi.h @@ -30,10 +30,6 @@ #define SPI_RX_DUAL BIT(12) /* receive with 2 wires */ #define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
-/* SPI bus connection options - see enum spi_dual_flash */ -#define SPI_CONN_DUAL_SHARED (1 << 0) -#define SPI_CONN_DUAL_SEPARATED (1 << 1)
/* Header byte that marks the start of the message */ #define SPI_PREAMBLE_END_BYTE 0xec
@@ -93,7 +89,6 @@ struct dm_spi_slave_platdata {
- @max_write_size: If non-zero, the maximum number of bytes which can
be written at once, excluding command bytes.
- @memory_map: Address of read-only SPI flash access.
*/
- @option: Varies SPI bus options - separate, shared bus.
- @flags: Indication of SPI flags.
struct spi_slave { @@ -117,7 +112,6 @@ struct spi_slave { #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) #define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ #define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ -#define SPI_XFER_U_PAGE BIT(4) };
/**
1.9.1

On Wed, Nov 16, 2016 at 12:27 PM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng bmeng.cn@gmail.com; York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com; Mugunthan V N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com; Siva Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 16/21] spi: Remove dual flash options/flags
Dual flash code in spi are usually take the spi controller to work with dual connected flash devices. Usually these dual connection operation's are referred to flash controller protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers.
So, this patch remove the dual_flash options or flags in sf which are triggered from spi controller side.
How are you going to handle this? any followup patches on this? This will break for some who are using dual flash till now. Isnt it?
Yes, but I've been mentioned many times about this as we need to re-write the driver on mtd side since many flash futures are dealt with spi area, which is bad and inconvenient to add new futures. and also there is no driver using this dual flash so far, SoI am going with this patch either way.
thanks!

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 7:23 PM To: Siva Durga Prasad Paladugu sivadur@xilinx.com Cc: u-boot@lists.denx.de; Michal Simek michal.simek@xilinx.com Subject: Re: [U-Boot] [PATCH v6 16/21] spi: Remove dual flash options/flags
On Wed, Nov 16, 2016 at 12:27 PM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng
York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com;
Mugunthan V
N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com;
Siva
Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 16/21] spi: Remove dual flash options/flags
Dual flash code in spi are usually take the spi controller to work with dual connected flash devices. Usually these dual connection operation's are referred to flash controller protocol rather with spi controller protocol, these are still present in flash side for the usage of
spi-nor controllers.
So, this patch remove the dual_flash options or flags in sf which are triggered from spi controller side.
How are you going to handle this? any followup patches on this? This will break for some who are using dual flash till now. Isnt it?
Yes, but I've been mentioned many times about this as we need to re-write the driver on mtd side since many flash futures are dealt with spi area, which is bad and inconvenient to add new futures. and also there is no driver using this dual flash so far, SoI am going with this patch either way.
If I get it correctly, you would like to move all the spi flash related drivers to drivers/mtd/spi ? If yes, then how do you handle a driver which supports both flash and other devices as well.
Regards, Siva
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.

On Thu, Nov 17, 2016 at 11:53 AM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 7:23 PM To: Siva Durga Prasad Paladugu sivadur@xilinx.com Cc: u-boot@lists.denx.de; Michal Simek michal.simek@xilinx.com Subject: Re: [U-Boot] [PATCH v6 16/21] spi: Remove dual flash options/flags
On Wed, Nov 16, 2016 at 12:27 PM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com; Bin Meng
York Sun york.sun@nxp.com; Vignesh R vigneshr@ti.com;
Mugunthan V
N mugunthanvnm@ti.com; Michal Simek michal.simek@xilinx.com;
Siva
Durga Prasad Paladugu sivadur@xilinx.com Subject: [PATCH v6 16/21] spi: Remove dual flash options/flags
Dual flash code in spi are usually take the spi controller to work with dual connected flash devices. Usually these dual connection operation's are referred to flash controller protocol rather with spi controller protocol, these are still present in flash side for the usage of
spi-nor controllers.
So, this patch remove the dual_flash options or flags in sf which are triggered from spi controller side.
How are you going to handle this? any followup patches on this? This will break for some who are using dual flash till now. Isnt it?
Yes, but I've been mentioned many times about this as we need to re-write the driver on mtd side since many flash futures are dealt with spi area, which is bad and inconvenient to add new futures. and also there is no driver using this dual flash so far, SoI am going with this patch either way.
If I get it correctly, you would like to move all the spi flash related drivers to drivers/mtd/spi ? If yes, then how do you handle a driver which supports both flash and other devices as well.
Sorry, look like the old story begin again, take a look at this [1]
[1] http://git.denx.de/?p=u-boot-spi.git;a=commitdiff;h=cfd285e4c5727d406fdd62b9...
thanks!

dataflash doesn't require options, memory_map from spi.
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_dataflash.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c index b2a56da..6a9dfef 100644 --- a/drivers/mtd/spi/sf_dataflash.c +++ b/drivers/mtd/spi/sf_dataflash.c @@ -584,6 +584,7 @@ static int spi_dataflash_probe(struct udevice *dev) int ret, status = 0;
spi_flash = dev_get_uclass_priv(dev); + spi_flash->spi = spi; spi_flash->dev = dev;
ret = spi_claim_bus(spi); @@ -664,11 +665,6 @@ static int spi_dataflash_probe(struct udevice *dev) } }
- /* Assign spi data */ - spi_flash->spi = spi; - spi_flash->memory_map = spi->memory_map; - spi_flash->dual_flash = spi->option; - spi_release_bus(spi);
return 0;

Flash id detection should be the first step to enumerate the connected flash on the board, once ie done checking with respective id codes locally in the driver all this should be part of jedec_probe instead of id detection and validated through flash_info{} table separatly.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_dataflash.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c index 6a9dfef..7c6c8d2 100644 --- a/drivers/mtd/spi/sf_dataflash.c +++ b/drivers/mtd/spi/sf_dataflash.c @@ -501,9 +501,10 @@ static struct flash_info dataflash_data[] = { { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, };
-static struct flash_info *jedec_probe(struct spi_slave *spi, u8 *id) +static struct flash_info *jedec_probe(struct spi_slave *spi) { int tmp; + uint8_t id[5]; uint32_t jedec; struct flash_info *info; int status; @@ -517,6 +518,11 @@ static struct flash_info *jedec_probe(struct spi_slave *spi, u8 *id) * That's not an error; only rev C and newer chips handle it, and * only Atmel sells these chips. */ + tmp = spi_flash_cmd(spi, CMD_READ_ID, id, sizeof(id)); + if (tmp < 0) { + printf("dataflash: error %d reading JEDEC ID\n", tmp); + return ERR_PTR(tmp); + } if (id[0] != 0x1f) return NULL;
@@ -580,7 +586,6 @@ static int spi_dataflash_probe(struct udevice *dev) struct spi_slave *spi = dev_get_parent_priv(dev); struct spi_flash *spi_flash; struct flash_info *info; - u8 idcode[5]; int ret, status = 0;
spi_flash = dev_get_uclass_priv(dev); @@ -591,12 +596,6 @@ static int spi_dataflash_probe(struct udevice *dev) if (ret) return ret;
- ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); - if (ret) { - printf("SPI DataFlash: Failed to get idcodes\n"); - goto err_read_cmd; - } - /* * Try to detect dataflash by JEDEC ID. * If it succeeds we know we have either a C or D part. @@ -604,7 +603,9 @@ static int spi_dataflash_probe(struct udevice *dev) * Both support the security register, though with different * write procedures. */ - info = jedec_probe(spi, idcode); + info = jedec_probe(spi); + if (IS_ERR(info)) + return PTR_ERR(info); if (info != NULL) add_dataflash(dev, info->name, info->nr_pages, info->pagesize, info->pageoffset,

This patch fixed the add_dataflash return logic, so-that it can handle both jedec and older chips same as Linux.
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_dataflash.c | 127 ++++++++++++++++++++--------------------- 1 file changed, 61 insertions(+), 66 deletions(-)
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c index 7c6c8d2..212aa69 100644 --- a/drivers/mtd/spi/sf_dataflash.c +++ b/drivers/mtd/spi/sf_dataflash.c @@ -586,15 +586,15 @@ static int spi_dataflash_probe(struct udevice *dev) struct spi_slave *spi = dev_get_parent_priv(dev); struct spi_flash *spi_flash; struct flash_info *info; - int ret, status = 0; + int status;
spi_flash = dev_get_uclass_priv(dev); spi_flash->spi = spi; spi_flash->dev = dev;
- ret = spi_claim_bus(spi); - if (ret) - return ret; + status = spi_claim_bus(spi); + if (status) + return status;
/* * Try to detect dataflash by JEDEC ID. @@ -605,74 +605,69 @@ static int spi_dataflash_probe(struct udevice *dev) */ info = jedec_probe(spi); if (IS_ERR(info)) - return PTR_ERR(info); - if (info != NULL) - add_dataflash(dev, info->name, info->nr_pages, - info->pagesize, info->pageoffset, - (info->flags & SUP_POW2PS) ? 'd' : 'c'); - else { - /* - * Older chips support only legacy commands, identifing - * capacity using bits in the status byte. - */ - status = dataflash_status(spi); - if (status <= 0 || status == 0xff) { - printf("SPI DataFlash: read status error %d\n", status); - if (status == 0 || status == 0xff) - status = -ENODEV; - goto err_read_cmd; - } - /* - * if there's a device there, assume it's dataflash. - * board setup should have set spi->max_speed_max to - * match f(car) for continuous reads, mode 0 or 3. - */ - switch (status & 0x3c) { - case 0x0c: /* 0 0 1 1 x x */ - status = add_dataflash(dev, "AT45DB011B", - 512, 264, 9, 0); - break; - case 0x14: /* 0 1 0 1 x x */ - status = add_dataflash(dev, "AT45DB021B", - 1024, 264, 9, 0); - break; - case 0x1c: /* 0 1 1 1 x x */ - status = add_dataflash(dev, "AT45DB041x", - 2048, 264, 9, 0); - break; - case 0x24: /* 1 0 0 1 x x */ - status = add_dataflash(dev, "AT45DB081B", - 4096, 264, 9, 0); - break; - case 0x2c: /* 1 0 1 1 x x */ - status = add_dataflash(dev, "AT45DB161x", - 4096, 528, 10, 0); - break; - case 0x34: /* 1 1 0 1 x x */ - status = add_dataflash(dev, "AT45DB321x", - 8192, 528, 10, 0); - break; - case 0x38: /* 1 1 1 x x x */ - case 0x3c: - status = add_dataflash(dev, "AT45DB642x", - 8192, 1056, 11, 0); - break; - /* obsolete AT45DB1282 not (yet?) supported */ - default: - dev_info(&spi->dev, "unsupported device (%x)\n", - status & 0x3c); + goto err_jedec_probe; + if (info != NULL) { + status = add_dataflash(dev, info->name, info->nr_pages, + info->pagesize, info->pageoffset, + (info->flags & SUP_POW2PS) ? 'd' : 'c'); + if (status < 0) + goto err_status; + } + + /* + * Older chips support only legacy commands, identifing + * capacity using bits in the status byte. + */ + status = dataflash_status(spi); + if (status <= 0 || status == 0xff) { + printf("SPI DataFlash: read status error %d\n", status); + if (status == 0 || status == 0xff) status = -ENODEV; - goto err_read_cmd; - } + goto err_jedec_probe; }
- spi_release_bus(spi); + /* + * if there's a device there, assume it's dataflash. + * board setup should have set spi->max_speed_max to + * match f(car) for continuous reads, mode 0 or 3. + */ + switch (status & 0x3c) { + case 0x0c: /* 0 0 1 1 x x */ + status = add_dataflash(dev, "AT45DB011B", 512, 264, 9, 0); + break; + case 0x14: /* 0 1 0 1 x x */ + status = add_dataflash(dev, "AT45DB021B", 1024, 264, 9, 0); + break; + case 0x1c: /* 0 1 1 1 x x */ + status = add_dataflash(dev, "AT45DB041x", 2048, 264, 9, 0); + break; + case 0x24: /* 1 0 0 1 x x */ + status = add_dataflash(dev, "AT45DB081B", 4096, 264, 9, 0); + break; + case 0x2c: /* 1 0 1 1 x x */ + status = add_dataflash(dev, "AT45DB161x", 4096, 528, 10, 0); + break; + case 0x34: /* 1 1 0 1 x x */ + status = add_dataflash(dev, "AT45DB321x", 8192, 528, 10, 0); + break; + case 0x38: /* 1 1 1 x x x */ + case 0x3c: + status = add_dataflash(dev, "AT45DB642x", 8192, 1056, 11, 0); + break; + /* obsolete AT45DB1282 not (yet?) supported */ + default: + dev_info(&spi->dev, "unsupported device (%x)\n", + status & 0x3c); + status = -ENODEV; + goto err_status; + }
- return 0; + return status;
-err_read_cmd: +err_status: + spi_free_slave(spi); +err_jedec_probe: spi_release_bus(spi); - return status; }

- fix single line comments - remove unneeded spaces - ascending order of include files - rename SPI DATAFLASH to dataflash - rename SPI DataFlash to dataflash - return NULL replaced with error code
Cc: Bin Meng bmeng.cn@gmail.com Cc: York Sun york.sun@nxp.com Signed-off-by: Jagan Teki jagan@openedev.com Reviewed-by: Simon Glass sjg@chromium.org Reviewed-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/sf_dataflash.c | 38 +++++++++++++++----------------------- 1 file changed, 15 insertions(+), 23 deletions(-)
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c index 212aa69..bcddfa0 100644 --- a/drivers/mtd/spi/sf_dataflash.c +++ b/drivers/mtd/spi/sf_dataflash.c @@ -1,12 +1,12 @@ /* - * * Atmel DataFlash probing * * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc. * Haikun Wang (haikun.wang@freescale.com) * * SPDX-License-Identifier: GPL-2.0+ -*/ + */ + #include <common.h> #include <dm.h> #include <errno.h> @@ -67,15 +67,12 @@ #define OP_WRITE_SECURITY_REVC 0x9A #define OP_WRITE_SECURITY 0x9B /* revision D */
- struct dataflash { uint8_t command[16]; unsigned short page_offset; /* offset in flash address */ };
-/* - * Return the status of the DataFlash device. - */ +/* Return the status of the DataFlash device */ static inline int dataflash_status(struct spi_slave *spi) { int ret; @@ -114,9 +111,7 @@ static int dataflash_waitready(struct spi_slave *spi) return -ETIME; }
-/* - * Erase pages of flash. - */ +/* Erase pages of flash */ static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len) { struct dataflash *dataflash; @@ -147,7 +142,7 @@ static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len)
status = spi_claim_bus(spi); if (status) { - debug("SPI DATAFLASH: unable to claim SPI bus\n"); + debug("dataflash: unable to claim SPI bus\n"); return status; }
@@ -232,7 +227,7 @@ static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len,
status = spi_claim_bus(spi); if (status) { - debug("SPI DATAFLASH: unable to claim SPI bus\n"); + debug("dataflash: unable to claim SPI bus\n"); return status; }
@@ -290,7 +285,7 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len,
status = spi_claim_bus(spi); if (status) { - debug("SPI DATAFLASH: unable to claim SPI bus\n"); + debug("dataflash: unable to claim SPI bus\n"); return status; }
@@ -387,7 +382,7 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len,
/* Check result of the compare operation */ if (status & (1 << 6)) { - printf("SPI DataFlash: write compare page %u, err %d\n", + printf("dataflash: write compare page %u, err %d\n", pageaddr, status); remaining = 0; status = -EIO; @@ -539,7 +534,7 @@ static struct flash_info *jedec_probe(struct spi_slave *spi) if (info->flags & SUP_POW2PS) { status = dataflash_status(spi); if (status < 0) { - debug("SPI DataFlash: status error %d\n", + debug("dataflash: status error %d\n", status); return NULL; } @@ -561,10 +556,8 @@ static struct flash_info *jedec_probe(struct spi_slave *spi) * size (it might be binary) even when we can tell which density * class is involved (legacy chip id scheme). */ - printf("SPI DataFlash: Unsupported flash IDs: "); - printf("manuf %02x, jedec %04x, ext_jedec %04x\n", - id[0], jedec, id[3] << 8 | id[4]); - return NULL; + printf("dataflash: JEDEC id %06x not handled\n", jedec); + return ERR_PTR(-ENODEV); }
/* @@ -614,19 +607,19 @@ static int spi_dataflash_probe(struct udevice *dev) goto err_status; }
- /* + /* * Older chips support only legacy commands, identifing * capacity using bits in the status byte. */ status = dataflash_status(spi); if (status <= 0 || status == 0xff) { - printf("SPI DataFlash: read status error %d\n", status); + printf("dataflash: read status error %d\n", status); if (status == 0 || status == 0xff) status = -ENODEV; goto err_jedec_probe; }
- /* + /* * if there's a device there, assume it's dataflash. * board setup should have set spi->max_speed_max to * match f(car) for continuous reads, mode 0 or 3. @@ -656,8 +649,7 @@ static int spi_dataflash_probe(struct udevice *dev) break; /* obsolete AT45DB1282 not (yet?) supported */ default: - dev_info(&spi->dev, "unsupported device (%x)\n", - status & 0x3c); + printf("dataflash: unsupported device (%x)\n", status & 0x3c); status = -ENODEV; goto err_status; }

s25fs512s and s25fl512s_256k have common id information till 5 bytes and 6th byte have different family id like FS and FL-S as 0x81 and 0x80.
Reported-by: Vignesh R vigneshr@ti.com Signed-off-by: Jagan Teki jagan@openedev.com --- drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 4ec2255..8f9520f 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -99,7 +99,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) }, - {"s25fs512s", INFO(0x010220, 0x4d00, 128 * 1024, 512, RD_FULL | WR_QPP) }, + {"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, {"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, {"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) },

Hi,
-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Jagan Teki Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com Subject: [U-Boot] [PATCH v6 21/21] sf: Fix s25fs512s id param table
s25fs512s and s25fl512s_256k have common id information till 5 bytes and 6th byte have different family id like FS and FL-S as 0x81 and 0x80.
Reported-by: Vignesh R vigneshr@ti.com Signed-off-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 4ec2255..8f9520f 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -99,7 +99,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
- {"s25fs512s", INFO(0x010220, 0x4d00, 128 * 1024, 512, RD_FULL |
WR_QPP) },
- {"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512,
RD_FULL | WR_QPP) },
As I said in my earlier comments, Please add SECT_4K, otherwise it will be broken.
Thanks, Siva
{"s25fl512s_256k", INFO(0x010220, 0x4d00, 256 * 1024, 256, RD_FULL | WR_QPP) }, {"s25fl512s_64k", INFO(0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL | WR_QPP) }, {"s25fl512s_512k", INFO(0x010220, 0x4f00, 256 * 1024, 256, RD_FULL | WR_QPP) }, -- 1.9.1
U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot

On Wed, Nov 16, 2016 at 12:32 PM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Jagan Teki Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com Subject: [U-Boot] [PATCH v6 21/21] sf: Fix s25fs512s id param table
s25fs512s and s25fl512s_256k have common id information till 5 bytes and 6th byte have different family id like FS and FL-S as 0x81 and 0x80.
Reported-by: Vignesh R vigneshr@ti.com Signed-off-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 4ec2255..8f9520f 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -99,7 +99,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
{"s25fs512s", INFO(0x010220, 0x4d00, 128 * 1024, 512, RD_FULL |
WR_QPP) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512,
RD_FULL | WR_QPP) },
As I said in my earlier comments, Please add SECT_4K, otherwise it will be broken.
If SECT_4K need then it should be an existing issue, but Vignesh R tested this already. Vignesh any comment?
thanks!

Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 6:15 PM To: Siva Durga Prasad Paladugu sivadur@xilinx.com Cc: u-boot@lists.denx.de; Vignesh R vigneshr@ti.com Subject: Re: [U-Boot] [PATCH v6 21/21] sf: Fix s25fs512s id param table
On Wed, Nov 16, 2016 at 12:32 PM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Jagan Teki Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com Subject: [U-Boot] [PATCH v6 21/21] sf: Fix s25fs512s id param table
s25fs512s and s25fl512s_256k have common id information till 5 bytes and 6th byte have different family id like FS and FL-S as 0x81 and 0x80.
Reported-by: Vignesh R vigneshr@ti.com Signed-off-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 4ec2255..8f9520f 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -99,7 +99,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
{"s25fs512s", INFO(0x010220, 0x4d00, 128 * 1024, 512, RD_FULL |
WR_QPP) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512,
RD_FULL | WR_QPP) },
As I said in my earlier comments, Please add SECT_4K, otherwise it will be
broken.
If SECT_4K need then it should be an existing issue, but Vignesh R tested this already. Vignesh any comment?
No, previously, you are disabling 4K sector erase using spansion_s25fss_disable_4KB_erase() routine and making the device as uniform sector size and hence I think no issues previously without 4k erase commands. But now, as you removed it(spansion_s25fss_disable_4KB_erase() ) in 10/21, normal sector erase command may not work on top/bottom sectors with 4k sector size and it may fail now.
Thanks, Siva
thanks!
Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.

On Wed, Nov 16, 2016 at 6:34 PM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 6:15 PM To: Siva Durga Prasad Paladugu sivadur@xilinx.com Cc: u-boot@lists.denx.de; Vignesh R vigneshr@ti.com Subject: Re: [U-Boot] [PATCH v6 21/21] sf: Fix s25fs512s id param table
On Wed, Nov 16, 2016 at 12:32 PM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Jagan Teki Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com Subject: [U-Boot] [PATCH v6 21/21] sf: Fix s25fs512s id param table
s25fs512s and s25fl512s_256k have common id information till 5 bytes and 6th byte have different family id like FS and FL-S as 0x81 and 0x80.
Reported-by: Vignesh R vigneshr@ti.com Signed-off-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 4ec2255..8f9520f 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -99,7 +99,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
{"s25fs512s", INFO(0x010220, 0x4d00, 128 * 1024, 512, RD_FULL |
WR_QPP) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512,
RD_FULL | WR_QPP) },
As I said in my earlier comments, Please add SECT_4K, otherwise it will be
broken.
If SECT_4K need then it should be an existing issue, but Vignesh R tested this already. Vignesh any comment?
No, previously, you are disabling 4K sector erase using spansion_s25fss_disable_4KB_erase() routine and making the device as uniform sector size and hence I think no issues previously without 4k erase commands. But now, as you removed it(spansion_s25fss_disable_4KB_erase() ) in 10/21, normal sector erase command may not work on top/bottom sectors with 4k sector size and it may fail now.
OK, Wait for Vignesh test will update that fix as well.
thanks!

On Wed, Nov 16, 2016 at 7:17 PM, Jagan Teki jagan@openedev.com wrote:
On Wed, Nov 16, 2016 at 6:34 PM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: Jagan Teki [mailto:jagan@openedev.com] Sent: Wednesday, November 16, 2016 6:15 PM To: Siva Durga Prasad Paladugu sivadur@xilinx.com Cc: u-boot@lists.denx.de; Vignesh R vigneshr@ti.com Subject: Re: [U-Boot] [PATCH v6 21/21] sf: Fix s25fs512s id param table
On Wed, Nov 16, 2016 at 12:32 PM, Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com wrote:
Hi,
-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Jagan Teki Sent: Wednesday, November 16, 2016 9:33 AM To: u-boot@lists.denx.de Cc: Jagan Teki jagan@openedev.com Subject: [U-Boot] [PATCH v6 21/21] sf: Fix s25fs512s id param table
s25fs512s and s25fl512s_256k have common id information till 5 bytes and 6th byte have different family id like FS and FL-S as 0x81 and 0x80.
Reported-by: Vignesh R vigneshr@ti.com Signed-off-by: Jagan Teki jagan@openedev.com
drivers/mtd/spi/spi_flash_ids.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 4ec2255..8f9520f 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -99,7 +99,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
{"s25fs512s", INFO(0x010220, 0x4d00, 128 * 1024, 512, RD_FULL |
WR_QPP) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512,
RD_FULL | WR_QPP) },
As I said in my earlier comments, Please add SECT_4K, otherwise it will be
broken.
If SECT_4K need then it should be an existing issue, but Vignesh R tested this already. Vignesh any comment?
No, previously, you are disabling 4K sector erase using spansion_s25fss_disable_4KB_erase() routine and making the device as uniform sector size and hence I think no issues previously without 4k erase commands. But now, as you removed it(spansion_s25fss_disable_4KB_erase() ) in 10/21, normal sector erase command may not work on top/bottom sectors with 4k sector size and it may fail now.
True, I will add SECT_4K on "sf: Remove legacy idcode detection code" patch to make sure this shouldn't break the s25fs512s.
thanks!

On Wednesday 16 November 2016 07:17 PM, Jagan Teki wrote:
On Wed, Nov 16, 2016 at 6:34 PM, Siva Durga Prasad Paladugu
[...]
diff --git a/drivers/mtd/spi/spi_flash_ids.c b/drivers/mtd/spi/spi_flash_ids.c index 4ec2255..8f9520f 100644 --- a/drivers/mtd/spi/spi_flash_ids.c +++ b/drivers/mtd/spi/spi_flash_ids.c @@ -99,7 +99,7 @@ const struct spi_flash_info spi_flash_ids[] = { {"s25fl256s_256k", INFO(0x010219, 0x4d00, 256 * 1024, 128, RD_FULL | WR_QPP) }, {"s25fl256s_64k", INFO(0x010219, 0x4d01, 64 * 1024, 512, RD_FULL | WR_QPP) }, {"s25fs256s_64k", INFO6(0x010219, 0x4d0181, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K) },
{"s25fs512s", INFO(0x010220, 0x4d00, 128 * 1024, 512, RD_FULL |
WR_QPP) },
{"s25fs512s", INFO6(0x010220, 0x4d0081, 128 * 1024, 512,
RD_FULL | WR_QPP) },
As I said in my earlier comments, Please add SECT_4K, otherwise it will be
broken.
If SECT_4K need then it should be an existing issue, but Vignesh R tested this already. Vignesh any comment?
No, I gave my Tested-by for s25fl512s and not for s25fs series. Before this patch, s25fl512s was detected as s25fs512s and flash writes used to fail on s25fl512s. After this patch, s25fl512s is detected correctly and flash writes are fine.
No, previously, you are disabling 4K sector erase using spansion_s25fss_disable_4KB_erase() routine and making the device as uniform sector size and hence I think no issues previously without 4k erase commands. But now, as you removed it(spansion_s25fss_disable_4KB_erase() ) in 10/21, normal sector erase command may not work on top/bottom sectors with 4k sector size and it may fail now.
OK, Wait for Vignesh test will update that fix as well.
thanks!

On Wed, Nov 16, 2016 at 9:32 AM, Jagan Teki jagan@openedev.com wrote:
From: Jagan Teki jagan@amarulasolutions.com
Updated spi_flash_info table in sync with Linux, and removed legacy and unsupported code.
Changes for v6:
- Fix few comments from Simon
- Rebase to master
Changes for v5:
- Add dataflash fixes in this series
- Rebase to master
Changes for v4:
- Rebase to master
Changes for v3:
- New patches
- Fix checkpatch.pl
- Fix BIT positions in spi.h
- Fix ti_qspi.c mode
- Fix commit Nit: s/becuase/because
Changes for v2:
- New patches.
Testing: $ git clone git://git.denx.de/u-boot-spi.git $ cd u-boot-spi $ git checkout -b next origin/next
buildman:
$ ./tools/buildman/buildman -b next -c 21 -se boards.cfg is up to date. Nothing to do. Summary of 21 commits for 1219 boards (12 threads, 1 job per thread) 01: sf: Adopt flash table INFO macro from Linux blackfin: + cm-bf561 blackstamp bf527-ezkit-v2 cm-bf527 bf506f-ezkit ip04 bf527-sdp bf527-ad7160-eval bf609-ezkit tcm-bf518 bf527-ezkit bf533-ezkit ibf-dsp561 bf537-minotaur bf537-pnav bf537-srv1 cm-bf548 bf548-ezkit bf525-ucr2 blackvme pr1 bf518f-ezbrd bf526-ezbrd br4 x86: + galileo conga-qeval20-qa3-e3845-internal-uart coreboot-x86 qemu-x86_efi_payload32 conga-qeval20-qa3-e3845 bayleybay theadorable-x86-dfi-bt700 qemu-x86_efi_payload64 minnowmax dfi-bt700-q7x-151 efi-x86 som-db5800-som-6867 +/bin/sh: 1: bfin-uclinux-ldr: not found +make[1]: *** [u-boot.ldr] Error 127 +make: *** [sub-make] Error 2 +make[1]: bfin-uclinux-ldr: Command not found +/bin/sh: 1: iasl: not found +mv: cannot stat '../board/intel/galileo/dsdt.hex': No such file or directory +make[2]: *** [board/intel/galileo/dsdt.c] Error 1 +make[1]: *** [board/intel/galileo] Error 2 +cc1: error: -mcpu=bf506-0.0 is not valid +cc1: error: unrecognized command line option '-mcpu=bf506-0.0' +make[2]: *** [u-boot.cfg] Error 1 +make[1]: *** No rule to make target `include/config/auto.conf', needed by `include/config/uboot.release'. Stop. +cc1: error: -mcpu=bf609-0.0 is not valid +cc1: error: unrecognized command line option '-mcpu=bf609-0.0' +mv: cannot stat '../board/congatec/conga-qeval20-qa3-e3845/dsdt.hex': No such file or directory +make[2]: *** [board/congatec/conga-qeval20-qa3-e3845/dsdt.c] Error 1 +make[1]: *** [board/congatec/conga-qeval20-qa3-e3845] Error 2
- static u32 write_smbios_table_wrapper(u32 addr)
^
+mv: cannot stat '../board/dfi/dfi-bt700/dsdt.hex': No such file or directory +make[2]: *** [board/dfi/dfi-bt700/dsdt.c] Error 1 +make[1]: *** [board/dfi/dfi-bt700] Error 2 +mv: cannot stat '../board/intel/bayleybay/dsdt.hex': No such file or directory +make[2]: *** [board/intel/bayleybay/dsdt.c] Error 1 +make[1]: *** [board/intel/bayleybay] Error 2 +../arch/x86/lib/efi/crt0-efi-x86_64.S: Assembler messages: +../arch/x86/lib/efi/crt0-efi-x86_64.S:16: Error: bad register name `%rsp' +../arch/x86/lib/efi/crt0-efi-x86_64.S:17: Error: bad register name `%rcx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:18: Error: bad register name `%rdx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:21: Error: bad register name `%rip)' +../arch/x86/lib/efi/crt0-efi-x86_64.S:22: Error: bad register name `%rip)' +../arch/x86/lib/efi/crt0-efi-x86_64.S:24: Error: bad register name `%rcx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:25: Error: bad register name `%rdx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:26: Error: bad register name `%rcx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:27: Error: bad register name `%rdx' +../arch/x86/lib/efi/crt0-efi-x86_64.S:30: Error: bad register name `%rdi' +../arch/x86/lib/efi/crt0-efi-x86_64.S:31: Error: bad register name `%rsi' +../arch/x86/lib/efi/crt0-efi-x86_64.S:34: Error: bad register name `%rsp' +../arch/x86/lib/efi/crt0-efi-x86_64.S:47: Warning: setting incorrect section attributes for .reloc +make[3]: *** [arch/x86/lib/efi/crt0-efi-x86_64.o] Error 1 +make[2]: *** [arch/x86/lib/efi] Error 2 +make[1]: *** [arch/x86/lib] Error 2 +mv: cannot stat '../board/intel/minnowmax/dsdt.hex': No such file or directory +make[2]: *** [board/intel/minnowmax/dsdt.c] Error 1 +make[1]: *** [board/intel/minnowmax] Error 2 +mv: cannot stat '../board/advantech/som-db5800-som-6867/dsdt.hex': No such file or directory +make[2]: *** [board/advantech/som-db5800-som-6867/dsdt.c] Error 1 +make[1]: *** [board/advantech/som-db5800-som-6867] Error 2 w+../drivers/usb/musb/musb_hcd.c: In function 'config_hub_port': w+../drivers/usb/musb/musb_hcd.c:405:5: warning: variable 'hub' set but not used [-Wunused-but-set-variable] w+../drivers/usb/musb/musb_core.c: In function 'musb_configure_ep': w+../drivers/usb/musb/musb_core.c:71:6: warning: variable 'idx' set but not used [-Wunused-but-set-variable] w+../arch/x86/lib/tables.c:15:12: warning: 'write_smbios_table_wrapper' defined but not used [-Wunused-function] w+../board/bf533-ezkit/flash.c: In function 'read_data': w+../board/bf533-ezkit/flash.c:241:6: warning: variable 'iShift' set but not used [-Wunused-but-set-variable] w+../drivers/net/ax88180.c: In function 'ax88180_mac_reset': w+../drivers/net/ax88180.c:132:16: warning: variable 'tmpval' set but not used [-Wunused-but-set-variable] w+../drivers/net/ax88180.c: In function 'ax88180_recv': w+../drivers/net/ax88180.c:577:17: warning: variable 'tmp_regval' set but not used [-Wunused-but-set-variable] 02: sf: Simplify lock ops detection code 03: sf: sandbox: Use JEDEC_MFR|ID in id exctract 04: sf: Cleanup spi_flash_info{} 05: sf: nr_sectors -> n_sectors 06: sf: Add SPI_FLASH_MAX_ID_LEN 07: sf: Increase max id length by 1 byte 08: sf: Add INFO6 flash_info macro 09: sf: params: Add S25FS256S_64K spi flash support 10: sf: Remove legacy idcode detection code 11: sf: Remove non-meaningful comments 12: sf: Rename sf_params.c to spi_flash_ids.c 13: sf: ids: Use small letter's with flash name 14: sf: ids: Use small letter in ext_jedec 15: sf: Rename few local functions 16: spi: Remove dual flash options/flags 17: sf: dataflash: Remove unneeded spi data 18: sf: dataflash: Move flash id detection into jedec_probe 19: sf: dataflash: Fix add_dataflash return logic 20: sf: dataflash: Minor cleanups 21: sf: Fix s25fs512s id param table
$ ./tools/buildman/buildman -b next -c 21 -sS boards.cfg is up to date. Nothing to do. Summary of 21 commits for 1219 boards (12 threads, 1 job per thread) 01: sf: Adopt flash table INFO macro from Linux blackfin: + cm-bf561 blackstamp bf527-ezkit-v2 cm-bf527 bf506f-ezkit ip04 bf527-sdp bf527-ad7160-eval bf609-ezkit tcm-bf518 bf527-ezkit bf533-ezkit ibf-dsp561 bf537-minotaur bf537-pnav bf537-srv1 cm-bf548 bf548-ezkit bf525-ucr2 blackvme pr1 bf518f-ezbrd bf526-ezbrd br4 x86: + galileo conga-qeval20-qa3-e3845-internal-uart coreboot-x86 qemu-x86_efi_payload32 conga-qeval20-qa3-e3845 bayleybay theadorable-x86-dfi-bt700 qemu-x86_efi_payload64 minnowmax dfi-bt700-q7x-151 efi-x86 som-db5800-som-6867 02: sf: Simplify lock ops detection code avr32: (for 4/4 boards) all -2.0 text -2.0 powerpc: (for 415/415 boards) all +0.0 rodata +0.0 arm: (for 560/560 boards) all -1.6 bss -0.6 spl/u-boot-spl:all -0.2 spl/u-boot-spl:text -0.2 text -1.1 03: sf: sandbox: Use JEDEC_MFR|ID in id exctract 04: sf: Cleanup spi_flash_info{} powerpc: (for 415/415 boards) all -0.0 rodata -0.0 05: sf: nr_sectors -> n_sectors powerpc: (for 415/415 boards) all +0.0 rodata +0.0 06: sf: Add SPI_FLASH_MAX_ID_LEN 07: sf: Increase max id length by 1 byte m68k: (for 48/48 boards) all +12.1 data +12.1 powerpc: (for 415/415 boards) all -0.0 rodata -0.0 08: sf: Add INFO6 flash_info macro powerpc: (for 415/415 boards) all +0.0 rodata +0.0 09: sf: params: Add S25FS256S_64K spi flash support blackfin: (for 33/35 boards) all +2.4 rodata +2.4 aarch64: (for 61/61 boards) all +16.1 rodata +10.6 text +5.5 powerpc: (for 415/415 boards) all +14.3 data +8.2 rodata +4.8 spl/u-boot-spl:all +1.6 spl/u-boot-spl:data +1.4 spl/u-boot-spl:text +0.2 text +1.4 sandbox: (for 3/3 boards) all +48.0 rodata +48.0 mips: (for 35/35 boards) all +4.6 bss +0.5 data +2.1 rodata +1.4 text +0.7 arm: (for 560/560 boards) all +2.2 bss -0.2 rodata +2.0 spl/u-boot-spl:all +1.4 spl/u-boot-spl:rodata +1.4 text +0.4 10: sf: Remove legacy idcode detection code blackfin: (for 33/35 boards) all -16.2 text -16.2 aarch64: (for 61/61 boards) all -66.5 text -66.5 powerpc: (for 415/415 boards) all -115.6 spl/u-boot-spl:all -13.1 spl/u-boot-spl:text -13.1 text -115.6 sandbox: (for 3/3 boards) all -304.0 text -304.0 mips: (for 35/35 boards) all -34.4 bss -0.5 text -33.9 arm: (for 560/560 boards) all -12.7 bss +0.1 spl/u-boot-spl:all -8.9 spl/u-boot-spl:text -8.9 text -12.7 11: sf: Remove non-meaningful comments 12: sf: Rename sf_params.c to spi_flash_ids.c 13: sf: ids: Use small letter's with flash name blackfin: (for 33/35 boards) all +0.1 rodata +0.1 aarch64: (for 61/61 boards) all +0.1 rodata +0.1 powerpc: (for 415/415 boards) all -0.1 rodata -0.1 mips: (for 35/35 boards) all -5.7 bss +0.5 rodata -6.2 arm: (for 560/560 boards) bss -0.0 rodata +0.0 14: sf: ids: Use small letter in ext_jedec 15: sf: Rename few local functions 16: spi: Remove dual flash options/flags blackfin: (for 33/35 boards) all -0.6 text -0.6 x86: (for 9/18 boards) all -2.2 bss +1.3 text -3.6 aarch64: (for 61/61 boards) all -2.4 text -2.4 avr32: (for 4/4 boards) all -4.0 text -4.0 m68k: (for 48/48 boards) all -3.2 text -3.2 powerpc: (for 415/415 boards) all -2.3 spl/u-boot-spl:all -0.2 spl/u-boot-spl:text -0.2 text -2.3 mips: (for 35/35 boards) all -0.3 text -0.3 arm: (for 560/560 boards) all -0.8 bss +0.4 rodata -0.0 spl/u-boot-spl:all -0.3 spl/u-boot-spl:text -0.3 text -1.2 17: sf: dataflash: Remove unneeded spi data mips: (for 35/35 boards) all -2.4 text -2.4 arm: (for 560/560 boards) all -0.4 bss -0.4 rodata +0.0 text -0.1 18: sf: dataflash: Move flash id detection into jedec_probe mips: (for 35/35 boards) all -1.8 bss -0.5 text -1.4 arm: (for 560/560 boards) bss +0.1 text -0.1 19: sf: dataflash: Fix add_dataflash return logic mips: (for 35/35 boards) all +12.8 bss +0.3 data +0.3 text +12.1 arm: (for 560/560 boards) bss -0.1 text +0.1 20: sf: dataflash: Minor cleanups mips: (for 35/35 boards) all -6.6 bss -0.5 rodata -3.1 text -3.1 arm: (for 560/560 boards) all -0.0 bss +0.2 rodata -0.1 text -0.1 21: sf: Fix s25fs512s id param table
Jagan Teki (21): sf: Adopt flash table INFO macro from Linux sf: Simplify lock ops detection code sf: sandbox: Use JEDEC_MFR|ID in id exctract sf: Cleanup spi_flash_info{} sf: nr_sectors -> n_sectors sf: Add SPI_FLASH_MAX_ID_LEN sf: Increase max id length by 1 byte sf: Add INFO6 flash_info macro sf: params: Add S25FS256S_64K spi flash support sf: Remove legacy idcode detection code sf: Remove non-meaningful comments sf: Rename sf_params.c to spi_flash_ids.c sf: ids: Use small letter's with flash name sf: ids: Use small letter in ext_jedec sf: Rename few local functions spi: Remove dual flash options/flags sf: dataflash: Remove unneeded spi data sf: dataflash: Move flash id detection into jedec_probe sf: dataflash: Fix add_dataflash return logic sf: dataflash: Minor cleanups sf: Fix s25fs512s id param table
Except v7 patches from this series, rest
Applied to u-boot-spi/master
thanks!
participants (4)
-
Jagan Teki
-
Siva Durga Prasad Paladugu
-
Vignesh R
-
york sun