[U-Boot] [PATCH 0/8][RESEND] Device Tree support for PowerPC in u-boot

In current implementation, PowerPC does not support device tree in u-boot. This patch enables device tree support for PowerPC platform .
T2080AQDS board used as first platform.
Dtb is embedded in the u-boot following below steps using binmam tool.
1. Remove bootpg and resetvec section if required 2. Append dtb using binman 3. Append bootpg and resetvec section back if removed in 1st step.
To enable binman tool, 'binman' node has been added in the device tree.
Resend with adding missed u-boot mailing list
Jagdish Gediya (8): powerpc/dts: setup fdt blob at __init_end powerpc/dts: makefile changes to clean and build dts binman: Add a new "start-pos" property in section class binman: Add support for powerpc 'bootpg + resetvec' entry powerpc: mpc85xx: select BINMAN by default powerpc: dts: add u-boot.dtsi and mpc85xx-u-boot.dtsi powerpc: mpc85xx: Use binman to embed dtb inside u-boot powerpc: dts: Enable device tree support for T2080QDS
Makefile | 30 ++++++++++++- arch/powerpc/Kconfig | 1 + arch/powerpc/cpu/mpc8xxx/fdt.c | 12 +++++ arch/powerpc/dts/Makefile | 14 ++++++ arch/powerpc/dts/e6500_power_isa.dtsi | 39 ++++++++++++++++ arch/powerpc/dts/mpc85xx-u-boot.dtsi | 16 +++++++ arch/powerpc/dts/t2080qds.dts | 17 +++++++ arch/powerpc/dts/t2080qds.dtsi | 64 +++++++++++++++++++++++++++ arch/powerpc/dts/u-boot.dtsi | 31 +++++++++++++ board/freescale/t208xqds/README | 17 +++++++ configs/T2080QDS_NAND_defconfig | 3 +- configs/T2080QDS_SDCARD_defconfig | 3 +- configs/T2080QDS_SPIFLASH_defconfig | 3 +- configs/T2080QDS_defconfig | 3 +- dts/Makefile | 2 +- tools/binman/bsection.py | 13 +++++- tools/binman/etype/mpc85xx_bootpg_resetvec.py | 15 +++++++ 17 files changed, 274 insertions(+), 9 deletions(-) create mode 100644 arch/powerpc/dts/Makefile create mode 100644 arch/powerpc/dts/e6500_power_isa.dtsi create mode 100644 arch/powerpc/dts/mpc85xx-u-boot.dtsi create mode 100644 arch/powerpc/dts/t2080qds.dts create mode 100644 arch/powerpc/dts/t2080qds.dtsi create mode 100644 arch/powerpc/dts/u-boot.dtsi create mode 100644 tools/binman/etype/mpc85xx_bootpg_resetvec.py

'__init_end' is defined in ld file. define 'board_fdt_blob_setup' to setup the fdt blob at '&__init_end'.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- arch/powerpc/cpu/mpc8xxx/fdt.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 0d877c4..a7f61fe 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -12,6 +12,7 @@ #include <fdt_support.h> #include <asm/mp.h> #include <asm/fsl_serdes.h> +#include <asm/sections.h> #include <phy.h> #include <hwconfig.h>
@@ -19,6 +20,17 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #endif
+#ifdef CONFIG_OF_SEPARATE +void *board_fdt_blob_setup(void) +{ + void *fdt_blob = NULL; + + fdt_blob = (ulong *)&__init_end; + + return fdt_blob; +} +#endif + #if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) static int ft_del_cpuhandle(void *blob, int cpuhandle) {

Hi Jagdish,
On Wed, Aug 22, 2018 at 2:18 AM, Jagdish Gediya jagdish.gediya@nxp.com wrote:
'__init_end' is defined in ld file. define 'board_fdt_blob_setup' to setup the fdt blob at '&__init_end'.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
arch/powerpc/cpu/mpc8xxx/fdt.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 0d877c4..a7f61fe 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -12,6 +12,7 @@ #include <fdt_support.h> #include <asm/mp.h> #include <asm/fsl_serdes.h> +#include <asm/sections.h> #include <phy.h> #include <hwconfig.h>
@@ -19,6 +20,17 @@ #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 #endif
+#ifdef CONFIG_OF_SEPARATE +void *board_fdt_blob_setup(void)
Instead of creating an mpc85xx-specific board_fdt_blob_setup(), can we modify the mpc85xx linker scripts to use common _end symbol instead of the __init_end symbol so that the generic board_fdt_blob_setup() can be used?
+{
void *fdt_blob = NULL;
fdt_blob = (ulong *)&__init_end;
return fdt_blob;
+} +#endif
#if defined(CONFIG_MP) && (defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) static int ft_del_cpuhandle(void *blob, int cpuhandle) { --
Regards, Bin

Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- arch/powerpc/dts/Makefile | 12 ++++++++++++ dts/Makefile | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) create mode 100644 arch/powerpc/dts/Makefile
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile new file mode 100644 index 0000000..de14e7b --- /dev/null +++ b/arch/powerpc/dts/Makefile @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ + +targets += $(dtb-y) + +# Add any required device tree compiler flags here +DTC_FLAGS += + +PHONY += dtbs +dtbs: $(addprefix $(obj)/, $(dtb-y)) + @: + +clean-files := *.dtb diff --git a/dts/Makefile b/dts/Makefile index 36dfbe7..9a9a3d5 100644 --- a/dts/Makefile +++ b/dts/Makefile @@ -61,4 +61,4 @@ dtbs: $(obj)/dt.dtb $(obj)/dt-spl.dtb clean-files := dt.dtb.S dt-spl.dtb.S
# Let clean descend into dts directories -subdir- += ../arch/arm/dts ../arch/microblaze/dts ../arch/mips/dts ../arch/sandbox/dts ../arch/x86/dts +subdir- += ../arch/arm/dts ../arch/microblaze/dts ../arch/mips/dts ../arch/sandbox/dts ../arch/x86/dts ../arch/powerpc/dts

On Wed, Aug 22, 2018 at 2:18 AM, Jagdish Gediya jagdish.gediya@nxp.com wrote:
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
arch/powerpc/dts/Makefile | 12 ++++++++++++ dts/Makefile | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) create mode 100644 arch/powerpc/dts/Makefile
Reviewed-by: Bin Meng bmeng.cn@gmail.com

currently binman calculates '_skip_at_start' based on 'end-at-4gb' property and it is used for x86 images.
for powerpc architecture also, '_skip_at_start' should be set because memory address 0xeff40000 or 0xfff40000 is the first entry offset. 'end-at-4gb' property is not applicable for 0xeff40000 first entry offset.
add new property start-pos' in section class so that '_skip_at_start' can be calculated either based on 'end-at-4gb' or based on 'start-pos'
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- tools/binman/bsection.py | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/tools/binman/bsection.py b/tools/binman/bsection.py index a0bd1b6..71f276d 100644 --- a/tools/binman/bsection.py +++ b/tools/binman/bsection.py @@ -40,6 +40,10 @@ class Section(object): used for x86 images, which want to use offsets such that a memory address (like 0xff800000) is the first entry offset. This causes _skip_at_start to be set to the starting memory address. + _start_pos: For powerpc, memory address 0xeff40000 or 0xfff40000 is the + first entry offset. _end_4gb is not re-usable if first entry offset + is 0xeff40000. _start_pos causes _skip_at_start to be set to the + starting memory address. _name_prefix: Prefix to add to the name of all entries within this section _entries: OrderedDict() of entries @@ -61,6 +65,7 @@ class Section(object): self._sort = False self._skip_at_start = 0 self._end_4gb = False + self._start_pos = 0 self._name_prefix = '' self._entries = OrderedDict() if not test: @@ -79,10 +84,14 @@ class Section(object): self._pad_byte = fdt_util.GetInt(self._node, 'pad-byte', 0) self._sort = fdt_util.GetBool(self._node, 'sort-by-offset') self._end_4gb = fdt_util.GetBool(self._node, 'end-at-4gb') - if self._end_4gb and not self._size: - self._Raise("Section size must be provided when using end-at-4gb") + self._start_pos = fdt_util.GetInt(self._node, 'start-pos', 0) + if (self._end_4gb or self._start_pos) and not self._size: + self._Raise("Section size must be provided when using end-at-4gb or " + "start-pos") if self._end_4gb: self._skip_at_start = 0x100000000 - self._size + if self._start_pos: + self._skip_at_start = self._start_pos self._name_prefix = fdt_util.GetString(self._node, 'name-prefix')
def _ReadEntries(self):

On Wed, Aug 22, 2018 at 2:06 AM, Jagdish Gediya jagdish.gediya@nxp.com wrote:
currently binman calculates '_skip_at_start' based on 'end-at-4gb'
nits: Currently
property and it is used for x86 images.
for powerpc architecture also, '_skip_at_start' should be set because
powerpc -> PowerPC Book-E, or maybe just e500?
memory address 0xeff40000 or 0xfff40000 is the first entry offset.
I think you need describe in more details about what these addresses are, for example I believe they are the flash address where you want to store the u-boot image in the flash?
'end-at-4gb' property is not applicable for 0xeff40000 first entry offset.
add new property start-pos' in section class so that
nits: Add a property 'start-pos' in Section
'_skip_at_start' can be calculated either based on 'end-at-4gb' or based on 'start-pos'
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
tools/binman/bsection.py | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/tools/binman/bsection.py b/tools/binman/bsection.py index a0bd1b6..71f276d 100644 --- a/tools/binman/bsection.py +++ b/tools/binman/bsection.py @@ -40,6 +40,10 @@ class Section(object): used for x86 images, which want to use offsets such that a memory address (like 0xff800000) is the first entry offset. This causes _skip_at_start to be set to the starting memory address.
_start_pos: For powerpc, memory address 0xeff40000 or 0xfff40000 is the
powerpc -> PowerPC Book-E or e500?
Also please describe some details about these addresses.
first entry offset. _end_4gb is not re-usable if first entry offset
is 0xeff40000. _start_pos causes _skip_at_start to be set to the
starting memory address. _name_prefix: Prefix to add to the name of all entries within this section _entries: OrderedDict() of entries
@@ -61,6 +65,7 @@ class Section(object): self._sort = False self._skip_at_start = 0 self._end_4gb = False
self._start_pos = 0 self._name_prefix = '' self._entries = OrderedDict() if not test:
@@ -79,10 +84,14 @@ class Section(object): self._pad_byte = fdt_util.GetInt(self._node, 'pad-byte', 0) self._sort = fdt_util.GetBool(self._node, 'sort-by-offset') self._end_4gb = fdt_util.GetBool(self._node, 'end-at-4gb')
if self._end_4gb and not self._size:
self._Raise("Section size must be provided when using end-at-4gb")
self._start_pos = fdt_util.GetInt(self._node, 'start-pos', 0)
if (self._end_4gb or self._start_pos) and not self._size:
self._Raise("Section size must be provided when using end-at-4gb or "
"start-pos") if self._end_4gb: self._skip_at_start = 0x100000000 - self._size
if self._start_pos:
self._skip_at_start = self._start_pos
So the _start_pos takes precedence over the _end_4gb, please document this. Or if you don't want the precedence, use elif
self._name_prefix = fdt_util.GetString(self._node, 'name-prefix') def _ReadEntries(self):
--
Regards, Bin

This entry contains the powerpc boot page and resetvec sections.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- tools/binman/etype/mpc85xx_bootpg_resetvec.py | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 tools/binman/etype/mpc85xx_bootpg_resetvec.py
diff --git a/tools/binman/etype/mpc85xx_bootpg_resetvec.py b/tools/binman/etype/mpc85xx_bootpg_resetvec.py new file mode 100644 index 0000000..d76fe95 --- /dev/null +++ b/tools/binman/etype/mpc85xx_bootpg_resetvec.py @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2018 NXP +# +# Entry-type module for the mpc85xx bootpg and resetvec code for U-Boot +# + +from entry import Entry +from blob import Entry_blob + +class Entry_mpc85xx_bootpg_resetvec(Entry_blob): + def __init__(self, section, etype, node): + Entry_blob.__init__(self, section, etype, node) + + def GetDefaultFilename(self): + return 'u-boot-br.bin'

On Wed, Aug 22, 2018 at 2:18 AM, Jagdish Gediya jagdish.gediya@nxp.com wrote:
This entry contains the powerpc boot page and resetvec sections.
Again, PowerPC Book-E or e500 would be better since other PowerPC variants like 60x (mpc83xx) does not have boot page and resetvec sections.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
tools/binman/etype/mpc85xx_bootpg_resetvec.py | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 tools/binman/etype/mpc85xx_bootpg_resetvec.py
diff --git a/tools/binman/etype/mpc85xx_bootpg_resetvec.py b/tools/binman/etype/mpc85xx_bootpg_resetvec.py new file mode 100644 index 0000000..d76fe95 --- /dev/null +++ b/tools/binman/etype/mpc85xx_bootpg_resetvec.py @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2018 NXP +# +# Entry-type module for the mpc85xx bootpg and resetvec code for U-Boot +#
+from entry import Entry +from blob import Entry_blob
+class Entry_mpc85xx_bootpg_resetvec(Entry_blob):
Please adjust the name here accordingly.
- def __init__(self, section, etype, node):
Entry_blob.__init__(self, section, etype, node)
- def GetDefaultFilename(self):
return 'u-boot-br.bin'
--
Regards, Bin

Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- arch/powerpc/Kconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 8faef0b..c727d91 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -20,6 +20,7 @@ config MPC85xx select CREATE_ARCH_SYMLINK select SYS_FSL_DDR select SYS_FSL_DDR_BE + select BINMAN imply CMD_HASH imply CMD_IRQ imply USB_EHCI_HCD if USB

On Wed, Aug 22, 2018 at 2:18 AM, Jagdish Gediya jagdish.gediya@nxp.com wrote:
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
arch/powerpc/Kconfig | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Bin Meng bmeng.cn@gmail.com
But I suspect you probably need adjust this patch's order to make it come later in this series?

add required binman node inside dts to use binman to prepare u-boot-dtb.bin
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- arch/powerpc/dts/mpc85xx-u-boot.dtsi | 16 ++++++++++++++++ arch/powerpc/dts/u-boot.dtsi | 31 +++++++++++++++++++++++++++++++ 2 files changed, 47 insertions(+) create mode 100644 arch/powerpc/dts/mpc85xx-u-boot.dtsi create mode 100644 arch/powerpc/dts/u-boot.dtsi
diff --git a/arch/powerpc/dts/mpc85xx-u-boot.dtsi b/arch/powerpc/dts/mpc85xx-u-boot.dtsi new file mode 100644 index 0000000..637db11 --- /dev/null +++ b/arch/powerpc/dts/mpc85xx-u-boot.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +#include <u-boot.dtsi> + +/ { +#if defined(CONFIG_BINMAN) + binman { + u-boot-with-ucode-ptr { + optional-ucode; + }; + }; +#endif +}; diff --git a/arch/powerpc/dts/u-boot.dtsi b/arch/powerpc/dts/u-boot.dtsi new file mode 100644 index 0000000..ebe160f --- /dev/null +++ b/arch/powerpc/dts/u-boot.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +#include <config.h> + +/ { +#if defined(CONFIG_BINMAN) && defined(CONFIG_MPC85xx) + binman { + filename = "u-boot-dtb.bin"; + start-pos = <CONFIG_SYS_TEXT_BASE>; + sort-by-pos; + pad-byte = <0xff>; + size = <CONFIG_SYS_MONITOR_LEN>; + + u-boot-with-ucode-ptr { + offset = <CONFIG_SYS_TEXT_BASE>; + }; + + u-boot-dtb-with-ucode { + align = <256>; + }; +#if !defined(CONFIG_SYS_MPC85XX_NO_RESETVEC) && !defined(CONFIG_NAND) + mpc85xx-bootpg-resetvec { + offset = <(CONFIG_RESET_VECTOR_ADDRESS - 0xffc)>; + }; +#endif + }; +#endif +};

On Wed, Aug 22, 2018 at 2:18 AM, Jagdish Gediya jagdish.gediya@nxp.com wrote:
add required binman node inside dts to use binman to prepare
nits: Add
u-boot-dtb.bin
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
arch/powerpc/dts/mpc85xx-u-boot.dtsi | 16 ++++++++++++++++ arch/powerpc/dts/u-boot.dtsi | 31 +++++++++++++++++++++++++++++++ 2 files changed, 47 insertions(+) create mode 100644 arch/powerpc/dts/mpc85xx-u-boot.dtsi create mode 100644 arch/powerpc/dts/u-boot.dtsi
diff --git a/arch/powerpc/dts/mpc85xx-u-boot.dtsi b/arch/powerpc/dts/mpc85xx-u-boot.dtsi new file mode 100644 index 0000000..637db11 --- /dev/null +++ b/arch/powerpc/dts/mpc85xx-u-boot.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright 2018 NXP
- */
+#include <u-boot.dtsi>
+/ { +#if defined(CONFIG_BINMAN)
binman {
u-boot-with-ucode-ptr {
optional-ucode;
};
};
+#endif
Please merge this into the u-boot.dtsi, as you already used the #ifdef there for MPC85xx only.
+}; diff --git a/arch/powerpc/dts/u-boot.dtsi b/arch/powerpc/dts/u-boot.dtsi new file mode 100644 index 0000000..ebe160f --- /dev/null +++ b/arch/powerpc/dts/u-boot.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright 2018 NXP
- */
+#include <config.h>
+/ { +#if defined(CONFIG_BINMAN) && defined(CONFIG_MPC85xx)
binman {
filename = "u-boot-dtb.bin";
start-pos = <CONFIG_SYS_TEXT_BASE>;
sort-by-pos;
pad-byte = <0xff>;
size = <CONFIG_SYS_MONITOR_LEN>;
u-boot-with-ucode-ptr {
offset = <CONFIG_SYS_TEXT_BASE>;
};
u-boot-dtb-with-ucode {
align = <256>;
};
+#if !defined(CONFIG_SYS_MPC85XX_NO_RESETVEC) && !defined(CONFIG_NAND)
mpc85xx-bootpg-resetvec {
offset = <(CONFIG_RESET_VECTOR_ADDRESS - 0xffc)>;
};
+#endif
};
+#endif +};
Regards, Bin

Below is the sequence to embed dtb inside u-boot, 1. Remove bootpg and resetvec section if needed 2. Append dtb 3. Append bootpg and resetvec section back if removed previously
Above procedure is required only when CONFIG_MPC85xx, CONFIG_BINMAN and CONFIG_OF_SEPARATE are defined.
set PPC_MPC85XX_INCLUDE_DTB variable in Makefile if binman need to be used.
set PPC_MPC85XX_REMOVE_BOOTPG_RESETVEC variable in Makefile if bootpg and resetvec section need to be removed before appending dtb.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- Makefile | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile index 884b7d9..aad9dca 100644 --- a/Makefile +++ b/Makefile @@ -797,6 +797,13 @@ else DO_STATIC_RELA = endif
+ifeq ($(CONFIG_MPC85xx)$(CONFIG_BINMAN)$(CONFIG_OF_SEPARATE),yyy) +PPC_MPC85XX_INCLUDE_DTB := y +ifeq ($(CONFIG_SYS_MPC85XX_NO_RESETVEC)$(CONFIG_NAND),) +PPC_MPC85XX_REMOVE_BOOTPG_RESETVEC := y +endif +endif + # Always append ALL so that arch config.mk's can add custom ones ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map binary_size_check
@@ -837,6 +844,10 @@ ifneq ($(BUILD_ROM)$(CONFIG_BUILD_ROM),) ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom endif
+ifeq ($(PPC_MPC85XX_INCLUDE_DTB),y) +ALL-y += u-boot-dtb.bin +endif + # Build a combined spl + u-boot image for sunxi ifeq ($(CONFIG_ARCH_SUNXI)$(CONFIG_SPL),yy) ALL-y += u-boot-sunxi-with-spl.bin @@ -938,7 +949,7 @@ u-boot-fit-dtb.bin: u-boot-nodtb.bin fit-dtb.blob
u-boot.bin: u-boot-fit-dtb.bin FORCE $(call if_changed,copy) -else ifeq ($(CONFIG_OF_SEPARATE),y) +else ifeq ($(CONFIG_OF_SEPARATE)$(PPC_MPC85XX_INCLUDE_DTB),y) u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE $(call if_changed,cat)
@@ -979,7 +990,8 @@ spl/u-boot-spl.srec: spl/u-boot-spl FORCE $(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \ - $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) + $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \ + $(if $(PPC_MPC85XX_REMOVE_BOOTPG_RESETVEC),-R .bootpg -R .resetvec)
binary_size_check: u-boot-nodtb.bin FORCE @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \ @@ -1222,6 +1234,18 @@ u-boot-x86-16bit.bin: u-boot FORCE $(call if_changed,objcopy) endif
+ifeq ($(PPC_MPC85XX_INCLUDE_DTB), y) +u-boot-dtb.bin: u-boot.bin u-boot.dtb \ + $(if $(PPC_MPC85XX_REMOVE_BOOTPG_RESETVEC), u-boot-br.bin) FORCE + $(call if_changed,binman) + +ifeq ($(PPC_MPC85XX_REMOVE_BOOTPG_RESETVEC),y) +OBJCOPYFLAGS_u-boot-br.bin := -O binary -j .bootpg -j .resetvec +u-boot-br.bin: u-boot FORCE + $(call if_changed,objcopy) +endif +endif + ifneq ($(CONFIG_ARCH_SUNXI),) ifeq ($(CONFIG_ARM64),) u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE @@ -1291,6 +1315,8 @@ spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE
ifeq ($(ARCH),arm) UBOOT_BINLOAD := u-boot.img +else ifeq ($(PPC_MPC85XX_INCLUDE_DTB),y) +UBOOT_BINLOAD := u-boot-dtb.bin else UBOOT_BINLOAD := u-boot.bin endif

On Wed, Aug 22, 2018 at 2:18 AM, Jagdish Gediya jagdish.gediya@nxp.com wrote:
Below is the sequence to embed dtb inside u-boot,
- Remove bootpg and resetvec section if needed
- Append dtb
- Append bootpg and resetvec section back if removed previously
Above procedure is required only when CONFIG_MPC85xx, CONFIG_BINMAN and CONFIG_OF_SEPARATE are defined.
set PPC_MPC85XX_INCLUDE_DTB variable in Makefile if binman need to be used.
set PPC_MPC85XX_REMOVE_BOOTPG_RESETVEC variable in Makefile if bootpg and resetvec section need to be removed before appending dtb.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Makefile | 30 ++++++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile index 884b7d9..aad9dca 100644 --- a/Makefile +++ b/Makefile @@ -797,6 +797,13 @@ else DO_STATIC_RELA = endif
+ifeq ($(CONFIG_MPC85xx)$(CONFIG_BINMAN)$(CONFIG_OF_SEPARATE),yyy) +PPC_MPC85XX_INCLUDE_DTB := y +ifeq ($(CONFIG_SYS_MPC85XX_NO_RESETVEC)$(CONFIG_NAND),) +PPC_MPC85XX_REMOVE_BOOTPG_RESETVEC := y +endif +endif
This looks not good to me. Can you do the similar thing like x86? eg: Not defining PPC_MPC85XX_REMOVE_BOOTPG_RESETVEC here, instead use Kconfig option to control the boot page and the reset vector. Besides, the name itself is odd too.
# Always append ALL so that arch config.mk's can add custom ones ALL-y += u-boot.srec u-boot.bin u-boot.sym System.map binary_size_check
@@ -837,6 +844,10 @@ ifneq ($(BUILD_ROM)$(CONFIG_BUILD_ROM),) ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom endif
+ifeq ($(PPC_MPC85XX_INCLUDE_DTB),y) +ALL-y += u-boot-dtb.bin +endif
# Build a combined spl + u-boot image for sunxi ifeq ($(CONFIG_ARCH_SUNXI)$(CONFIG_SPL),yy) ALL-y += u-boot-sunxi-with-spl.bin @@ -938,7 +949,7 @@ u-boot-fit-dtb.bin: u-boot-nodtb.bin fit-dtb.blob
u-boot.bin: u-boot-fit-dtb.bin FORCE $(call if_changed,copy) -else ifeq ($(CONFIG_OF_SEPARATE),y) +else ifeq ($(CONFIG_OF_SEPARATE)$(PPC_MPC85XX_INCLUDE_DTB),y)
This is a generic rule and we should not change it. The default rule should work on mpc85xx too, like x86.
u-boot-dtb.bin: u-boot-nodtb.bin dts/dt.dtb FORCE $(call if_changed,cat)
@@ -979,7 +990,8 @@ spl/u-boot-spl.srec: spl/u-boot-spl FORCE $(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec)
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
$(if $(PPC_MPC85XX_REMOVE_BOOTPG_RESETVEC),-R .bootpg -R .resetvec)
binary_size_check: u-boot-nodtb.bin FORCE @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \ @@ -1222,6 +1234,18 @@ u-boot-x86-16bit.bin: u-boot FORCE $(call if_changed,objcopy) endif
+ifeq ($(PPC_MPC85XX_INCLUDE_DTB), y) +u-boot-dtb.bin: u-boot.bin u-boot.dtb \
$(if $(PPC_MPC85XX_REMOVE_BOOTPG_RESETVEC), u-boot-br.bin) FORCE
$(call if_changed,binman)
See above comments. No need to add a mpc85xx-specific rule for u-boot-dtb.bin
+ifeq ($(PPC_MPC85XX_REMOVE_BOOTPG_RESETVEC),y) +OBJCOPYFLAGS_u-boot-br.bin := -O binary -j .bootpg -j .resetvec +u-boot-br.bin: u-boot FORCE
$(call if_changed,objcopy)
+endif +endif
ifneq ($(CONFIG_ARCH_SUNXI),) ifeq ($(CONFIG_ARM64),) u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE @@ -1291,6 +1315,8 @@ spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE
ifeq ($(ARCH),arm) UBOOT_BINLOAD := u-boot.img +else ifeq ($(PPC_MPC85XX_INCLUDE_DTB),y) +UBOOT_BINLOAD := u-boot-dtb.bin else UBOOT_BINLOAD := u-boot.bin endif
Regards, Bin

Add device tree for T2080QDS board and enable CONFIG_OF_CONTROL so that device tree can be compiled.
update board README for device tree usage.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- arch/powerpc/dts/Makefile | 2 ++ arch/powerpc/dts/e6500_power_isa.dtsi | 39 +++++++++++++++++++++ arch/powerpc/dts/t2080qds.dts | 17 ++++++++++ arch/powerpc/dts/t2080qds.dtsi | 64 +++++++++++++++++++++++++++++++++++ board/freescale/t208xqds/README | 17 ++++++++++ configs/T2080QDS_NAND_defconfig | 3 +- configs/T2080QDS_SDCARD_defconfig | 3 +- configs/T2080QDS_SPIFLASH_defconfig | 3 +- configs/T2080QDS_defconfig | 3 +- 9 files changed, 147 insertions(+), 4 deletions(-) create mode 100644 arch/powerpc/dts/e6500_power_isa.dtsi create mode 100644 arch/powerpc/dts/t2080qds.dts create mode 100644 arch/powerpc/dts/t2080qds.dtsi
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index de14e7b..a19aa56 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -1,5 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+
+dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb + targets += $(dtb-y)
# Add any required device tree compiler flags here diff --git a/arch/powerpc/dts/e6500_power_isa.dtsi b/arch/powerpc/dts/e6500_power_isa.dtsi new file mode 100644 index 0000000..1b06170 --- /dev/null +++ b/arch/powerpc/dts/e6500_power_isa.dtsi @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * e6500 Power ISA Device Tree Source (include) + * + * Copyright 2013 Freescale Semiconductor Inc. + * Copyright 2018 NXP + */ + +/ { + cpus { + power-isa-version = "2.06"; + power-isa-b; // Base + power-isa-e; // Embedded + power-isa-atb; // Alternate Time Base + power-isa-cs; // Cache Specification + power-isa-ds; // Decorated Storage + power-isa-e.ed; // Embedded.Enhanced Debug + power-isa-e.pd; // Embedded.External PID + power-isa-e.hv; // Embedded.Hypervisor + power-isa-e.le; // Embedded.Little-Endian + power-isa-e.pm; // Embedded.Performance Monitor + power-isa-e.pc; // Embedded.Processor Control + power-isa-ecl; // Embedded Cache Locking + power-isa-exp; // External Proxy + power-isa-fp; // Floating Point + power-isa-fp.r; // Floating Point.Record + power-isa-mmc; // Memory Coherence + power-isa-scpm; // Store Conditional Page Mobility + power-isa-wt; // Wait + power-isa-64; // 64-bit + power-isa-e.pt; // Embedded.Page Table + power-isa-e.hv.lrat; // Embedded.Hypervisor.LRAT + power-isa-e.em; // Embedded Multi-Threading + power-isa-v; // Vector (AltiVec) + fsl,eref-er; // Enhanced Reservations + fsl,eref-deo; // Data Cache Extended Operations + mmu-type = "power-embedded"; + }; +}; diff --git a/arch/powerpc/dts/t2080qds.dts b/arch/powerpc/dts/t2080qds.dts new file mode 100644 index 0000000..bf8cb23 --- /dev/null +++ b/arch/powerpc/dts/t2080qds.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * T2080QDS Device Tree Source + * + * Copyright 2013 - 2015 Freescale Semiconductor Inc. + * Copyright 2018 NXP + */ + +/include/ "t2080qds.dtsi" + +/ { + model = "fsl,T2080QDS"; + compatible = "fsl,T2080QDS"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; +}; diff --git a/arch/powerpc/dts/t2080qds.dtsi b/arch/powerpc/dts/t2080qds.dtsi new file mode 100644 index 0000000..2006dec --- /dev/null +++ b/arch/powerpc/dts/t2080qds.dtsi @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * T2080/T2081 Silicon/SoC Device Tree Source (pre include) + * + * Copyright 2013 Freescale Semiconductor Inc. + * Copyright 2018 NXP + */ + +/dts-v1/; + +/include/ "e6500_power_isa.dtsi" + +/ { + model = "fsl,T2080QDS"; + compatible = "fsl,T2080QDS"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,e6500@0 { + device_type = "cpu"; + reg = <0 1>; + fsl,portid-mapping = <0x80000000>; + }; + cpu1: PowerPC,e6500@2 { + device_type = "cpu"; + reg = <2 3>; + fsl,portid-mapping = <0x80000000>; + }; + cpu2: PowerPC,e6500@4 { + device_type = "cpu"; + reg = <4 5>; + fsl,portid-mapping = <0x80000000>; + }; + cpu3: PowerPC,e6500@6 { + device_type = "cpu"; + reg = <6 7>; + fsl,portid-mapping = <0x80000000>; + }; + }; + + soc: soc@ffe000000 { + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic"; + device_type = "open-pic"; + clock-frequency = <0x0>; + }; + }; +}; diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README index 2a2a0e5..2b979f1 100755 --- a/board/freescale/t208xqds/README +++ b/board/freescale/t208xqds/README @@ -272,3 +272,20 @@ How to update the ucode of Freescale FMAN
For more details, please refer to T2080QDS User Guide and access website www.freescale.com and Freescale QorIQ SDK Infocenter document. + +Device Tree support and How to enable it for different configs +-------------------------------------------------------------- +Device tree support is available for t2080qds for below mentioned boot, +1. NOR Boot +2. NAND Boot +3. SD Boot +4. SPIFLASH Boot + +To enable Device Tree support for other boot, below configs need to be +enabled in relative defconfig file, +1. CONFIG_DEFAULT_DEVICE_TREE="t2080qds" (Change default device tree name if required) +2. CONFIG_OF_CONTROL + +If device tree support is enabled in defconfig, +1. use 'u-boot-dtb.bin' for NOR boot. +2. Use 'u-boot-with-spl-pbl.bin' for other boot. diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 6960412..33a2381 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,6 +36,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -54,4 +56,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 20a0a37..bb1e89c 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,6 +36,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -53,4 +55,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index c763316..a5450a6 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -36,6 +37,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -54,4 +56,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 5ed7836..c5f79da 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -2,6 +2,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -24,6 +25,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -42,4 +44,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y

On Wed, Aug 22, 2018 at 2:18 AM, Jagdish Gediya jagdish.gediya@nxp.com wrote:
Add device tree for T2080QDS board and enable CONFIG_OF_CONTROL so that device tree can be compiled.
update board README for device tree usage.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
arch/powerpc/dts/Makefile | 2 ++ arch/powerpc/dts/e6500_power_isa.dtsi | 39 +++++++++++++++++++++ arch/powerpc/dts/t2080qds.dts | 17 ++++++++++ arch/powerpc/dts/t2080qds.dtsi | 64 +++++++++++++++++++++++++++++++++++
Are all these dts files imported from Linux? It looks only interrupt controller node is present but other peripherals nodes are missing.
board/freescale/t208xqds/README | 17 ++++++++++ configs/T2080QDS_NAND_defconfig | 3 +- configs/T2080QDS_SDCARD_defconfig | 3 +- configs/T2080QDS_SPIFLASH_defconfig | 3 +- configs/T2080QDS_defconfig | 3 +- 9 files changed, 147 insertions(+), 4 deletions(-) create mode 100644 arch/powerpc/dts/e6500_power_isa.dtsi create mode 100644 arch/powerpc/dts/t2080qds.dts create mode 100644 arch/powerpc/dts/t2080qds.dtsi
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index de14e7b..a19aa56 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -1,5 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+
+dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
targets += $(dtb-y)
# Add any required device tree compiler flags here diff --git a/arch/powerpc/dts/e6500_power_isa.dtsi b/arch/powerpc/dts/e6500_power_isa.dtsi new file mode 100644 index 0000000..1b06170 --- /dev/null +++ b/arch/powerpc/dts/e6500_power_isa.dtsi @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/*
- e6500 Power ISA Device Tree Source (include)
- Copyright 2013 Freescale Semiconductor Inc.
- Copyright 2018 NXP
- */
+/ {
cpus {
power-isa-version = "2.06";
power-isa-b; // Base
power-isa-e; // Embedded
power-isa-atb; // Alternate Time Base
power-isa-cs; // Cache Specification
power-isa-ds; // Decorated Storage
power-isa-e.ed; // Embedded.Enhanced Debug
power-isa-e.pd; // Embedded.External PID
power-isa-e.hv; // Embedded.Hypervisor
power-isa-e.le; // Embedded.Little-Endian
power-isa-e.pm; // Embedded.Performance Monitor
power-isa-e.pc; // Embedded.Processor Control
power-isa-ecl; // Embedded Cache Locking
power-isa-exp; // External Proxy
power-isa-fp; // Floating Point
power-isa-fp.r; // Floating Point.Record
power-isa-mmc; // Memory Coherence
power-isa-scpm; // Store Conditional Page Mobility
power-isa-wt; // Wait
power-isa-64; // 64-bit
power-isa-e.pt; // Embedded.Page Table
power-isa-e.hv.lrat; // Embedded.Hypervisor.LRAT
power-isa-e.em; // Embedded Multi-Threading
power-isa-v; // Vector (AltiVec)
fsl,eref-er; // Enhanced Reservations
fsl,eref-deo; // Data Cache Extended Operations
mmu-type = "power-embedded";
};
+}; diff --git a/arch/powerpc/dts/t2080qds.dts b/arch/powerpc/dts/t2080qds.dts new file mode 100644 index 0000000..bf8cb23 --- /dev/null +++ b/arch/powerpc/dts/t2080qds.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/*
- T2080QDS Device Tree Source
- Copyright 2013 - 2015 Freescale Semiconductor Inc.
- Copyright 2018 NXP
- */
+/include/ "t2080qds.dtsi"
+/ {
model = "fsl,T2080QDS";
compatible = "fsl,T2080QDS";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&mpic>;
+}; diff --git a/arch/powerpc/dts/t2080qds.dtsi b/arch/powerpc/dts/t2080qds.dtsi new file mode 100644 index 0000000..2006dec --- /dev/null +++ b/arch/powerpc/dts/t2080qds.dtsi @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/*
- T2080/T2081 Silicon/SoC Device Tree Source (pre include)
- Copyright 2013 Freescale Semiconductor Inc.
- Copyright 2018 NXP
- */
+/dts-v1/;
+/include/ "e6500_power_isa.dtsi"
+/ {
model = "fsl,T2080QDS";
compatible = "fsl,T2080QDS";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&mpic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: PowerPC,e6500@0 {
device_type = "cpu";
reg = <0 1>;
fsl,portid-mapping = <0x80000000>;
};
cpu1: PowerPC,e6500@2 {
device_type = "cpu";
reg = <2 3>;
fsl,portid-mapping = <0x80000000>;
};
cpu2: PowerPC,e6500@4 {
device_type = "cpu";
reg = <4 5>;
fsl,portid-mapping = <0x80000000>;
};
cpu3: PowerPC,e6500@6 {
device_type = "cpu";
reg = <6 7>;
fsl,portid-mapping = <0x80000000>;
};
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <4>;
reg = <0x40000 0x40000>;
compatible = "fsl,mpic";
device_type = "open-pic";
clock-frequency = <0x0>;
};
};
+}; diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README index 2a2a0e5..2b979f1 100755 --- a/board/freescale/t208xqds/README +++ b/board/freescale/t208xqds/README @@ -272,3 +272,20 @@ How to update the ucode of Freescale FMAN
For more details, please refer to T2080QDS User Guide and access website www.freescale.com and Freescale QorIQ SDK Infocenter document.
+Device Tree support and How to enable it for different configs
nits: tree, how
+-------------------------------------------------------------- +Device tree support is available for t2080qds for below mentioned boot, +1. NOR Boot +2. NAND Boot +3. SD Boot +4. SPIFLASH Boot
+To enable Device Tree support for other boot, below configs need to be
nits: device tree
+enabled in relative defconfig file, +1. CONFIG_DEFAULT_DEVICE_TREE="t2080qds" (Change default device tree name if required) +2. CONFIG_OF_CONTROL
+If device tree support is enabled in defconfig, +1. use 'u-boot-dtb.bin' for NOR boot. +2. Use 'u-boot-with-spl-pbl.bin' for other boot.
nits: use
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 6960412..33a2381 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,6 +36,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -54,4 +56,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 20a0a37..bb1e89c 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,6 +36,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -53,4 +55,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index c763316..a5450a6 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -36,6 +37,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -54,4 +56,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 5ed7836..c5f79da 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -2,6 +2,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -24,6 +25,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -42,4 +44,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
Regards, Bin

Hi,
-----Original Message----- From: Bin Meng bmeng.cn@gmail.com Sent: Tuesday, August 21, 2018 5:32 PM To: Jagdish Gediya jagdish.gediya@nxp.com Cc: Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; York Sun york.sun@nxp.com; Poonam Aggrwal poonam.aggrwal@nxp.com; Tom Rini trini@konsulko.com; Simon Glass sjg@chromium.org; U-Boot Mailing List u-boot@lists.denx.de Subject: Re: [PATCH 8/8][RESEND] powerpc: dts: Enable device tree support for T2080QDS
On Wed, Aug 22, 2018 at 2:18 AM, Jagdish Gediya jagdish.gediya@nxp.com wrote:
Add device tree for T2080QDS board and enable CONFIG_OF_CONTROL so that device tree can be compiled.
update board README for device tree usage.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
arch/powerpc/dts/Makefile | 2 ++ arch/powerpc/dts/e6500_power_isa.dtsi | 39 +++++++++++++++++++++ arch/powerpc/dts/t2080qds.dts | 17 ++++++++++ arch/powerpc/dts/t2080qds.dtsi | 64
+++++++++++++++++++++++++++++++++++
Are all these dts files imported from Linux? It looks only interrupt controller node is present but other peripherals nodes are missing.
These dts files are minimal subset of Linux dts files. Other peripherals node are not needed as drivers are not using device tree at present.
board/freescale/t208xqds/README | 17 ++++++++++ configs/T2080QDS_NAND_defconfig | 3 +- configs/T2080QDS_SDCARD_defconfig | 3 +- configs/T2080QDS_SPIFLASH_defconfig | 3 +- configs/T2080QDS_defconfig | 3 +- 9 files changed, 147 insertions(+), 4 deletions(-) create mode 100644 arch/powerpc/dts/e6500_power_isa.dtsi create mode 100644 arch/powerpc/dts/t2080qds.dts create mode 100644 arch/powerpc/dts/t2080qds.dtsi
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index de14e7b..a19aa56 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -1,5 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+
+dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
targets += $(dtb-y)
# Add any required device tree compiler flags here diff --git a/arch/powerpc/dts/e6500_power_isa.dtsi b/arch/powerpc/dts/e6500_power_isa.dtsi new file mode 100644 index 0000000..1b06170 --- /dev/null +++ b/arch/powerpc/dts/e6500_power_isa.dtsi @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/*
- e6500 Power ISA Device Tree Source (include)
- Copyright 2013 Freescale Semiconductor Inc.
- Copyright 2018 NXP
- */
+/ {
cpus {
power-isa-version = "2.06";
power-isa-b; // Base
power-isa-e; // Embedded
power-isa-atb; // Alternate Time Base
power-isa-cs; // Cache Specification
power-isa-ds; // Decorated Storage
power-isa-e.ed; // Embedded.Enhanced Debug
power-isa-e.pd; // Embedded.External PID
power-isa-e.hv; // Embedded.Hypervisor
power-isa-e.le; // Embedded.Little-Endian
power-isa-e.pm; // Embedded.Performance Monitor
power-isa-e.pc; // Embedded.Processor Control
power-isa-ecl; // Embedded Cache Locking
power-isa-exp; // External Proxy
power-isa-fp; // Floating Point
power-isa-fp.r; // Floating Point.Record
power-isa-mmc; // Memory Coherence
power-isa-scpm; // Store Conditional Page Mobility
power-isa-wt; // Wait
power-isa-64; // 64-bit
power-isa-e.pt; // Embedded.Page Table
power-isa-e.hv.lrat; // Embedded.Hypervisor.LRAT
power-isa-e.em; // Embedded Multi-Threading
power-isa-v; // Vector (AltiVec)
fsl,eref-er; // Enhanced Reservations
fsl,eref-deo; // Data Cache Extended Operations
mmu-type = "power-embedded";
};
+}; diff --git a/arch/powerpc/dts/t2080qds.dts b/arch/powerpc/dts/t2080qds.dts new file mode 100644 index 0000000..bf8cb23 --- /dev/null +++ b/arch/powerpc/dts/t2080qds.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/*
- T2080QDS Device Tree Source
- Copyright 2013 - 2015 Freescale Semiconductor Inc.
- Copyright 2018 NXP
- */
+/include/ "t2080qds.dtsi"
+/ {
model = "fsl,T2080QDS";
compatible = "fsl,T2080QDS";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&mpic>;
+}; diff --git a/arch/powerpc/dts/t2080qds.dtsi b/arch/powerpc/dts/t2080qds.dtsi new file mode 100644 index 0000000..2006dec --- /dev/null +++ b/arch/powerpc/dts/t2080qds.dtsi @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/*
- T2080/T2081 Silicon/SoC Device Tree Source (pre include)
- Copyright 2013 Freescale Semiconductor Inc.
- Copyright 2018 NXP
- */
+/dts-v1/;
+/include/ "e6500_power_isa.dtsi"
+/ {
model = "fsl,T2080QDS";
compatible = "fsl,T2080QDS";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&mpic>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: PowerPC,e6500@0 {
device_type = "cpu";
reg = <0 1>;
fsl,portid-mapping = <0x80000000>;
};
cpu1: PowerPC,e6500@2 {
device_type = "cpu";
reg = <2 3>;
fsl,portid-mapping = <0x80000000>;
};
cpu2: PowerPC,e6500@4 {
device_type = "cpu";
reg = <4 5>;
fsl,portid-mapping = <0x80000000>;
};
cpu3: PowerPC,e6500@6 {
device_type = "cpu";
reg = <6 7>;
fsl,portid-mapping = <0x80000000>;
};
};
soc: soc@ffe000000 {
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
reg = <0xf 0xfe000000 0 0x00001000>;
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
mpic: pic@40000 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <4>;
reg = <0x40000 0x40000>;
compatible = "fsl,mpic";
device_type = "open-pic";
clock-frequency = <0x0>;
};
};
+}; diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README index 2a2a0e5..2b979f1 100755 --- a/board/freescale/t208xqds/README +++ b/board/freescale/t208xqds/README @@ -272,3 +272,20 @@ How to update the ucode of Freescale FMAN
For more details, please refer to T2080QDS User Guide and access website
https://emea01.safelinks.protection.outlook.com/?url=www.freescale.com& amp;data=02%7C01%7Cjagdish.gediya%40nxp.com%7C8f63fa2542e848c3a46 c08d6075dd88e%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636 704496978698811&sdata=ON19F134brcRh%2BQah8Eay%2FQhPhbM1% 2Fu%2BJCcTVx7layA%3D&reserved=0 and Freescale QorIQ SDK Infocenter document.
+Device Tree support and How to enable it for different configs
nits: tree, how
+-------------------------------------------------------------- +Device tree support is available for t2080qds for below mentioned +boot, 1. NOR Boot 2. NAND Boot 3. SD Boot 4. SPIFLASH Boot
+To enable Device Tree support for other boot, below configs need to +be
nits: device tree
+enabled in relative defconfig file, +1. CONFIG_DEFAULT_DEVICE_TREE="t2080qds" (Change default device
tree
+name if required) 2. CONFIG_OF_CONTROL
+If device tree support is enabled in defconfig, 1. use +'u-boot-dtb.bin' for NOR boot. +2. Use 'u-boot-with-spl-pbl.bin' for other boot.
nits: use
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 6960412..33a2381 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL=y
CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,6 +36,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi 0=spife110000.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(ker nel),128k(dtb),96m(fs),- (user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),- (user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)"
+CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -54,4 +56,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 20a0a37..bb1e89c 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL=y
CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,6 +36,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi 0=spife110000.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(ker nel),128k(dtb),96m(fs),- (user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),- (user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)"
+CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -53,4 +55,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index c763316..a5450a6 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y
CONFIG_TARGET_T2080QDS=y
+CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -36,6 +37,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi 0=spife110000.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(ker nel),128k(dtb),96m(fs),- (user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),- (user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)"
+CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -54,4 +56,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 5ed7836..c5f79da 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -2,6 +2,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -24,6 +25,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi 0=spife110000.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(ker nel),128k(dtb),96m(fs),- (user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),- (user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)"
+CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -42,4 +44,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
Thanks, Jagdish
participants (2)
-
Bin Meng
-
Jagdish Gediya