[U-Boot] [PATCH] omap3: ARM Cortex-A8 errata workarounds config option
Workarounds applied in omap3_setup_aux_cr are only necessary for ARM core revisions prior to r3p2 (such as OMAP35xx but apparently not OMAP36xx and DM37xx) and require similar workarounds in the kernel, or it will cause numerous segmentation faults. This allows (when the option is not used) properly booting kernels that do not include the workaround.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr --- README | 8 ++++++++ arch/arm/cpu/armv7/omap3/board.c | 2 ++ include/configs/am3517_crane.h | 2 ++ include/configs/am3517_evm.h | 2 ++ include/configs/cm_t35.h | 2 ++ include/configs/cm_t3517.h | 2 ++ include/configs/dig297.h | 2 ++ include/configs/mcx.h | 2 ++ include/configs/nokia_rx51.h | 2 ++ include/configs/omap3_evm_common.h | 2 ++ include/configs/omap3_logic.h | 2 ++ include/configs/omap3_mvblx.h | 2 ++ include/configs/omap3_pandora.h | 2 ++ include/configs/omap3_sdp3430.h | 2 ++ include/configs/omap3_zoom1.h | 2 ++ include/configs/tam3517-common.h | 2 ++ include/configs/tao3530.h | 2 ++ include/configs/ti_omap3_common.h | 2 ++ include/configs/tricorder.h | 2 ++ 19 files changed, 44 insertions(+)
diff --git a/README b/README index ba57dc5..a39420d 100644 --- a/README +++ b/README @@ -621,6 +621,14 @@ The following options need to be configured: exists, unlike the similar options in the Linux kernel. Do not set these options unless they apply!
+ CONFIG_SYS_ARM_CORTEXA8_ERRATA + + Enables workarounds for ARM Cortex-A8 errata 454179, 430973 + and 621766. This is only necessary for ARM core revisions prior + to r3p2. Enabling those workarounds requires to enable the same + workarounds in the kernel, or it will cause multiple + segmentation faults. This is currently only effective on OMAP3. + - Driver Model Driver model is a new framework for devices in U-Boot introduced in early 2014. U-Boot is being progressively diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 90d6ae7..813f35b 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -246,8 +246,10 @@ void s_init(void)
try_unlock_memory();
+#ifdef CONFIG_SYS_ARM_CORTEXA8_ERRATA /* Errata workarounds */ omap3_setup_aux_cr(); +#endif
#ifndef CONFIG_SYS_L2CACHE_OFF /* Invalidate L2-cache from secure mode */ diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 09ee10c..2b98c8b 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -31,6 +31,8 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 190ef0e..63dda70 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -31,6 +31,8 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index b2a9f35..150b419 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -38,6 +38,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h index 918032b..ff80e12 100644 --- a/include/configs/cm_t3517.h +++ b/include/configs/cm_t3517.h @@ -38,6 +38,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/dig297.h b/include/configs/dig297.h index c8739ed..f396a2e 100644 --- a/include/configs/dig297.h +++ b/include/configs/dig297.h @@ -44,6 +44,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 26eb220..c353505 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -43,6 +43,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h index 46fc91e..8400aa6 100644 --- a/include/configs/nokia_rx51.h +++ b/include/configs/nokia_rx51.h @@ -52,6 +52,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/omap3_evm_common.h b/include/configs/omap3_evm_common.h index 8885e17..edf8f48 100644 --- a/include/configs/omap3_evm_common.h +++ b/include/configs/omap3_evm_common.h @@ -21,6 +21,8 @@ #define CONFIG_OMAP3_EVM /* This is a OMAP3 EVM */ #define CONFIG_TWL4030_POWER /* with TWL4030 PMIC */
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* * Clock related definitions */ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index aeb385f..0389e30 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -32,6 +32,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/omap3_mvblx.h b/include/configs/omap3_mvblx.h index bf1d34d..535943c 100644 --- a/include/configs/omap3_mvblx.h +++ b/include/configs/omap3_mvblx.h @@ -35,6 +35,8 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 45feeb5..184d63f 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -29,6 +29,8 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h index ac307eb..8a7617a 100644 --- a/include/configs/omap3_sdp3430.h +++ b/include/configs/omap3_sdp3430.h @@ -41,6 +41,8 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index c5d742c..0b0016e 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -38,6 +38,8 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + #define CONFIG_MISC_INIT_R
#define CONFIG_REVISION_TAG 1 diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index 9fbe68a..7ade643 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -33,6 +33,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 7d2c0d2..9d123b1 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -35,6 +35,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index 840e108..0b06593 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -25,6 +25,8 @@ /* The chip has SDRC controller */ #define CONFIG_SDRC
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1) diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 36621a5..f1f1ae8 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -43,6 +43,8 @@ #define CONFIG_SILENT_CONSOLE #define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA + /* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1)
Hi Paul,
On 02/22/15 13:36, Paul Kocialkowski wrote:
Workarounds applied in omap3_setup_aux_cr are only necessary for ARM core revisions prior to r3p2 (such as OMAP35xx but apparently not OMAP36xx and DM37xx)
If this is true, I can see some (potential) problems with the patch. Please, check out my thoughts on this below.
and require similar workarounds in the kernel, or it will cause numerous segmentation faults. This allows (when the option is not used) properly booting kernels that do not include the workaround.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr
README | 8 ++++++++ arch/arm/cpu/armv7/omap3/board.c | 2 ++ include/configs/am3517_crane.h | 2 ++ include/configs/am3517_evm.h | 2 ++ include/configs/cm_t35.h | 2 ++ include/configs/cm_t3517.h | 2 ++ include/configs/dig297.h | 2 ++ include/configs/mcx.h | 2 ++ include/configs/nokia_rx51.h | 2 ++ include/configs/omap3_evm_common.h | 2 ++ include/configs/omap3_logic.h | 2 ++ include/configs/omap3_mvblx.h | 2 ++ include/configs/omap3_pandora.h | 2 ++ include/configs/omap3_sdp3430.h | 2 ++ include/configs/omap3_zoom1.h | 2 ++ include/configs/tam3517-common.h | 2 ++ include/configs/tao3530.h | 2 ++ include/configs/ti_omap3_common.h | 2 ++ include/configs/tricorder.h | 2 ++ 19 files changed, 44 insertions(+)
diff --git a/README b/README index ba57dc5..a39420d 100644 --- a/README +++ b/README @@ -621,6 +621,14 @@ The following options need to be configured: exists, unlike the similar options in the Linux kernel. Do not set these options unless they apply!
CONFIG_SYS_ARM_CORTEXA8_ERRATAEnables workarounds for ARM Cortex-A8 errata 454179, 430973and 621766. This is only necessary for ARM core revisions priorto r3p2. Enabling those workarounds requires to enable the sameworkarounds in the kernel, or it will cause multiplesegmentation faults. This is currently only effective on OMAP3.
- Driver Model Driver model is a new framework for devices in U-Boot introduced in early 2014. U-Boot is being progressively
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 90d6ae7..813f35b 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -246,8 +246,10 @@ void s_init(void)
try_unlock_memory();
+#ifdef CONFIG_SYS_ARM_CORTEXA8_ERRATA /* Errata workarounds */ omap3_setup_aux_cr();
Can we have the revision dynamically checked instead of/along with introducing a config option? We have boards, OMAP3 based, which are supported by the same board file and the same config file, see below.
+#endif
#ifndef CONFIG_SYS_L2CACHE_OFF /* Invalidate L2-cache from secure mode */
[...]
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index b2a9f35..150b419 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -38,6 +38,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA
This config file is used for both cm-t35 and cm-t3730. cm-t35 has OMAP3530, but cm-t3730 has DM3730. The same U-Boot binary is used for both boards.
/* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1)
[...]
Workarounds applied in omap3_setup_aux_cr are only necessary for ARM core revisions prior to r3p2 (such as OMAP35xx but apparently not OMAP36xx and DM37xx)
If this is true, I can see some (potential) problems with the patch. Please, check out my thoughts on this below.
In any case, those workarounds were already enabled before, so it won't cause any regression. As it is now, the patch doesn't change anything, it just opens up the possibility of not using CONFIG_SYS_ARM_CORTEXA8_ERRATA for a board that doesn't need the workarounds and has them disabled in the kernel.
and require similar workarounds in the kernel, or it will cause numerous segmentation faults. This allows (when the option is not used) properly booting kernels that do not include the workaround.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr
README | 8 ++++++++ arch/arm/cpu/armv7/omap3/board.c | 2 ++ include/configs/am3517_crane.h | 2 ++ include/configs/am3517_evm.h | 2 ++ include/configs/cm_t35.h | 2 ++ include/configs/cm_t3517.h | 2 ++ include/configs/dig297.h | 2 ++ include/configs/mcx.h | 2 ++ include/configs/nokia_rx51.h | 2 ++ include/configs/omap3_evm_common.h | 2 ++ include/configs/omap3_logic.h | 2 ++ include/configs/omap3_mvblx.h | 2 ++ include/configs/omap3_pandora.h | 2 ++ include/configs/omap3_sdp3430.h | 2 ++ include/configs/omap3_zoom1.h | 2 ++ include/configs/tam3517-common.h | 2 ++ include/configs/tao3530.h | 2 ++ include/configs/ti_omap3_common.h | 2 ++ include/configs/tricorder.h | 2 ++ 19 files changed, 44 insertions(+)
diff --git a/README b/README index ba57dc5..a39420d 100644 --- a/README +++ b/README @@ -621,6 +621,14 @@ The following options need to be configured: exists, unlike the similar options in the Linux kernel. Do not set these options unless they apply!
CONFIG_SYS_ARM_CORTEXA8_ERRATAEnables workarounds for ARM Cortex-A8 errata 454179, 430973and 621766. This is only necessary for ARM core revisions priorto r3p2. Enabling those workarounds requires to enable the sameworkarounds in the kernel, or it will cause multiplesegmentation faults. This is currently only effective on OMAP3.
- Driver Model Driver model is a new framework for devices in U-Boot introduced in early 2014. U-Boot is being progressively
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 90d6ae7..813f35b 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -246,8 +246,10 @@ void s_init(void)
try_unlock_memory();
+#ifdef CONFIG_SYS_ARM_CORTEXA8_ERRATA /* Errata workarounds */ omap3_setup_aux_cr();
Can we have the revision dynamically checked instead of/along with introducing a config option? We have boards, OMAP3 based, which are supported by the same board file and the same config file, see below.
After carefully looking at it, I think dynamically checking the revision might be the cleanest way to do this.
I was afraid that, in the case where the workarounds are disabled in u-boot but enabled in Linux, the same various segmentation faults would happen, but they apparently don't, as I just tested.
Thus, checking the revision should work best. According to the code in Linux, this only affects r1p* ARM core revisions, so that's what I'll be checking against.
Thanks for your comments!
+#endif
#ifndef CONFIG_SYS_L2CACHE_OFF /* Invalidate L2-cache from secure mode */
[...]
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index b2a9f35..150b419 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -38,6 +38,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA
This config file is used for both cm-t35 and cm-t3730. cm-t35 has OMAP3530, but cm-t3730 has DM3730. The same U-Boot binary is used for both boards.
/* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1)
[...]
Le dimanche 22 février 2015 à 16:45 +0100, Paul Kocialkowski a écrit :
Workarounds applied in omap3_setup_aux_cr are only necessary for ARM core revisions prior to r3p2 (such as OMAP35xx but apparently not OMAP36xx and DM37xx)
If this is true, I can see some (potential) problems with the patch. Please, check out my thoughts on this below.
In any case, those workarounds were already enabled before, so it won't cause any regression. As it is now, the patch doesn't change anything, it just opens up the possibility of not using CONFIG_SYS_ARM_CORTEXA8_ERRATA for a board that doesn't need the workarounds and has them disabled in the kernel.
and require similar workarounds in the kernel, or it will cause numerous segmentation faults. This allows (when the option is not used) properly booting kernels that do not include the workaround.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr
README | 8 ++++++++ arch/arm/cpu/armv7/omap3/board.c | 2 ++ include/configs/am3517_crane.h | 2 ++ include/configs/am3517_evm.h | 2 ++ include/configs/cm_t35.h | 2 ++ include/configs/cm_t3517.h | 2 ++ include/configs/dig297.h | 2 ++ include/configs/mcx.h | 2 ++ include/configs/nokia_rx51.h | 2 ++ include/configs/omap3_evm_common.h | 2 ++ include/configs/omap3_logic.h | 2 ++ include/configs/omap3_mvblx.h | 2 ++ include/configs/omap3_pandora.h | 2 ++ include/configs/omap3_sdp3430.h | 2 ++ include/configs/omap3_zoom1.h | 2 ++ include/configs/tam3517-common.h | 2 ++ include/configs/tao3530.h | 2 ++ include/configs/ti_omap3_common.h | 2 ++ include/configs/tricorder.h | 2 ++ 19 files changed, 44 insertions(+)
diff --git a/README b/README index ba57dc5..a39420d 100644 --- a/README +++ b/README @@ -621,6 +621,14 @@ The following options need to be configured: exists, unlike the similar options in the Linux kernel. Do not set these options unless they apply!
CONFIG_SYS_ARM_CORTEXA8_ERRATAEnables workarounds for ARM Cortex-A8 errata 454179, 430973and 621766. This is only necessary for ARM core revisions priorto r3p2. Enabling those workarounds requires to enable the sameworkarounds in the kernel, or it will cause multiplesegmentation faults. This is currently only effective on OMAP3.
- Driver Model Driver model is a new framework for devices in U-Boot introduced in early 2014. U-Boot is being progressively
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 90d6ae7..813f35b 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -246,8 +246,10 @@ void s_init(void)
try_unlock_memory();
+#ifdef CONFIG_SYS_ARM_CORTEXA8_ERRATA /* Errata workarounds */ omap3_setup_aux_cr();
Can we have the revision dynamically checked instead of/along with introducing a config option? We have boards, OMAP3 based, which are supported by the same board file and the same config file, see below.
After carefully looking at it, I think dynamically checking the revision might be the cleanest way to do this.
I was afraid that, in the case where the workarounds are disabled in u-boot but enabled in Linux, the same various segmentation faults would happen, but they apparently don't, as I just tested.
Thus, checking the revision should work best. According to the code in Linux, this only affects r1p* ARM core revisions, so that's what I'll be checking against.
Looking at the Linux code more closely, it shows that erratum 430973 only affects r1p* and erratum 458693 only affects r2p0.
Now in U-Boot, everything is mixed together and while erratum 458693 is not mentionned, it does set the L1NEON bit to 1 like the workaround for erratum 458693 does in Linux.
What do you think I should do here? Follow the Linux way (split it up) or settle on applying both things for revisions <= r2p0.
Thanks for your comments!
+#endif
#ifndef CONFIG_SYS_L2CACHE_OFF /* Invalidate L2-cache from secure mode */
[...]
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index b2a9f35..150b419 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -38,6 +38,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA
This config file is used for both cm-t35 and cm-t3730. cm-t35 has OMAP3530, but cm-t3730 has DM3730. The same U-Boot binary is used for both boards.
/* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1)
[...]
U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Le dimanche 22 février 2015 à 16:45 +0100, Paul Kocialkowski a écrit :
Workarounds applied in omap3_setup_aux_cr are only necessary for ARM core revisions prior to r3p2 (such as OMAP35xx but apparently not OMAP36xx and DM37xx)
If this is true, I can see some (potential) problems with the patch. Please, check out my thoughts on this below.
In any case, those workarounds were already enabled before, so it won't cause any regression. As it is now, the patch doesn't change anything, it just opens up the possibility of not using CONFIG_SYS_ARM_CORTEXA8_ERRATA for a board that doesn't need the workarounds and has them disabled in the kernel.
and require similar workarounds in the kernel, or it will cause numerous segmentation faults. This allows (when the option is not used) properly booting kernels that do not include the workaround.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr
README | 8 ++++++++ arch/arm/cpu/armv7/omap3/board.c | 2 ++ include/configs/am3517_crane.h | 2 ++ include/configs/am3517_evm.h | 2 ++ include/configs/cm_t35.h | 2 ++ include/configs/cm_t3517.h | 2 ++ include/configs/dig297.h | 2 ++ include/configs/mcx.h | 2 ++ include/configs/nokia_rx51.h | 2 ++ include/configs/omap3_evm_common.h | 2 ++ include/configs/omap3_logic.h | 2 ++ include/configs/omap3_mvblx.h | 2 ++ include/configs/omap3_pandora.h | 2 ++ include/configs/omap3_sdp3430.h | 2 ++ include/configs/omap3_zoom1.h | 2 ++ include/configs/tam3517-common.h | 2 ++ include/configs/tao3530.h | 2 ++ include/configs/ti_omap3_common.h | 2 ++ include/configs/tricorder.h | 2 ++ 19 files changed, 44 insertions(+)
diff --git a/README b/README index ba57dc5..a39420d 100644 --- a/README +++ b/README @@ -621,6 +621,14 @@ The following options need to be configured: exists, unlike the similar options in the Linux kernel. Do not set these options unless they apply!
CONFIG_SYS_ARM_CORTEXA8_ERRATAEnables workarounds for ARM Cortex-A8 errata 454179, 430973and 621766. This is only necessary for ARM core revisions priorto r3p2. Enabling those workarounds requires to enable the sameworkarounds in the kernel, or it will cause multiplesegmentation faults. This is currently only effective on OMAP3.
- Driver Model Driver model is a new framework for devices in U-Boot introduced in early 2014. U-Boot is being progressively
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 90d6ae7..813f35b 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -246,8 +246,10 @@ void s_init(void)
try_unlock_memory();
+#ifdef CONFIG_SYS_ARM_CORTEXA8_ERRATA /* Errata workarounds */ omap3_setup_aux_cr();
Can we have the revision dynamically checked instead of/along with introducing a config option? We have boards, OMAP3 based, which are supported by the same board file and the same config file, see below.
After carefully looking at it, I think dynamically checking the revision might be the cleanest way to do this.
I was afraid that, in the case where the workarounds are disabled in u-boot but enabled in Linux, the same various segmentation faults would happen, but they apparently don't, as I just tested.
Thus, checking the revision should work best. According to the code in Linux, this only affects r1p* ARM core revisions, so that's what I'll be checking against.
Looking at the Linux code more closely, it shows that erratum 430973 only affects r1p* and erratum 458693 only affects r2p0.
Now in U-Boot, everything is mixed together and while erratum 458693 is not mentionned, it does set the L1NEON bit to 1 like the workaround for erratum 458693 does in Linux.
What do you think I should do here? Follow the Linux way (split it up) or settle on applying both things for revisions <= r2p0.
Thanks for your comments!
+#endif
#ifndef CONFIG_SYS_L2CACHE_OFF /* Invalidate L2-cache from secure mode */
[...]
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index b2a9f35..150b419 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -38,6 +38,8 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_ARM_CORTEXA8_ERRATA
This config file is used for both cm-t35 and cm-t3730. cm-t35 has OMAP3530, but cm-t3730 has DM3730. The same U-Boot binary is used for both boards.
/* Clock Defines */ #define V_OSCK 26000000 /* Clock output from T2 */ #define V_SCLK (V_OSCK >> 1)
[...]
U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Not every version and revision of the Cortex-A8 ARM core requires the same errata workarounds. In addition, enabling those requires to have similar workarounds enabled in the kernel or it will cause numerous segmentation faults.
This enables those workarounds when they are needed, according to what is done in Linux.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html --- arch/arm/cpu/armv7/omap3/board.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 90d6ae7..a87dd2a 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -431,14 +431,29 @@ static void omap3_update_aux_cr_secure(u32 set_bits, u32 clear_bits)
static void omap3_setup_aux_cr(void) { - /* Workaround for Cortex-A8 errata: #454179 #430973 - * Set "IBE" bit - * Set "Disable Branch Size Mispredicts" bit - * Workaround for erratum #621766 + u32 id, revision, variant; + u32 bits = 0; + + asm volatile ("mrc p15, 0, %0, c0, c0, 0" : "=r" (id)); + + variant = (id & 0xf00000) >> 20; + revision = id & 0x0f; + + /* Workaround for Cortex-A8 erratum: #454179 #430973 + * Set IBE bit + * Set Disable Branch Size Mispredicts (DBSM) bit + */ + if (variant < 2) + bits |= (1 << 6) | (1 << 7); + + /* Workaround for Cortex-A8 erratum #621766 * Enable L1NEON bit - * ACR |= (IBE | DBSM | L1NEON) => ACR |= 0xE0 */ - omap3_update_aux_cr_secure(0xE0, 0); + if (variant == 2 && revision == 0) + bits |= (1 << 5); + + if (bits != 0) + omap3_update_aux_cr_secure(bits, 0); }
#ifndef CONFIG_SYS_L2CACHE_OFF
Hi Paul,
On 02/22/15 18:42, Paul Kocialkowski wrote:
Not every version and revision of the Cortex-A8 ARM core requires the same errata workarounds. In addition, enabling those requires to have similar workarounds enabled in the kernel or it will cause numerous segmentation faults.
This enables those workarounds when they are needed, according to what is done in Linux.
Conceptually, I'm fine with the patch, but I did not look down into the erratas and how it should be handled...
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
You've missed the s-o-b.
arch/arm/cpu/armv7/omap3/board.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 90d6ae7..a87dd2a 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -431,14 +431,29 @@ static void omap3_update_aux_cr_secure(u32 set_bits, u32 clear_bits)
static void omap3_setup_aux_cr(void) {
- /* Workaround for Cortex-A8 errata: #454179 #430973
* Set "IBE" bit* Set "Disable Branch Size Mispredicts" bit* Workaround for erratum #621766
- u32 id, revision, variant;
- u32 bits = 0;
- asm volatile ("mrc p15, 0, %0, c0, c0, 0" : "=r" (id));
- variant = (id & 0xf00000) >> 20;
- revision = id & 0x0f;
- /* Workaround for Cortex-A8 erratum: #454179 #430973
While on this, I would also fix the multi-line comment...
* Set IBE bit* Set Disable Branch Size Mispredicts (DBSM) bit*/- if (variant < 2)
bits |= (1 << 6) | (1 << 7);- /* Workaround for Cortex-A8 erratum #621766
Also here.
* Enable L1NEON bit
* ACR |= (IBE | DBSM | L1NEON) => ACR |= 0xE0- omap3_update_aux_cr_secure(0xE0, 0);
- if (variant == 2 && revision == 0)
bits |= (1 << 5);- if (bits != 0)
omap3_update_aux_cr_secure(bits, 0);}
#ifndef CONFIG_SYS_L2CACHE_OFF
Le lundi 23 février 2015 à 13:09 +0200, Igor Grinberg a écrit :
Hi Paul,
On 02/22/15 18:42, Paul Kocialkowski wrote:
Not every version and revision of the Cortex-A8 ARM core requires the same errata workarounds. In addition, enabling those requires to have similar workarounds enabled in the kernel or it will cause numerous segmentation faults.
This enables those workarounds when they are needed, according to what is done in Linux.
Conceptually, I'm fine with the patch, but I did not look down into the erratas and how it should be handled...
I was only able to find information about erratum 430973 which according to the kernel sources only affects r1p* (arch/arm/mm/proc-v7.S) but nothing regarding 454179 (disable branch size mispredicts) and 621766.
However, for 621766, the same L1NEON bit is set in the workaround for erratum 458693 as found on the kernel tree (arch/arm/mm/proc-v7.S) which is said to only affect r2p0.
It seems like information about those errata is not really accessible to the public, or I just couldn't find it.
I would appreciate it if someone could test this on an omap35xx board (supposedly with an ARM core id different than mine) just to check that it's running fine.
Then again, I did not change the workarounds for these errata (with regard to the code currently in U-Boot), only excluded cases were they should not be necessary. The reason why these workarounds are necessary is out of the scope of this patch.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
You've missed the s-o-b.
I will make a v3 anyways.
arch/arm/cpu/armv7/omap3/board.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 90d6ae7..a87dd2a 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -431,14 +431,29 @@ static void omap3_update_aux_cr_secure(u32 set_bits, u32 clear_bits)
static void omap3_setup_aux_cr(void) {
- /* Workaround for Cortex-A8 errata: #454179 #430973
* Set "IBE" bit* Set "Disable Branch Size Mispredicts" bit* Workaround for erratum #621766
- u32 id, revision, variant;
- u32 bits = 0;
- asm volatile ("mrc p15, 0, %0, c0, c0, 0" : "=r" (id));
- variant = (id & 0xf00000) >> 20;
- revision = id & 0x0f;
- /* Workaround for Cortex-A8 erratum: #454179 #430973
While on this, I would also fix the multi-line comment...
Will do.
* Set IBE bit* Set Disable Branch Size Mispredicts (DBSM) bit*/- if (variant < 2)
bits |= (1 << 6) | (1 << 7);- /* Workaround for Cortex-A8 erratum #621766
Also here.
* Enable L1NEON bit
* ACR |= (IBE | DBSM | L1NEON) => ACR |= 0xE0- omap3_update_aux_cr_secure(0xE0, 0);
- if (variant == 2 && revision == 0)
bits |= (1 << 5);- if (bits != 0)
omap3_update_aux_cr_secure(bits, 0);}
#ifndef CONFIG_SYS_L2CACHE_OFF
Not every version and revision of the Cortex-A8 ARM core requires the same errata workarounds. In addition, enabling those requires to have similar workarounds enabled in the kernel or it will cause numerous segmentation faults.
This enables those workarounds when they are needed, according to what is done in Linux.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr --- arch/arm/cpu/armv7/omap3/board.c | 29 +++++++++++++++++++++++------ 1 file changed, 23 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 90d6ae7..3c198fc 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -431,14 +431,31 @@ static void omap3_update_aux_cr_secure(u32 set_bits, u32 clear_bits)
static void omap3_setup_aux_cr(void) { - /* Workaround for Cortex-A8 errata: #454179 #430973 - * Set "IBE" bit - * Set "Disable Branch Size Mispredicts" bit - * Workaround for erratum #621766 + u32 id, revision, variant; + u32 bits = 0; + + asm volatile ("mrc p15, 0, %0, c0, c0, 0" : "=r" (id)); + + variant = (id & 0xf00000) >> 20; + revision = id & 0x0f; + + /* + * Workaround for Cortex-A8 errata #454179, #430973 + * Set IBE bit + * Set Disable Branch Size Mispredicts (DBSM) bit + */ + if (variant < 2) + bits |= (1 << 6) | (1 << 7); + + /* + * Workaround for Cortex-A8 erratum #621766 * Enable L1NEON bit - * ACR |= (IBE | DBSM | L1NEON) => ACR |= 0xE0 */ - omap3_update_aux_cr_secure(0xE0, 0); + if (variant == 2 && revision == 0) + bits |= (1 << 5); + + if (bits != 0) + omap3_update_aux_cr_secure(bits, 0); }
#ifndef CONFIG_SYS_L2CACHE_OFF
On Mon, Feb 23, 2015 at 08:16:44PM +0100, Paul Kocialkowski wrote:
Not every version and revision of the Cortex-A8 ARM core requires the same errata workarounds. In addition, enabling those requires to have similar workarounds enabled in the kernel or it will cause numerous segmentation faults.
This enables those workarounds when they are needed, according to what is done in Linux.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr
Nishanth, any comments here, since you've been thinking about errata stuff lately? Thanks!
Reviewed-by: Tom Rini trini@ti.com
On Mon, Feb 23, 2015 at 4:21 PM, Tom Rini trini@ti.com wrote:
On Mon, Feb 23, 2015 at 08:16:44PM +0100, Paul Kocialkowski wrote:
Not every version and revision of the Cortex-A8 ARM core requires the same errata workarounds. In addition, enabling those requires to have similar workarounds enabled in the kernel or it will cause numerous segmentation faults.
This enables those workarounds when they are needed, according to what is done in Linux.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr
Nishanth, any comments here, since you've been thinking about errata stuff lately? Thanks!
Reviewed-by: Tom Rini trini@ti.com
I would probably go with v7 start code triggering the logic. even though the secure logic is probably unique..
something like CONFIG_ARM_ARCH_CP15_ERRATA or like
Le lundi 23 février 2015 à 16:43 -0600, Nishanth Menon a écrit :
On Mon, Feb 23, 2015 at 4:21 PM, Tom Rini trini@ti.com wrote:
On Mon, Feb 23, 2015 at 08:16:44PM +0100, Paul Kocialkowski wrote:
Not every version and revision of the Cortex-A8 ARM core requires the same errata workarounds. In addition, enabling those requires to have similar workarounds enabled in the kernel or it will cause numerous segmentation faults.
This enables those workarounds when they are needed, according to what is done in Linux.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr
Nishanth, any comments here, since you've been thinking about errata stuff lately? Thanks!
Reviewed-by: Tom Rini trini@ti.com
I would probably go with v7 start code triggering the logic. even though the secure logic is probably unique..
It does seem like the secure logic is specific to the OMAP, even though the GP part (omap3_gp_romcode_call) seems to be generic.
I don't think it would fit well in common v7 code and overall, I don't think I have sufficient knowledge of those issues to take the decision to move that code around.
Hence, I'll keep my proposal to what it is now, and let someone else move the code around in the future if they feel the need to.
something like CONFIG_ARM_ARCH_CP15_ERRATA or like
On Tue, Feb 24, 2015 at 6:02 AM, Paul Kocialkowski contact@paulk.fr wrote:
Le lundi 23 février 2015 à 16:43 -0600, Nishanth Menon a écrit :
On Mon, Feb 23, 2015 at 4:21 PM, Tom Rini trini@ti.com wrote:
On Mon, Feb 23, 2015 at 08:16:44PM +0100, Paul Kocialkowski wrote:
Not every version and revision of the Cortex-A8 ARM core requires the same errata workarounds. In addition, enabling those requires to have similar workarounds enabled in the kernel or it will cause numerous segmentation faults.
This enables those workarounds when they are needed, according to what is done in Linux.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr
Nishanth, any comments here, since you've been thinking about errata stuff lately? Thanks!
Reviewed-by: Tom Rini trini@ti.com
I would probably go with v7 start code triggering the logic. even though the secure logic is probably unique..
It does seem like the secure logic is specific to the OMAP, even though the GP part (omap3_gp_romcode_call) seems to be generic.
I don't think it would fit well in common v7 code and overall, I don't think I have sufficient knowledge of those issues to take the decision to move that code around.
Hence, I'll keep my proposal to what it is now, and let someone else move the code around in the future if they feel the need to.
Do you mind if i took a shot at it? would be great if you could test the same.
Le mardi 24 février 2015 à 09:22 -0600, Nishanth Menon a écrit :
On Tue, Feb 24, 2015 at 6:02 AM, Paul Kocialkowski contact@paulk.fr wrote:
Le lundi 23 février 2015 à 16:43 -0600, Nishanth Menon a écrit :
On Mon, Feb 23, 2015 at 4:21 PM, Tom Rini trini@ti.com wrote:
On Mon, Feb 23, 2015 at 08:16:44PM +0100, Paul Kocialkowski wrote:
Not every version and revision of the Cortex-A8 ARM core requires the same errata workarounds. In addition, enabling those requires to have similar workarounds enabled in the kernel or it will cause numerous segmentation faults.
This enables those workarounds when they are needed, according to what is done in Linux.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr
Nishanth, any comments here, since you've been thinking about errata stuff lately? Thanks!
Reviewed-by: Tom Rini trini@ti.com
I would probably go with v7 start code triggering the logic. even though the secure logic is probably unique..
It does seem like the secure logic is specific to the OMAP, even though the GP part (omap3_gp_romcode_call) seems to be generic.
I don't think it would fit well in common v7 code and overall, I don't think I have sufficient knowledge of those issues to take the decision to move that code around.
Hence, I'll keep my proposal to what it is now, and let someone else move the code around in the future if they feel the need to.
Do you mind if i took a shot at it? would be great if you could test the same.
Alright, please go ahead! I'm available to test any patch on my omap 3630 device.
On 02/24/2015 10:09 AM, Paul Kocialkowski wrote:
Le mardi 24 février 2015 à 09:22 -0600, Nishanth Menon a écrit :
On Tue, Feb 24, 2015 at 6:02 AM, Paul Kocialkowski contact@paulk.fr wrote:
Le lundi 23 février 2015 à 16:43 -0600, Nishanth Menon a écrit :
On Mon, Feb 23, 2015 at 4:21 PM, Tom Rini trini@ti.com wrote:
On Mon, Feb 23, 2015 at 08:16:44PM +0100, Paul Kocialkowski wrote:
Not every version and revision of the Cortex-A8 ARM core requires the same errata workarounds. In addition, enabling those requires to have similar workarounds enabled in the kernel or it will cause numerous segmentation faults.
This enables those workarounds when they are needed, according to what is done in Linux.
Follow-up to the discussion from July 2013: http://lists.denx.de/pipermail/u-boot/2013-July/158377.html
Signed-off-by: Paul Kocialkowski contact@paulk.fr
Nishanth, any comments here, since you've been thinking about errata stuff lately? Thanks!
Reviewed-by: Tom Rini trini@ti.com
I would probably go with v7 start code triggering the logic. even though the secure logic is probably unique..
It does seem like the secure logic is specific to the OMAP, even though the GP part (omap3_gp_romcode_call) seems to be generic.
I don't think it would fit well in common v7 code and overall, I don't think I have sufficient knowledge of those issues to take the decision to move that code around.
Hence, I'll keep my proposal to what it is now, and let someone else move the code around in the future if they feel the need to.
Do you mind if i took a shot at it? would be great if you could test the same.
Alright, please go ahead! I'm available to test any patch on my omap 3630 device.
Alright, the series should now include OMAP3 as well.. Sorry about confusion when list blocked me for too many cc folks etc.. anyways..
https://patchwork.ozlabs.org/patch/443261/ https://patchwork.ozlabs.org/patch/443264/ https://patchwork.ozlabs.org/patch/443268/ https://patchwork.ozlabs.org/patch/443265/ https://patchwork.ozlabs.org/patch/443263/ https://patchwork.ozlabs.org/patch/443262/ https://patchwork.ozlabs.org/patch/443267/ https://patchwork.ozlabs.org/patch/443266/ https://patchwork.ozlabs.org/patch/443260/
participants (5)
-
Igor Grinberg -
Nishanth Menon -
Paul Kocialkowski -
Paul Kocialkowski -
Tom Rini