Hi, All,

I'm finding some problems that appear to be serious errors in the 1.1.6 release for the Atmel AT91RM9200.

I've passed some of these on to Wolfgang Denk, but I surmise he's simply too busy to respond to single messages, and I certainly understand that.

So, I'll pass on what I've found, and anyone who wants to confirm or discuss these is certainly welcome to do so.

a) The Ethernet driver sets up PB19 for RMII mode. See cpu/arm920t/at91rm9200/ether.c and look for eth_init. You'll see that if CONFIG_AT91C_USE_RMII is defined, then PB19 is to be used. The problem is that PB19 is an MII pin, not an RMII pin, as can be confirmed with the -dk and -ek schematics. Once I removed this, and just did

#ifndef CONFIG_AT91C_USE_RMII

// all the stuff to configure PB19 -> PB12 for MII mode

#endif

Then everything worked fine.

b) The cp.b wasn't working for copying from SDRAM to DataFlash because the code to decide whether to copy to flash was broken, because it was passing addr to addr_dataflash and not dest. e.g. the code was this:

if ((addr2info(dest)!= NULL) && (!addr_dataflash(addr)))

when it should be (AFAIK)

if ((addr2info (addr) != NULL) && (!addr_dataflash(dest))

this part then copies to the regular flash.

c) There are inconsistencies in the PLLAR_VAL being used. In the manual it states that the OUTA bits in the PLLA config register should be "10" if the output frequency is to be between 150 and 240 MHz, and 00 when the output frequency is to be between 80 to 160 MHz. So the value that should be put in this register for full speed operation would have OUTA = "10" not "00" as it is in the file. This is in include/configs/at91rm9200dk.h.

I'd like to hear people's comments on this.

Thanks in advance,

Regards,

Matt Gessner