From: Tien Fong Chee tien.fong.chee@intel.com

These configurations no longer valid for N5X, remove them.

Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com Signed-off-by: Jit Loon Lim jit.loon.lim@intel.com --- arch/arm/mach-socfpga/Kconfig | 1 - arch/arm/mach-socfpga/Makefile | 11 +++++++++++ 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index df44530e83..4e366e5413 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -97,7 +97,6 @@ config TARGET_SOCFPGA_N5X select ARMV8_SET_SMPEN select BINMAN if SPL_ATF select CLK - select FPGA_INTEL_SDM_MAILBOX select NCORE_CACHE select SPL_ALTERA_SDRAM select SPL_CLK if SPL diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index ec38b64dd4..58a486f6de 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -64,11 +64,22 @@ obj-y += misc_soc64.o obj-y += mmu-arm64_s10.o obj-y += reset_manager_s10.o obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += secure_vab.o +obj-y += smmu_s10.o obj-y += system_manager_soc64.o obj-y += timer_s10.o obj-$(CONFIG_SOCFPGA_SECURE_VAB_AUTH) += vab.o obj-y += wrap_handoff_soc64.o obj-y += wrap_pll_config_soc64.o +ifndef CONFIG_SPL_BUILD +obj-y += rsu.o +obj-y += rsu_ll_qspi.o +obj-y += rsu_misc.o +obj-y += rsu_s10.o +obj-$(CONFIG_ARMV8_PSCI) += psci.o +obj-$(CONFIG_ARMV8_PSCI) += smc_ecc_dbe_s10.o +obj-$(CONFIG_ARMV8_PSCI) += smc_registers_s10.o +obj-$(CONFIG_ARMV8_PSCI) += smc_rsu_s10.o +endif endif

ifdef CONFIG_SPL_BUILD