[U-Boot] [PATCH] x86: minnowmax: use the correct NOR in the configuration

The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr --- include/configs/minnowmax.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC #define CONFIG_SDHCI

The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr
--- Added to GNATS database as unassigned-patches/141
Responsible: patch-coord Message-Id: 1429805814-1892-1-git-send-email-contact@huau-gabriel.fr In-Reply-To: References: Patch-Date: Thu Apr 23 18:16:54 +0200 2015
--- include/configs/minnowmax.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC #define CONFIG_SDHCI

Hi Gabriel,
On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau contact@huau-gabriel.fr wrote:
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr
include/configs/minnowmax.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC
#define CONFIG_SDHCI
I think you need also update minnowmax.dts file to change the compatible string.
Regards, Bin

Hi Bin,
On 04/23/2015 08:20 PM, Bin Meng wrote:
Hi Gabriel,
On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau contact@huau-gabriel.fr wrote:
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr
include/configs/minnowmax.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC
#define CONFIG_SDHCI
I think you need also update minnowmax.dts file to change the compatible string.
Regards, Bin
Well ... I didn't see that as the NOR was still working on the board, I didn't find any reference except in the device tree for this compatible string, do you know if this is really used or not? I'll do the modification anyway, it's always better to put the correct information.
Regards, Gabriel

Hi Gabriel,
On Fri, Apr 24, 2015 at 10:42 PM, Gabriel Huau contact@huau-gabriel.fr wrote:
Hi Bin,
On 04/23/2015 08:20 PM, Bin Meng wrote:
Hi Gabriel,
On Fri, Apr 24, 2015 at 12:16 AM, Gabriel Huau contact@huau-gabriel.fr wrote:
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr
include/configs/minnowmax.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC
#define CONFIG_SDHCI
I think you need also update minnowmax.dts file to change the compatible string.
Regards, Bin
Well ... I didn't see that as the NOR was still working on the board, I didn't find any reference except in the device tree for this compatible string, do you know if this is really used or not?
The spi flash compatible string is not used by the spi flash driver.
I'll do the modification anyway, it's always better to put the correct information.
Yep, it is a hint for someone else to figure out what spi flash is mounted on the board.
Regards, Bin

The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr --- Changes for v2: - Update the dts to put the correct flash name
arch/x86/dts/minnowmax.dts | 2 +- include/configs/minnowmax.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 3936e21..dd20b2c 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -94,7 +94,7 @@ compatible = "intel,ich"; spi-flash@0 { reg = <0>; - compatible = "sst,25vf016b", "spi-flash"; + compatible = "stmicro,n25q064a", "spi-flash"; memory-map = <0xff800000 0x00800000>; }; }; diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC #define CONFIG_SDHCI

On Sat, Apr 25, 2015 at 11:13 PM, Gabriel Huau contact@huau-gabriel.fr wrote:
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr
Changes for v2: - Update the dts to put the correct flash name
arch/x86/dts/minnowmax.dts | 2 +- include/configs/minnowmax.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 3936e21..dd20b2c 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -94,7 +94,7 @@ compatible = "intel,ich"; spi-flash@0 { reg = <0>;
compatible = "sst,25vf016b", "spi-flash";
compatible = "stmicro,n25q064a", "spi-flash"; memory-map = <0xff800000 0x00800000>; }; };
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC
#define CONFIG_SDHCI
Reviewed-by: Bin Meng bmeng.cn@gmail.com

On 26 April 2015 at 08:08, Bin Meng bmeng.cn@gmail.com wrote:
On Sat, Apr 25, 2015 at 11:13 PM, Gabriel Huau contact@huau-gabriel.fr wrote:
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr
Changes for v2: - Update the dts to put the correct flash name
arch/x86/dts/minnowmax.dts | 2 +- include/configs/minnowmax.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 3936e21..dd20b2c 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -94,7 +94,7 @@ compatible = "intel,ich"; spi-flash@0 { reg = <0>;
compatible = "sst,25vf016b", "spi-flash";
compatible = "stmicro,n25q064a", "spi-flash"; memory-map = <0xff800000 0x00800000>; }; };
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC
#define CONFIG_SDHCI
Reviewed-by: Bin Meng bmeng.cn@gmail.com
Acked-by: Simon Glass sjg@chromium.org

On 28 April 2015 at 07:59, Simon Glass sjg@chromium.org wrote:
On 26 April 2015 at 08:08, Bin Meng bmeng.cn@gmail.com wrote:
On Sat, Apr 25, 2015 at 11:13 PM, Gabriel Huau contact@huau-gabriel.fr wrote:
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr
Changes for v2: - Update the dts to put the correct flash name
arch/x86/dts/minnowmax.dts | 2 +- include/configs/minnowmax.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 3936e21..dd20b2c 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -94,7 +94,7 @@ compatible = "intel,ich"; spi-flash@0 { reg = <0>;
compatible = "sst,25vf016b", "spi-flash";
compatible = "stmicro,n25q064a", "spi-flash"; memory-map = <0xff800000 0x00800000>; }; };
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC
#define CONFIG_SDHCI
Reviewed-by: Bin Meng bmeng.cn@gmail.com
Acked-by: Simon Glass sjg@chromium.org
Applied to u-boot-x86, thanks!

The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr --- Changes for v2: - Update the dts to put the correct flash name
arch/x86/dts/minnowmax.dts | 2 +- include/configs/minnowmax.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 3936e21..dd20b2c 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -94,7 +94,7 @@ compatible = "intel,ich"; spi-flash@0 { reg = <0>; - compatible = "sst,25vf016b", "spi-flash"; + compatible = "stmicro,n25q064a", "spi-flash"; memory-map = <0xff800000 0x00800000>; }; }; diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC #define CONFIG_SDHCI

Hi,
Wrong command ... I sent a duplicate patch v2, you can ignore this one, sorry.
Regards, Gabriel
On 04/25/2015 08:19 AM, Gabriel Huau wrote:
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr
Changes for v2:
- Update the dts to put the correct flash name
arch/x86/dts/minnowmax.dts | 2 +- include/configs/minnowmax.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 3936e21..dd20b2c 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -94,7 +94,7 @@ compatible = "intel,ich"; spi-flash@0 { reg = <0>;
compatible = "sst,25vf016b", "spi-flash";
}; };compatible = "stmicro,n25q064a", "spi-flash"; memory-map = <0xff800000 0x00800000>;
diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC #define CONFIG_SDHCI
participants (5)
-
Bin Meng
-
Gabriel Huau
-
gabriel huau
-
Simon Glass
-
u-boot@bugs.denx.de