[U-Boot] [PATCH 1/2] usb: host: xhci: make sure to power up PHY
some boards won't work if the PHY isn't explicitly powered up.
Signed-off-by: Felipe Balbi balbi@ti.com --- drivers/usb/host/xhci-omap.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c index e667810..912b2bd 100644 --- a/drivers/usb/host/xhci-omap.c +++ b/drivers/usb/host/xhci-omap.c @@ -98,6 +98,7 @@ static int omap_xhci_core_init(struct omap_xhci *omap) { int ret = 0;
+ usb_phy_power(1); omap_enable_phy(omap);
ret = dwc3_core_init(omap->dwc3_reg);
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.
Signed-off-by: Felipe Balbi balbi@ti.com --- drivers/usb/phy/omap_usb_phy.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c index af46db2..0ed3e70 100644 --- a/drivers/usb/phy/omap_usb_phy.c +++ b/drivers/usb/phy/omap_usb_phy.c @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
void usb_phy_power(int on) { - return; + u32 val; + + /* USB1_CTRL */ + val = readl(0x44e10628); + if (on) { + /* + * these bits are re-used on AM437x to power up/down the USB + * CM and OTG PHYs, if we don't toggle them, USB will not be + * functional on newer silicon revisions + */ + val &= ~0x3; + } else { + val |= 0x3; + } + + writel(val, 0x44e10628); } #endif /* CONFIG_AM437X_USB2PHY2_HOST */
Hi
Il 23/giu/2014 23:26 "Felipe Balbi" balbi@ti.com ha scritto:
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.
Signed-off-by: Felipe Balbi balbi@ti.com
drivers/usb/phy/omap_usb_phy.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/phy/omap_usb_phy.c
b/drivers/usb/phy/omap_usb_phy.c
index af46db2..0ed3e70 100644 --- a/drivers/usb/phy/omap_usb_phy.c +++ b/drivers/usb/phy/omap_usb_phy.c @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci
*omap)
void usb_phy_power(int on) {
return;
u32 val;/* USB1_CTRL */val = readl(0x44e10628);
Can you please describe 0x44e...
if (on) {/** these bits are re-used on AM437x to power up/down the
USB
* CM and OTG PHYs, if we don't toggle them, USB will not
be
* functional on newer silicon revisions*/val &= ~0x3;} else {val |= 0x3;
ditto
}writel(val, 0x44e10628);
ditto
} #endif /* CONFIG_AM437X_USB2PHY2_HOST */
Michael
-- 2.0.0.390.gcb682f8
U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Hi,
On Mon, Jun 23, 2014 at 11:28:30PM +0200, Michael Trimarchi wrote:
@@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci
*omap)
void usb_phy_power(int on) {
return;
u32 val;/* USB1_CTRL */val = readl(0x44e10628);Can you please describe 0x44e...
describe in what way ? The comment right above it, tells you what it is, so does the comment in the if block. Now, if what you're asking is for #defines for those constants, sure, I can do that.
Hi
Il 23/giu/2014 23:58 "Felipe Balbi" balbi@ti.com ha scritto:
Hi,
On Mon, Jun 23, 2014 at 11:28:30PM +0200, Michael Trimarchi wrote:
@@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct
omap_xhci
*omap)
void usb_phy_power(int on) {
return;
u32 val;/* USB1_CTRL */val = readl(0x44e10628);Can you please describe 0x44e...
describe in what way ? The comment right above it, tells you what it is, so does the comment in the if block. Now, if what you're asking is for #defines for those constants, sure, I can do that.
Yes, this was the suggestione
-- balbi
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.
Signed-off-by: Felipe Balbi balbi@ti.com ---
Changes since v1: - add macros for USB1_CTRL register and bits
arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 5 +++++ drivers/usb/phy/omap_usb_phy.c | 17 ++++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h index 15399dc..b5875e3 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h @@ -40,6 +40,11 @@ #define VTP0_CTRL_ADDR 0x44E10E0C #define VTP1_CTRL_ADDR 0x48140E10
+/* USB CTRL Base Address */ +#define USB1_CTRL 0x44e10628 +#define USB1_CTRL_CM_PWRDN BIT(0) +#define USB1_CTRL_OTG_PWRDN BIT(1) + /* DDR Base address */ #define DDR_PHY_CMD_ADDR 0x44E12000 #define DDR_PHY_DATA_ADDR 0x44E120C8 diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c index af46db2..f78d532 100644 --- a/drivers/usb/phy/omap_usb_phy.c +++ b/drivers/usb/phy/omap_usb_phy.c @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
void usb_phy_power(int on) { - return; + u32 val; + + /* USB1_CTRL */ + val = readl(USB1_CTRL); + if (on) { + /* + * these bits are re-used on AM437x to power up/down the USB + * CM and OTG PHYs, if we don't toggle them, USB will not be + * functional on newer silicon revisions + */ + val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN); + } else { + val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN; + } + + writel(val, USB1_CTRL); } #endif /* CONFIG_AM437X_USB2PHY2_HOST */
Hi
Add USB custodian
Il 24/giu/2014 00:18 "Felipe Balbi" balbi@ti.com ha scritto:
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.
Signed-off-by: Felipe Balbi balbi@ti.com
Changes since v1: - add macros for USB1_CTRL register and bits
arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 5 +++++ drivers/usb/phy/omap_usb_phy.c | 17 ++++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
index 15399dc..b5875e3 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h @@ -40,6 +40,11 @@ #define VTP0_CTRL_ADDR 0x44E10E0C #define VTP1_CTRL_ADDR 0x48140E10
+/* USB CTRL Base Address */ +#define USB1_CTRL 0x44e10628 +#define USB1_CTRL_CM_PWRDN BIT(0) +#define USB1_CTRL_OTG_PWRDN BIT(1)
/* DDR Base address */ #define DDR_PHY_CMD_ADDR 0x44E12000 #define DDR_PHY_DATA_ADDR 0x44E120C8 diff --git a/drivers/usb/phy/omap_usb_phy.c
b/drivers/usb/phy/omap_usb_phy.c
index af46db2..f78d532 100644 --- a/drivers/usb/phy/omap_usb_phy.c +++ b/drivers/usb/phy/omap_usb_phy.c @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci
*omap)
void usb_phy_power(int on) {
return;
u32 val;/* USB1_CTRL */val = readl(USB1_CTRL);if (on) {/** these bits are re-used on AM437x to power up/down the
USB
* CM and OTG PHYs, if we don't toggle them, USB will not
be
* functional on newer silicon revisions*/val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN);} else {val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN;}writel(val, USB1_CTRL);} #endif /* CONFIG_AM437X_USB2PHY2_HOST */
Michael
-- 2.0.0.390.gcb682f8
On Tuesday, June 24, 2014 at 04:38:58 PM, Michael Trimarchi wrote: [...]
index af46db2..f78d532 100644 --- a/drivers/usb/phy/omap_usb_phy.c +++ b/drivers/usb/phy/omap_usb_phy.c @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci
*omap)
void usb_phy_power(int on) {
return;
u32 val;/* USB1_CTRL */val = readl(USB1_CTRL);if (on) {/** these bits are re-used on AM437x to power up/down theUSB
* CM and OTG PHYs, if we don't toggle them, USB will notbe
* functional on newer silicon revisions*/val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN);} else {val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN;}writel(val, USB1_CTRL);
Thanks, please use clrbits_le32() and setbits_le32() here instead.
Best regards, Marek Vasut
hi,
On Mon, Jun 23, 2014 at 05:18:24PM -0500, Felipe Balbi wrote:
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.
Signed-off-by: Felipe Balbi balbi@ti.com
Changes since v1:
- add macros for USB1_CTRL register and bits
same here. Still pending, am437x will remain broken until this is applied.
cheers
arch/arm/include/asm/arch-am33xx/hardware_am43xx.h | 5 +++++ drivers/usb/phy/omap_usb_phy.c | 17 ++++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h index 15399dc..b5875e3 100644 --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h @@ -40,6 +40,11 @@ #define VTP0_CTRL_ADDR 0x44E10E0C #define VTP1_CTRL_ADDR 0x48140E10
+/* USB CTRL Base Address */ +#define USB1_CTRL 0x44e10628 +#define USB1_CTRL_CM_PWRDN BIT(0) +#define USB1_CTRL_OTG_PWRDN BIT(1)
/* DDR Base address */ #define DDR_PHY_CMD_ADDR 0x44E12000 #define DDR_PHY_DATA_ADDR 0x44E120C8 diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c index af46db2..f78d532 100644 --- a/drivers/usb/phy/omap_usb_phy.c +++ b/drivers/usb/phy/omap_usb_phy.c @@ -222,7 +222,22 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
void usb_phy_power(int on) {
- return;
- u32 val;
- /* USB1_CTRL */
- val = readl(USB1_CTRL);
- if (on) {
/** these bits are re-used on AM437x to power up/down the USB* CM and OTG PHYs, if we don't toggle them, USB will not be* functional on newer silicon revisions*/val &= ~(USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN);- } else {
val |= USB1_CTRL_CM_PWRDN | USB1_CTRL_OTG_PWRDN;- }
- writel(val, USB1_CTRL);
} #endif /* CONFIG_AM437X_USB2PHY2_HOST */
-- 2.0.0.390.gcb682f8
On Monday, July 07, 2014 at 06:14:23 PM, Felipe Balbi wrote:
hi,
On Mon, Jun 23, 2014 at 05:18:24PM -0500, Felipe Balbi wrote:
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.
Signed-off-by: Felipe Balbi balbi@ti.com
Changes since v1:
- add macros for USB1_CTRL register and bits
same here. Still pending, am437x will remain broken until this is applied.
What do you need for .07, this and 1/2 of this series ? Or did I miss something else?
In any case, sorry, will apply them once I know which ones.
Best regards, Marek Vasut
On Mon, Jul 07, 2014 at 08:08:29PM +0200, Marek Vasut wrote:
On Monday, July 07, 2014 at 06:14:23 PM, Felipe Balbi wrote:
hi,
On Mon, Jun 23, 2014 at 05:18:24PM -0500, Felipe Balbi wrote:
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.
Signed-off-by: Felipe Balbi balbi@ti.com
Changes since v1:
- add macros for USB1_CTRL register and bits
same here. Still pending, am437x will remain broken until this is applied.
What do you need for .07, this and 1/2 of this series ? Or did I miss something else?
In any case, sorry, will apply them once I know which ones.
Yes, 1/2 and 2/2 are the missing USB bits..
Hi Tom
On Wed, Jul 9, 2014 at 2:41 PM, Tom Rini trini@ti.com wrote:
On Mon, Jul 07, 2014 at 08:08:29PM +0200, Marek Vasut wrote:
On Monday, July 07, 2014 at 06:14:23 PM, Felipe Balbi wrote:
hi,
On Mon, Jun 23, 2014 at 05:18:24PM -0500, Felipe Balbi wrote:
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.
Signed-off-by: Felipe Balbi balbi@ti.com
Changes since v1:
- add macros for USB1_CTRL register and bits
same here. Still pending, am437x will remain broken until this is applied.
What do you need for .07, this and 1/2 of this series ? Or did I miss something else?
In any case, sorry, will apply them once I know which ones.
Yes, 1/2 and 2/2 are the missing USB bits..
Marek comment out about using clrbits and setbits. So it's better to resend them
Michael
-- Tom
U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
On Wednesday, July 09, 2014 at 02:48:55 PM, Michael Trimarchi wrote:
Hi Tom
On Wed, Jul 9, 2014 at 2:41 PM, Tom Rini trini@ti.com wrote:
On Mon, Jul 07, 2014 at 08:08:29PM +0200, Marek Vasut wrote:
On Monday, July 07, 2014 at 06:14:23 PM, Felipe Balbi wrote:
hi,
On Mon, Jun 23, 2014 at 05:18:24PM -0500, Felipe Balbi wrote:
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.
Signed-off-by: Felipe Balbi balbi@ti.com
Changes since v1:
- add macros for USB1_CTRL register and bits
same here. Still pending, am437x will remain broken until this is applied.
What do you need for .07, this and 1/2 of this series ? Or did I miss something else?
In any case, sorry, will apply them once I know which ones.
Yes, 1/2 and 2/2 are the missing USB bits..
Marek comment out about using clrbits and setbits. So it's better to resend them
Wasn't this fixed in the V2 ?
Best regards, Marek Vasut
On Tuesday, June 24, 2014 at 12:18:24 AM, Felipe Balbi wrote:
Newer AM437x silicon requires us to explicitly power up the USB2 PHY. By implementing usb_phy_power() we can achieve that.
Signed-off-by: Felipe Balbi balbi@ti.com
Applied 1/2 and 2/2 v2 , thanks.
Best regards, Marek Vasut
Hi
On 06/23/2014 04:25 PM, Felipe Balbi wrote:
some boards won't work if the PHY isn't explicitly powered up.
Signed-off-by: Felipe Balbi balbi@ti.com
drivers/usb/host/xhci-omap.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c index e667810..912b2bd 100644 --- a/drivers/usb/host/xhci-omap.c +++ b/drivers/usb/host/xhci-omap.c @@ -98,6 +98,7 @@ static int omap_xhci_core_init(struct omap_xhci *omap) { int ret = 0;
- usb_phy_power(1);
Should this not be in the omap_usb_phy.c in the omap_enable_phy call below? I mean you are enabling the PHY right?
omap_enable_phy(omap);
ret = dwc3_core_init(omap->dwc3_reg);
On Fri, Jun 27, 2014 at 10:27:30AM -0500, Dan Murphy wrote:
Hi
On 06/23/2014 04:25 PM, Felipe Balbi wrote:
some boards won't work if the PHY isn't explicitly powered up.
Signed-off-by: Felipe Balbi balbi@ti.com
drivers/usb/host/xhci-omap.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c index e667810..912b2bd 100644 --- a/drivers/usb/host/xhci-omap.c +++ b/drivers/usb/host/xhci-omap.c @@ -98,6 +98,7 @@ static int omap_xhci_core_init(struct omap_xhci *omap) { int ret = 0;
- usb_phy_power(1);
Should this not be in the omap_usb_phy.c in the omap_enable_phy call below? I mean you are enabling the PHY right?
no, I'm powering it up :-) moreover omap_xhci_core_exit() calls usb_power_power(0), so it's only balancing the calls.
On 06/27/2014 10:36 AM, Felipe Balbi wrote:
On Fri, Jun 27, 2014 at 10:27:30AM -0500, Dan Murphy wrote:
Hi
On 06/23/2014 04:25 PM, Felipe Balbi wrote:
some boards won't work if the PHY isn't explicitly powered up.
Signed-off-by: Felipe Balbi balbi@ti.com
drivers/usb/host/xhci-omap.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c index e667810..912b2bd 100644 --- a/drivers/usb/host/xhci-omap.c +++ b/drivers/usb/host/xhci-omap.c @@ -98,6 +98,7 @@ static int omap_xhci_core_init(struct omap_xhci *omap) { int ret = 0;
- usb_phy_power(1);
Should this not be in the omap_usb_phy.c in the omap_enable_phy call below? I mean you are enabling the PHY right?
no, I'm powering it up :-) moreover omap_xhci_core_exit() calls usb_power_power(0), so it's only balancing the calls.
OK that makes sense then
On Mon, Jun 23, 2014 at 04:25:38PM -0500, Felipe Balbi wrote:
some boards won't work if the PHY isn't explicitly powered up.
Signed-off-by: Felipe Balbi balbi@ti.com
ping, this is still pending in mainline u-boot. Without this, usb won't work on am437x-sk.
drivers/usb/host/xhci-omap.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c index e667810..912b2bd 100644 --- a/drivers/usb/host/xhci-omap.c +++ b/drivers/usb/host/xhci-omap.c @@ -98,6 +98,7 @@ static int omap_xhci_core_init(struct omap_xhci *omap) { int ret = 0;
usb_phy_power(1); omap_enable_phy(omap);
ret = dwc3_core_init(omap->dwc3_reg);
-- 2.0.0.390.gcb682f8
participants (5)
-
Dan Murphy -
Felipe Balbi -
Marek Vasut -
Michael Trimarchi -
Tom Rini