[U-Boot-Users] Re: Low-boot configuration for MPC8272ADS
Yesterday I was on holidays, so "monday morning effects" also in wednesday. The link to my submmit to Wolfgang with the patch
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/19108
Hi Alex, Sorry for delay, in Sydney we have 8.40am - just came to work. YES, IT'S WORKING (after applying your patch) WITH AND WITHOUT BDI!!
Thank you very much Alex and thank you very much Yuli - you were right all my problems were due to wrong value of HRCW
One more question, so it looks like BDI was depending on HRCW - on target board we would have a blank flash - how do we burn it using BDI (at first time we will not have a HRCW in it)?
As you say "the classical" ads8272 without BCSR, do you mean same flash module, SDRAM specs, phytters, etc.?
Apart from flash, everyting else will be the same. We will use P30 flash from Intel. I expected that I will need to do some work on it. Most of the worries were about BCSR. So, I just was wondering how easy would be to make u-boot not to use BCSR. eg. CS0 - flash, CS1 - SDRAM ...
Dmytro Bablinyuk wrote:
Yesterday I was on holidays, so "monday morning effects" also in wednesday. The link to my submmit to Wolfgang with the patch
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/19108
Hi Alex, Sorry for delay, in Sydney we have 8.40am - just came to work. YES, IT'S WORKING (after applying your patch) WITH AND WITHOUT BDI!!
Thank you very much Alex and thank you very much Yuli - you were right all my problems were due to wrong value of HRCW
One more question, so it looks like BDI was depending on HRCW - on target board we would have a blank flash - how do we burn it using BDI (at first time we will not have a HRCW in it)?
As you say "the classical" ads8272 without BCSR, do you mean same flash module, SDRAM specs, phytters, etc.?
Apart from flash, everyting else will be the same. We will use P30 flash from Intel. I expected that I will need to do some work on it. Most of the worries were about BCSR. So, I just was wondering how easy would be to make u-boot not to use BCSR. eg. CS0 - flash, CS1 - SDRAM ...
For blank flash, you need to pull up the RSTCONF* line (8260UM 5.4.2.1 "Single MPC8260 with Default Configuration") which will set your HRCW to all zeros rather than read it from memory (I'm assuming you are not implementing the BCSR).
This will require a different BDI2000 config file because the ISB will be set to 0x0000_0000 - if the first line in your special BDI config file sets the ISB back to your prefered value (0xF000_0000?), you should be able to leave all the rest of your config file the same.
At this point, you should be able to program flash. After programming flash, I go back to normal mode (RSTCONF* pulled low) and _power cycle_ the board. Note that the HRCW is only read on a power cycle, not on a software reset.
YMMV (Your Magic May Vary ;-)
gvb
For blank flash, you need to pull up the RSTCONF* line (8260UM 5.4.2.1 "Single MPC8260 with Default Configuration") which will set your HRCW to all zeros rather than read it from memory (I'm assuming you are not implementing the BCSR).
This will require a different BDI2000 config file because the ISB will be set to 0x0000_0000 - if the first line in your special BDI config file sets the ISB back to your prefered value (0xF000_0000?), you should be able to leave all the rest of your config file the same.
Thank you Jerry,
This removes some magic! Do you know by any chance what the reason can be for
8272>load Loading u-boot.bin , please wait .... # PPC: timeout while waiting for freeze *** TARGET: reset detected, restarting target ...
I have HRCW 0x0E74B20A, (ISB100), so I have changed my BDI config ; init core register WREG MSR 0x00001002 ;MSR : ME,RI WM32 0xF0010004 0xFFFFFFC3 ;SYPCR: disable watchdog WM32 0xF00101A8 0x04700000 ;IMMR : internal space @ 0x04700000 ..
'md', some other commands work fine but 'load' is 'timing out'? u-boot as stand alone starts without problems (HRCW come from flash), BDI is not resetting anymore apart from case when I do 'load'.
Dmytro Bablinyuk wrote:
For blank flash, you need to pull up the RSTCONF* line (8260UM 5.4.2.1 "Single MPC8260 with Default Configuration") which will set your HRCW to all zeros rather than read it from memory (I'm assuming you are not implementing the BCSR).
This will require a different BDI2000 config file because the ISB will be set to 0x0000_0000 - if the first line in your special BDI config file sets the ISB back to your prefered value (0xF000_0000?), you should be able to leave all the rest of your config file the same.
Thank you Jerry,
This removes some magic! Do you know by any chance what the reason can be for
8272>load Loading u-boot.bin , please wait .... # PPC: timeout while waiting for freeze *** TARGET: reset detected, restarting target ...
I have HRCW 0x0E74B20A, (ISB100), so I have changed my BDI config ; init core register WREG MSR 0x00001002 ;MSR : ME,RI WM32 0xF0010004 0xFFFFFFC3 ;SYPCR: disable watchdog WM32 0xF00101A8 0x04700000 ;IMMR : internal space @ 0x04700000 ..
'md', some other commands work fine but 'load' is 'timing out'? u-boot as stand alone starts without problems (HRCW come from flash), BDI is not resetting anymore apart from case when I do 'load'.
Just guesses here...
Is this with an erased flash or with a flash with a HRCW programmed?
When you pull RSTCONF* high, your IMMR is set to 0x00000000. This is quite likely _not_ what you want, so you are going to have to fix up some registers.
In your snippet above, you will need to change: WM32 0x00010004 0xFFFFFFC3 ;SYPCR: disable watchdog WM32 0x000101A8 0x04700000 ;IMMR : internal space @ 0x04700000
You need to review every field in the HRCW and verify a value of 0 is OK or initialize the related registers in your BDI config file. I don't know enough (and am not paid enough ;-) to do this.
gvb
Is this with an erased flash or with a flash with a HRCW programmed?
This is with a flash with HRCW programmed. U-boot starts fine. But BDI on 'load' 8272>load Loading u-boot.bin , please wait .... # PPC: timeout while waiting for freeze *** TARGET: reset detected, restarting target ...
Here is the HRCW (from flash). 0x74 => ISB100 => IMMR=0xF000_0000
8272>md 0 00000000 : ff0e0e0e 0e0e0e0e 74747474 74747474 ........tttttttt 00000010 : b2b2b2b2 b2b2b2b2 0a0a0a0a 0a0a0a0a ................
And BDI config (we use CLKIN 66MHz, but it is the same effect with CLKIN 100MHz)
; bdiGDB configuration file for MPC8272ADS board ; ---------------------------------------------- ;
[INIT] ; init core register ;WREG MSR 0x00001002 ;MSR : ME,RI WM32 0xF0010004 0xFFFFFFC3 ;SYPCR: disable watchdog WM32 0xF00101A8 0x04700000 ;IMMR : internal space @ 0x04700000 WM32 0x04710024 0x100C0000 ;BCR : Single PQ2, .. WM32 0x04710c94 0x00000001 ;RMR : checkstop reset enable ; ; init memory controller WM32 0x04710104 0xFF800876 ;OR0: Flash 8MB, CS early negate, 11 w.s., Timing relax WM32 0x04710100 0xFF801801 ;BR0: Flash @0xFF800000, 32bit, no parity WM32 0x0471010C 0xFFFF8010 ;OR1: BCSR 32KB, all types access, 1 w.s. WM32 0x04710108 0x04501801 ;BR1: BCSR @0x04500000, 32bit, no parity WM32 0x04710124 0xFFFF8866 ;OR4: EEPROM 32KB, all types access, 6 w.s. WM32 0x04710120 0xC2000801 ;BR4: EEPROM @0xC2000000, 8bit, no parity ; ; init SDRAM Init (PPC bus) WM16 0x04710184 0x2800 ;MPTPR: Divide Bus clock by 41 WM8 0x0471019C 0x13 ;PSRT : Divide MPTPR output by 20 WM32 0x04710114 0xfe002ec0 ;OR2 : 32MB, 2 banks, row start at A9, 11 rows WM32 0x04710110 0x00000041 ;BR2 : SDRAM @0x00000000, 64bit, no parity WM32 0x04710190 0x824b36a3 ;PSDMR: Precharge all banks WM32 0x04710190 0xaa4b36a3 WM8 0x00000000 0x00 ;Access SDRAM WM32 0x04710190 0x8a4b36a3 ;PSDMR: CBR Refresh WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM32 0x04710190 0x9a4b36a3 ;PSDMR: Mode Set WM8 0x00000190 0x00 ;Access SDRAM WM32 0x04710190 0xc24b36a3 ;PSDMR: enable refresh, normal operation ;
[TARGET] CPUTYPE 8272 ;the CPU type JTAGCLOCK 0 ;use 16 MHz JTAG clock POWERUP 7000 ;start delay after power-up detected in ms BOOTADDR 0xfff00100 ;boot address used for start-up break WORKSPACE 0x04700000 ;workspace in target RAM for fast download ;MEMDELAY 2000 ;additional memory access delay MMU XLAT ; support virtual addresses (for Linux!) BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT) BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoints PTBASE 0x000000F0 ; ptr to page table pointers
[HOST] IP 192.168.1.100 FILE u-boot.bin FORMAT BIN ;FILE E:\temp\test16k.bin ;FORMAT BIN 0x04708000 LOAD MANUAL ;load code MANUAL or AUTO after reset DEBUGPORT 2001 PROMPT 8272> ;new prompt for Telnet DUMP dump.bin
[FLASH] CHIPTYPE I28BX8 ; Flash type CHIPSIZE 0x800000 ; Single chip size (8 Mbyte) BUSWIDTH 32 ; total width for the whole SIMM WORKSPACE 0x04700000 ;workspace in target RAM for fast download FILE 1MB_junk.bin FORMAT BIN 0xFF900000
ERASE 0xFF900000 ;erase sector 4 of flash SIMM ERASE 0xFF940000 ;erase sector 5 of flash SIMM ERASE 0xFF980000 ;erase sector 6 of flash SIMM ERASE 0xFF9C0000 ;erase sector 7 of flash SIMM
[REGS] DMM1 0x04700000 FILE reg8272.def
In message 436944AB.7040808@rftechnology.com.au you wrote:
8272>load Loading u-boot.bin , please wait .... # PPC: timeout while waiting for freeze *** TARGET: reset detected, restarting target ...
"load", i. e. load to RAM. Or did you intend to write "prog" here, i. e. prgram the (previously erased) flash?
I have HRCW 0x0E74B20A, (ISB100), so I have changed my BDI config ; init core register WREG MSR 0x00001002 ;MSR : ME,RI WM32 0xF0010004 0xFFFFFFC3 ;SYPCR: disable watchdog WM32 0xF00101A8 0x04700000 ;IMMR : internal space @ 0x04700000 ..
Did you set up your memory controller and correctly initialize the SDRAM?
Best regards,
Wolfgang Denk
8272>load Loading u-boot.bin , please wait .... # PPC: timeout while waiting for freeze *** TARGET: reset detected, restarting target ...
"load", i. e. load to RAM. Or did you intend to write "prog" here, i. e. prgram the (previously erased) flash?
I meant 'load' to RAM. I tried to burn u-boot into flash and tried to make this sequence
8272>load 8272>unlock 0xff800000 0x40000 32 8272>erase 0xFF800000 BLOCK 8272>prog 0xFF800000 u-boot.bin BIN
Did you set up your memory controller and correctly initialize the SDRAM?
If I put JP9 in position BCSR everything works fine (if I move IMMR in BDI config back to 0x0F000_0000 of course).
Here is the HRCW (from flash). 0x74 => ISB100 => IMMR=0xF000_0000
8272>md 0 00000000 : ff0e0e0e 0e0e0e0e 74747474 74747474 ........tttttttt 00000010 : b2b2b2b2 b2b2b2b2 0a0a0a0a 0a0a0a0a ................
And BDI config (we use CLKIN 66MHz, but it is the same effect with CLKIN 100MHz - I tried different crystal)
; bdiGDB configuration file for MPC8272ADS board ; ---------------------------------------------- ;
[INIT] ; init core register ;WREG MSR 0x00001002 ;MSR : ME,RI WM32 0xF0010004 0xFFFFFFC3 ;SYPCR: disable watchdog WM32 0xF00101A8 0x04700000 ;IMMR : internal space @ 0x04700000 WM32 0x04710024 0x100C0000 ;BCR : Single PQ2, .. WM32 0x04710c94 0x00000001 ;RMR : checkstop reset enable ; ; init memory controller WM32 0x04710104 0xFF800876 ;OR0: Flash 8MB, CS early negate, 11 w.s., Timing relax WM32 0x04710100 0xFF801801 ;BR0: Flash @0xFF800000, 32bit, no parity WM32 0x0471010C 0xFFFF8010 ;OR1: BCSR 32KB, all types access, 1 w.s. WM32 0x04710108 0x04501801 ;BR1: BCSR @0x04500000, 32bit, no parity WM32 0x04710124 0xFFFF8866 ;OR4: EEPROM 32KB, all types access, 6 w.s. WM32 0x04710120 0xC2000801 ;BR4: EEPROM @0xC2000000, 8bit, no parity ; ; init SDRAM Init (PPC bus) WM16 0x04710184 0x2800 ;MPTPR: Divide Bus clock by 41 WM8 0x0471019C 0x13 ;PSRT : Divide MPTPR output by 20 WM32 0x04710114 0xfe002ec0 ;OR2 : 32MB, 2 banks, row start at A9, 11 rows WM32 0x04710110 0x00000041 ;BR2 : SDRAM @0x00000000, 64bit, no parity WM32 0x04710190 0x824b36a3 ;PSDMR: Precharge all banks WM32 0x04710190 0xaa4b36a3 WM8 0x00000000 0x00 ;Access SDRAM WM32 0x04710190 0x8a4b36a3 ;PSDMR: CBR Refresh WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM8 0x00000000 0xFF ;Access SDRAM WM32 0x04710190 0x9a4b36a3 ;PSDMR: Mode Set WM8 0x00000190 0x00 ;Access SDRAM WM32 0x04710190 0xc24b36a3 ;PSDMR: enable refresh, normal operation ;
[TARGET] CPUTYPE 8272 ;the CPU type JTAGCLOCK 0 ;use 16 MHz JTAG clock POWERUP 7000 ;start delay after power-up detected in ms BOOTADDR 0xfff00100 ;boot address used for start-up break WORKSPACE 0x04700000 ;workspace in target RAM for fast download ;MEMDELAY 2000 ;additional memory access delay MMU XLAT ; support virtual addresses (for Linux!) BDIMODE AGENT ;the BDI working mode (LOADONLY | AGENT) BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoints PTBASE 0x000000F0 ; ptr to page table pointers
[HOST] IP 192.168.1.100 FILE u-boot.bin FORMAT BIN ;FILE E:\temp\test16k.bin ;FORMAT BIN 0x04708000 LOAD MANUAL ;load code MANUAL or AUTO after reset DEBUGPORT 2001 PROMPT 8272> ;new prompt for Telnet DUMP dump.bin
[FLASH] CHIPTYPE I28BX8 ; Flash type CHIPSIZE 0x800000 ; Single chip size (8 Mbyte) BUSWIDTH 32 ; total width for the whole SIMM WORKSPACE 0x04700000 ;workspace in target RAM for fast download FILE 1MB_junk.bin FORMAT BIN 0xFF900000
ERASE 0xFF900000 ;erase sector 4 of flash SIMM ERASE 0xFF940000 ;erase sector 5 of flash SIMM ERASE 0xFF980000 ;erase sector 6 of flash SIMM ERASE 0xFF9C0000 ;erase sector 7 of flash SIMM
[REGS] DMM1 0x04700000 FILE reg8272.def
In message 436950A4.3070002@rftechnology.com.au you wrote:
8272>load
No load address given here.
[HOST] IP 192.168.1.100 FILE u-boot.bin FORMAT BIN ;FILE E:\temp\test16k.bin ;FORMAT BIN 0x04708000
No load address given here either. So where are you going to load the code to?
Best regards,
Wolfgang Denk
8272>load
No load address given here.
[HOST] IP 192.168.1.100 FILE u-boot.bin FORMAT BIN ;FILE E:\temp\test16k.bin ;FORMAT BIN 0x04708000
No load address given here either. So where are you going to load the code to?
Thank you Wolfgang,
Sorry for asking, I tried 'load 0x1000' (this is where I expect to have my SDRAM), the problem remains - can you suggest please what sort of address I should try?
8272>load 0x1000 Loading u-boot.bin , please wait .... # PPC: timeout while waiting for freeze *** TARGET: reset detected, restarting target ...
Thank you again Wolfgang, and thank you very much to everybody who was involved in this discussion.
I got everything working. I would like to summarise output of this discussion - it might be useful to somebody else in the future. Please correct me if I am wrong.
_MPC8272ADS_in_low_boot_mode_ (HRCW comming from flash)
(1). Apply patch from Alexandre Bastos (valid for u-boot snapshot from 2 November 2005, thank you Alex)
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/19108
*MPC8272ADS Flash HRCW 0x0E74B20A
(2). Compile 'make MPC8272ADS_lowboot_config'
(3). Since our HRCW 0x0E74B20A (0x74 => ISB100 => IMMR=0xF000_0000) we need to change BDI2000 config file (thank you to Yuli Barcohen)
WM32 0xF0010004 0xFFFFFFC3 ;SYPCR: disable watchdog WM32 0xF00101A8 0x04700000 ;IMMR : internal space @ 0x04700000
*Note I use default 0x04700000 for IMMR since it came like this. Wrong HRCW value may cause board to continuously reset.
(4). Move JP9 in position MEMORY, make sure that SW2 Boot Source is ON (boot from flash)
(5). In BDI2000 config file change
BOOTADDR 0x00000100 ;boot address used for start-up break
(6). Burn software using BDI (thank you to Wolfgang Denk)
8272>load 0 8272>unlock 0xff800000 0x40000 32 8272>erase 0xFF800000 BLOCK 8272>prog 0xFF800000 u-boot.bin BIN
Make sure you use load address when loading to memory
i.e. 8272>load 0
If no load address is given or BOOTADDR different from 0x00000100 you may see message in BDI console
# PPC: timeout while waiting for freeze
(7). (Haven't tried yet). To program blank flash with 8272 ie. on target board without BCSR. (thank you to Jerry Van Baren) --8<-- For blank flash, you need to pull up the RSTCONF* line (8260UM 5.4.2.1 "Single MPC8260 with Default Configuration") which will set your HRCW to all zeros rather than read it from memory (I'm assuming you are not implementing the BCSR).
This will require a different BDI2000 config file because the ISB will be set to 0x0000_0000 - if the first line in your special BDI config file sets the ISB back to your prefered value (0xF000_0000?), you should be able to leave all the rest of your config file the same.
At this point, you should be able to program flash. After programming flash, I go back to normal mode (RSTCONF* pulled low) and _power cycle_ the board. Note that the HRCW is only read on a power cycle, not on a software reset. --8<--
On Nov 2, 2005, at 4:55 PM, Dmytro Bablinyuk wrote:
One more question, so it looks like BDI was depending on HRCW - on target board we would have a blank flash - how do we burn it using BDI (at first time we will not have a HRCW in it)?
The newest version of BDI firmware has the ability to set a HRCW out of reset, so no more worries about flash contents or reset configuration.
-- Dan
Dan Malek dan@embeddededge.com wrote:
The newest version of BDI firmware has the ability to set a HRCW out of reset,so no more worries about flash contents or reset configuration.
So in this case, RSTCONF* should be pulled to HIGH or LOW?
Thanks,
Sam
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On Nov 3, 2005, at 10:39 PM, Sam Song wrote:
So in this case, RSTCONF* should be pulled to HIGH or LOW?
I'm likely to have mis-spoken about this. I have 83xx on the brain and this feature was added to the PPC firmware to support that. I don't know if it's really applicable to any other processor. I'll experiment and see.
Apologies for any confusion.
-- Dan
Dan Malek dan@embeddededge.com wrote:
support that. I don't know if it's really applicable to any other processor. I'll experiment and see.
We'd like to be notified in your most convenience. My expecting result is that one config file can deal with RSTCONF* LOW/HIGH cases for FLASH programming with this firmware:-)
Thanks,
Sam
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participants (5)
-
Dan Malek -
Dmytro Bablinyuk -
Jerry Van Baren -
Sam Song -
Wolfgang Denk