[U-Boot] [PATCH 1/4] tegra2: Seaboard's MMC has an 8-bit bus
Modify board_mmc_init to configure SDMMC4 for an 8-bit bus, since that's what is wired up on the board.
Signed-off-by: Stephen Warren swarren@nvidia.com --- Note: These patches build on various Tegra2-related patches recently posted by Simon Glass; see v2 of the 6-entry patchset shown at: http://patchwork.ozlabs.org/project/uboot/list/?submitter=6170&state=1&a...
board/nvidia/common/board.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index d13537d..8033612 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -163,8 +163,8 @@ int board_mmc_init(bd_t *bd) gpio_config_mmc();
debug("board_mmc_init: init eMMC\n"); - /* init dev 0, eMMC chip, with 4-bit bus */ - tegra2_mmc_init(0, 4); + /* init dev 0, eMMC chip, with 8-bit bus */ + tegra2_mmc_init(0, 8);
debug("board_mmc_init: init SD slot\n"); /* init dev 1, SD slot, with 4-bit bus */
Without this, the GPIO_CNF register will not be programmed, and hence the GPIO signals will not reach the pins; the pinmux's configured function will be routed to the pins instead.
Signed-off-by: Stephen Warren swarren@nvidia.com --- board/nvidia/seaboard/seaboard.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index bc67d0f..578d909 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -62,9 +62,11 @@ void gpio_config_uart(void) void gpio_config_mmc(void) { /* Set EN_VDDIO_SD (GPIO I6) */ + gpio_request(GPIO_PI6, "SDMMC4 power"); gpio_direction_output(GPIO_PI6, 1);
/* Config pin as GPI for Card Detect (GPIO I5) */ + gpio_request(GPIO_PI5, "SDMMC4 card detect"); gpio_direction_input(GPIO_PI5); }
Stephen Warren wrote at Friday, September 30, 2011 1:40 PM: ...
void gpio_config_mmc(void) { /* Set EN_VDDIO_SD (GPIO I6) */
gpio_request(GPIO_PI6, "SDMMC4 power"); gpio_direction_output(GPIO_PI6, 1);
/* Config pin as GPI for Card Detect (GPIO I5) */
gpio_request(GPIO_PI5, "SDMMC4 card detect"); gpio_direction_input(GPIO_PI5);
}
Tom pointed out that the strings here should say "SDMMC3" not "SDMMC4". I'll wait until Tuesday for any other comments, then repost an updated patchset including that fix.
Seaboard uses SDMMC4, SDMMC3. Harmony uses SDMMC4, SDMMC2. Move board_init_mmc and gpio_config_mmc into board-specific files, so boards can choose which ports to set up. Split clock_init_mmc and pin_mux_mmc into per-port functions, and export them for use by boards.
Signed-off-by: Stephen Warren swarren@nvidia.com --- board/nvidia/common/board.c | 77 ++++++++++++++++++++++++-------------- board/nvidia/common/board.h | 8 +++- board/nvidia/harmony/harmony.c | 56 +++++++++++++++++++++++++-- board/nvidia/seaboard/seaboard.c | 23 +++++++++++ drivers/mmc/tegra2_mmc.c | 18 +++++++++ 5 files changed, 148 insertions(+), 34 deletions(-)
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index 8033612..6c09a4c 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -102,20 +102,37 @@ static void pin_mux_uart(void)
#ifdef CONFIG_TEGRA2_MMC /* - * Routine: clock_init_mmc - * Description: init the PLL and clocks for the SDMMC controllers + * Routine: clock_init_mmc4 + * Description: init the PLL and clocks for SDMMC4 controller */ -static void clock_init_mmc(void) +void clock_init_mmc4(void) { clock_start_periph_pll(PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH, 20000000); +} + +/* + * Routine: clock_init_mmc3 + * Description: init the PLL and clocks for SDMMC3 controller + */ +void clock_init_mmc3(void) +{ clock_start_periph_pll(PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH, 20000000); }
/* - * Routine: pin_mux_mmc - * Description: setup the pin muxes/tristate values for the SDMMC(s) + * Routine: clock_init_mmc2 + * Description: init the PLL and clocks for SDMMC2 controller */ -static void pin_mux_mmc(void) +void clock_init_mmc2(void) +{ + clock_start_periph_pll(PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH, 20000000); +} + +/* + * Routine: pin_mux_mmc4 + * Description: setup the pin muxes/tristate values for SDMMC4 + */ +void pin_mux_mmc4(void) { /* SDMMC4: config 3, x8 on 2nd set of pins */ pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); @@ -125,7 +142,14 @@ static void pin_mux_mmc(void) pinmux_tristate_disable(PINGRP_ATB); pinmux_tristate_disable(PINGRP_GMA); pinmux_tristate_disable(PINGRP_GME); +}
+/* + * Routine: pin_mux_mmc3 + * Description: setup the pin muxes/tristate values for SDMMC3 + */ +void pin_mux_mmc3(void) +{ /* SDMMC3: SDIO3_CLK, SDIO3_CMD, SDIO3_DAT[3:0] */ pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3); pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3); @@ -135,6 +159,25 @@ static void pin_mux_mmc(void) pinmux_tristate_disable(PINGRP_SDD); pinmux_tristate_disable(PINGRP_SDB); } + +/* + * Routine: pin_mux_mmc2 + * Description: setup the pin muxes/tristate values for SDMMC2 + */ +void pin_mux_mmc2(void) +{ + /* SDMMC2: SDIO2_CLK, SDIO2_CMD, SDIO2_DAT[7:0] */ + pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2); + pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2); + + pinmux_tristate_disable(PINGRP_DTA); + pinmux_tristate_disable(PINGRP_DTD); + + /* For power GPIO PI6 */ + pinmux_tristate_disable(PINGRP_ATA); + /* For power GPIO PT3 */ + pinmux_tristate_disable(PINGRP_DTB); +} #endif
/* @@ -152,28 +195,6 @@ int board_init(void) return 0; }
-#ifdef CONFIG_TEGRA2_MMC -/* this is a weak define that we are overriding */ -int board_mmc_init(bd_t *bd) -{ - debug("board_mmc_init called\n"); - /* Enable clocks, muxes, etc. for SDMMC controllers */ - clock_init_mmc(); - pin_mux_mmc(); - gpio_config_mmc(); - - debug("board_mmc_init: init eMMC\n"); - /* init dev 0, eMMC chip, with 8-bit bus */ - tegra2_mmc_init(0, 8); - - debug("board_mmc_init: init SD slot\n"); - /* init dev 1, SD slot, with 4-bit bus */ - tegra2_mmc_init(1, 4); - - return 0; -} -#endif - #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { diff --git a/board/nvidia/common/board.h b/board/nvidia/common/board.h index 344e702..eee475d 100644 --- a/board/nvidia/common/board.h +++ b/board/nvidia/common/board.h @@ -26,7 +26,13 @@
void tegra2_start(void); void gpio_config_uart(void); -void gpio_config_mmc(void); +void clock_init_mmc4(void); +void clock_init_mmc3(void); +void clock_init_mmc2(void); +void pin_mux_mmc4(void); +void pin_mux_mmc3(void); +void pin_mux_mmc2(void); int tegra2_mmc_init(int dev_index, int bus_width); +int tegra2_mmc_index(struct mmc *mmc);
#endif /* BOARD_H */ diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c index cbb30d6..228ae2e 100644 --- a/board/nvidia/harmony/harmony.c +++ b/board/nvidia/harmony/harmony.c @@ -23,10 +23,13 @@
#include <common.h> #include <asm/io.h> +#include <asm/arch/clock.h> #include <asm/arch/tegra2.h> +#include <asm/gpio.h> #ifdef CONFIG_TEGRA2_MMC #include <mmc.h> #endif +#include "../common/board.h"
/* * Routine: gpio_config_uart @@ -43,18 +46,61 @@ void gpio_config_uart(void) */ void gpio_config_mmc(void) { - /* Not implemented for now */ + /* Set SDMMC4 power (GPIO I6) */ + gpio_request(GPIO_PI6, "SDMMC4 power"); + gpio_direction_output(GPIO_PI6, 1); + + /* Config pin as GPI for SDMMC4 Card Detect (GPIO H2) */ + gpio_request(GPIO_PH2, "SDMMC4 card detect"); + gpio_direction_input(GPIO_PH2); + + /* Set SDMMC2 power (GPIO T3) */ + gpio_request(GPIO_PT3, "SDMMC2 power"); + gpio_direction_output(GPIO_PT3, 1); + + /* Config pin as GPI for SDMMC2 Card Detect (GPIO I5) */ + gpio_request(GPIO_PI5, "SDMMC2 card detect"); + gpio_direction_input(GPIO_PI5); +} + +/* this is a weak define that we are overriding */ +int board_mmc_init(bd_t *bd) +{ + debug("board_mmc_init called\n"); + /* Enable clocks, muxes, etc. for SDMMC controllers */ + clock_init_mmc4(); + clock_init_mmc2(); + pin_mux_mmc4(); + pin_mux_mmc2(); + gpio_config_mmc(); + + debug("board_mmc_init: init SD slot J26\n"); + /* init dev 0, SD slot J26, with 8-bit bus */ + tegra2_mmc_init(0, 8); + + debug("board_mmc_init: init SD slot J5\n"); + /* init dev 2, SD slot J5, with 8-bit bus */ + tegra2_mmc_init(2, 4); + + return 0; }
/* this is a weak define that we are overriding */ int board_mmc_getcd(u8 *cd, struct mmc *mmc) { debug("board_mmc_getcd called\n"); - /* - * Hard-code CD presence for now. Need to add GPIO inputs - * for Harmony - */ *cd = 1; + + if (tegra2_mmc_index(mmc) == 0) { + /* Harmony SDMMC4 = SDIO4_CD = GPIO_PH2 */ + if (gpio_get_value(GPIO_PH2)) + *cd = 0; + } else { + /* Harmony SDMMC2 = SDIO2_CD = GPIO_PI5 */ + if (gpio_get_value(GPIO_PI5)) + *cd = 0; + } + return 0; } #endif diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 578d909..37edbca 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -28,6 +28,7 @@ #ifdef CONFIG_TEGRA2_MMC #include <mmc.h> #endif +#include "../common/board.h"
/* * Routine: gpio_config_uart @@ -71,6 +72,28 @@ void gpio_config_mmc(void) }
/* this is a weak define that we are overriding */ +int board_mmc_init(bd_t *bd) +{ + debug("board_mmc_init called\n"); + /* Enable clocks, muxes, etc. for SDMMC controllers */ + clock_init_mmc4(); + clock_init_mmc3(); + pin_mux_mmc4(); + pin_mux_mmc3(); + gpio_config_mmc(); + + debug("board_mmc_init: init eMMC\n"); + /* init dev 0, eMMC chip, with 8-bit bus */ + tegra2_mmc_init(0, 8); + + debug("board_mmc_init: init SD slot\n"); + /* init dev 1, SD slot, with 4-bit bus */ + tegra2_mmc_init(1, 4); + + return 0; +} + +/* this is a weak define that we are overriding */ int board_mmc_getcd(u8 *cd, struct mmc *mmc) { debug("board_mmc_getcd called\n"); diff --git a/drivers/mmc/tegra2_mmc.c b/drivers/mmc/tegra2_mmc.c index 9e741f2..223dbf3 100644 --- a/drivers/mmc/tegra2_mmc.c +++ b/drivers/mmc/tegra2_mmc.c @@ -478,3 +478,21 @@ int tegra2_mmc_init(int dev_index, int bus_width) dev_index, bus_width); return tegra2_mmc_initialize(dev_index, bus_width); } + +int tegra2_mmc_index(struct mmc *mmc) +{ + struct mmc_host *host = (struct mmc_host *)mmc->priv; + + switch (host->base) { + case TEGRA2_SDMMC3_BASE: + return 1; + case TEGRA2_SDMMC2_BASE: + return 2; + case TEGRA2_SDMMC1_BASE: + return 3; + case TEGRA2_SDMMC4_BASE: + default: + return 0; + } +} +
Ventana is a board which is very similar to Seaboard. Support it by re-using board/nvidia/seaboard/seaboard.c with minor run-time conditionals.
Signed-off-by: Stephen Warren swarren@nvidia.com --- board/nvidia/seaboard/seaboard.c | 11 ++++++- board/nvidia/ventana/Makefile | 55 ++++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/ventana.h | 55 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 120 insertions(+), 2 deletions(-) create mode 100644 board/nvidia/ventana/Makefile create mode 100644 include/configs/ventana.h
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 37edbca..775b980 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -31,10 +31,10 @@ #include "../common/board.h"
/* - * Routine: gpio_config_uart + * Routine: gpio_config_uart_seaboard * Description: Force GPIO_PI3 low on Seaboard so UART4 works. */ -void gpio_config_uart(void) +void gpio_config_uart_seaboard(void) { int gp = GPIO_PI3; struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE; @@ -55,6 +55,13 @@ void gpio_config_uart(void) writel(val, &bank->gpio_dir_out[GPIO_PORT(gp)]); }
+void gpio_config_uart(void) +{ + if (machine_is_ventana()) + return; + gpio_config_uart_seaboard(); +} + #ifdef CONFIG_TEGRA2_MMC /* * Routine: gpio_config_mmc diff --git a/board/nvidia/ventana/Makefile b/board/nvidia/ventana/Makefile new file mode 100644 index 0000000..029673f --- /dev/null +++ b/board/nvidia/ventana/Makefile @@ -0,0 +1,55 @@ +# +# (C) Copyright 2010,2011 +# NVIDIA Corporation <www.nvidia.com> +# +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +endif + +LIB = $(obj)lib$(BOARD).o + +COBJS += ../seaboard/seaboard.o +COBJS += ../common/board.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/boards.cfg b/boards.cfg index d32ff7e..bc990e9 100644 --- a/boards.cfg +++ b/boards.cfg @@ -185,6 +185,7 @@ s5pc210_universal arm armv7 universal_c210 samsung smdkv310 arm armv7 smdkv310 samsung s5pc2xx harmony arm armv7 harmony nvidia tegra2 seaboard arm armv7 seaboard nvidia tegra2 +ventana arm armv7 ventana nvidia tegra2 u8500_href arm armv7 u8500 st-ericsson u8500 actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2 actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8 diff --git a/include/configs/ventana.h b/include/configs/ventana.h new file mode 100644 index 0000000..afd6ff6 --- /dev/null +++ b/include/configs/ventana.h @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2010,2011 + * NVIDIA Corporation <www.nvidia.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/sizes.h> +#include "tegra2-common.h" + +/* High-level configuration options */ +#define TEGRA2_SYSMEM "mem=384M@0M nvmem=128M@384M mem=512M@512M" +#define V_PROMPT "Tegra2 (Ventana) # " +#define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Ventana" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA2_ENABLE_UARTD +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE + +#define CONFIG_MACH_TYPE MACH_TYPE_VENTANA +#define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */ + +#define CONFIG_BOARD_EARLY_INIT_F + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA2_MMC +#define CONFIG_CMD_MMC + +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#endif /* __CONFIG_H */
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Stephen Warren