[U-Boot] [PATCH 1/2 v6] powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds
From: Jerry Huang Chang-Ming.Huang@freescale.com
The new MPC8360EMDS board supports 512MB DDR since 2008.
For 512MB DDR: BAT0 is used for the first 256MB memory, BAT4 is used for the second 256MB memory and the address space of SDRAM follows the DDR, so if the size of DDR is 256MB, the BAT4 will be used for SDRAM and if the size of DDR is 512MB, the BAT4 will be used for the second 256MB memory and there is no BAT for SDRAM. Therefore, if the size of DDR is 512MB, this patch will use BAT6 for SDRAM and BAT5 will be used for PCI MEM to replace the BAT6 after the codes relocates to the DDR.
Signed-off-by: Jerry Huang Chang-Ming.Huang@freescale.com CC: Kim Phillips kim.phillips@freescale.com --- cahnges for v2: - fix multiline comment wrong changes for v3: - change the oscillator to 33330000, not 33300000 changes for v4: - add the mandatory history of changes changes for v5: - move the code to platform file from lib/board.c - add 2011 copyright changes for v6: - split into two patch - clean the code - add CC
board/freescale/mpc8360emds/mpc8360emds.c | 27 ++++++++++++++++++++++++++- include/configs/MPC8360EMDS.h | 3 ++- 2 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c index 0babd26..f150a09 100644 --- a/board/freescale/mpc8360emds/mpc8360emds.c +++ b/board/freescale/mpc8360emds/mpc8360emds.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2006,2010 Freescale Semiconductor, Inc. + * Copyright (C) 2006,2010-2011 Freescale Semiconductor, Inc. * Dave Liu daveliu@freescale.com * * See file CREDITS for list of people who contributed to this @@ -23,6 +23,7 @@ #include <asm/mmu.h> #include <asm/io.h> #include <asm/fsl_enet.h> +#include <asm/mmu.h> #if defined(CONFIG_OF_LIBFDT) #include <libfdt.h> #endif @@ -138,9 +139,20 @@ int board_early_init_f(void)
int board_early_init_r(void) { + gd_t *gd; #ifdef CONFIG_PQ_MDS_PIB pib_init(); #endif + /* + * BAT6 is used for SDRAM when DDR size is 512MB or larger than 256MB + * So re-setup PCI MEM space used BAT5 after relocated to DDR + */ + gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); + if (gd->ram_size > CONFIG_MAX_MEM_MAPPED) { + write_bat(DBAT5, CONFIG_SYS_DBAT6U, CONFIG_SYS_DBAT6L); + write_bat(IBAT5, CONFIG_SYS_IBAT6U, CONFIG_SYS_IBAT6L); + } + return 0; }
@@ -290,6 +302,19 @@ static int sdram_init(unsigned int base) if (rem) base = base - rem + sdram_size;
+ /* + * Setup BAT6 for SDRAM when DDR size is 512MB or larger than 256MB + * After relocated to DDR, reuse BAT5 for PCI MEM space + */ + if (base > CONFIG_MAX_MEM_MAPPED) { + unsigned long batl = base | BATL_PP_10 | BATL_MEMCOHERENCE; + unsigned long batu = base | BATU_BL_64M | BATU_VS | BATU_VP; + + /* Setup the BAT6 for SDRAM */ + write_bat(DBAT6, batu, batl); + write_bat(IBAT6, batu, batl); + } + sdram_addr = (uint *)base; /* * Setup SDRAM Base and Option Registers diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index a959940..cfba894 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2006 Freescale Semiconductor, Inc. + * Copyright (C) 2006,2011 Freescale Semiconductor, Inc. * * Dave Liu daveliu@freescale.com * @@ -506,6 +506,7 @@ */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */ +#define CONFIG_BAT_RW
/* DDR/LBC SDRAM: cacheable */ #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
From: Jerry Huang Chang-Ming.Huang@freescale.com
The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to support QE 500MHz since 2008.
Signed-off-by: Jerry Huang Chang-Ming.Huang@freescale.com CC: Kim Phillips kim.phillips@freescale.com --- cahnges for v2: - fix multiline comment wrong changes for v3: - change the oscillator to 33330000, not 33300000 changes for v4: - add the mandatory history of changes changes for v5: - move the code to platform file from lib/board.c - add 2011 copyright changes for v6: - split into two patch - add the CLKIN33 option for 33.33MHz oscillator - add the readme for CLKIN33 option - add CC
boards.cfg | 5 +++++ doc/README.mpc8360emds | 14 ++++++++++++++ include/configs/MPC8360EMDS.h | 25 +++++++++++++++++++++++++ 3 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/boards.cfg b/boards.cfg index 90dab8b..273615d 100644 --- a/boards.cfg +++ b/boards.cfg @@ -424,6 +424,11 @@ MPC8360EMDS_ATM powerpc mpc83xx mpc8360emds freesca MPC8360EMDS_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_33M,PQ_MDS_PIB=1 MPC8360EMDS_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_66M,PQ_MDS_PIB=1 MPC8360EMDS_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCISLAVE +MPC8360EMDS_CLKIN33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ +MPC8360EMDS_CLKIN33_ATM powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 +MPC8360EMDS_CLKIN33_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_33M,PQ_MDS_PIB=1 +MPC8360EMDS_CLKIN33_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_66M,PQ_MDS_PIB=1 +MPC8360EMDS_CLKIN33_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCISLAVE MPC8360ERDK powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK MPC8360ERDK_33 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK:CLKIN_33MHZ MPC8360ERDK_66 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK diff --git a/doc/README.mpc8360emds b/doc/README.mpc8360emds index d65a2a4..6506193 100644 --- a/doc/README.mpc8360emds +++ b/doc/README.mpc8360emds @@ -109,6 +109,20 @@ Freescale MPC8360EMDS Board 1) DIP SW setting is similar as Section 1.1, except for SW9[3] is 1 2) Make MPC8360EMDS_SLAVE_config
+ MPC8360EMDS shipped with 33.33MHz oscillator(U41 is 33.33MHZ): + + To make u-boot as the defualt with 33.33MHz oscillator: + 1) make distclean + 2) make MPC8360EMDS_CLKIN33_config + + To make u-boot support the other feature with 33.33MHz oscillator: + 1) make distclean + 2) make MPC8360EMDS_CLKIN33_XXX_config + (where XXX is: + ATM - ATM support with 33.33MHz oscillator + HOST_33 - PCI host 33M support with 33.33MHz oscillator + HOST_66 - PCI host 66M support with 33.33MHz oscillator + SLAVE - PCI slave support with 33.33MHz oscillator)
5. Downloading and Flashing Images
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index cfba894..9aa3973 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -39,6 +39,18 @@ /* * System Clock Setup */ +#ifdef CONFIG_CLKIN_33MHZ +#ifdef CONFIG_PCISLAVE +#define CONFIG_83XX_PCICLK 33330000 /* in HZ */ +#else +#define CONFIG_83XX_CLKIN 33330000 /* in Hz */ +#endif + +#ifndef CONFIG_SYS_CLK_FREQ +#define CONFIG_SYS_CLK_FREQ 33330000 +#endif + +#else #ifdef CONFIG_PCISLAVE #define CONFIG_83XX_PCICLK 66000000 /* in HZ */ #else @@ -48,10 +60,22 @@ #ifndef CONFIG_SYS_CLK_FREQ #define CONFIG_SYS_CLK_FREQ 66000000 #endif +#endif
/* * Hardware Reset Configuration Word */ +#ifdef CONFIG_CLKIN_33MHZ +#define CONFIG_SYS_HRCW_LOW (\ + HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\ + HRCWL_DDR_TO_SCB_CLK_1X1 |\ + HRCWL_CSB_TO_CLKIN_8X1 |\ + HRCWL_VCO_1X2 |\ + HRCWL_CE_PLL_VCO_DIV_4 |\ + HRCWL_CE_PLL_DIV_1X1 |\ + HRCWL_CE_TO_PLL_1X15 |\ + HRCWL_CORE_TO_CSB_2X1) +#else #define CONFIG_SYS_HRCW_LOW (\ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\ HRCWL_DDR_TO_SCB_CLK_1X1 |\ @@ -61,6 +85,7 @@ HRCWL_CE_PLL_DIV_1X1 |\ HRCWL_CE_TO_PLL_1X6 |\ HRCWL_CORE_TO_CSB_2X1) +#endif
#ifdef CONFIG_PCISLAVE #define CONFIG_SYS_HRCW_HIGH (\
Dear Chang-Ming.Huang@freescale.com,
In message 1320302773-6704-2-git-send-email-Chang-Ming.Huang@freescale.com you wrote:
From: Jerry Huang Chang-Ming.Huang@freescale.com
The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to support QE 500MHz since 2008.
...
MPC8360EMDS_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_33M,PQ_MDS_PIB=1 MPC8360EMDS_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_66M,PQ_MDS_PIB=1 MPC8360EMDS_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCISLAVE +MPC8360EMDS_CLKIN33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ +MPC8360EMDS_CLKIN33_ATM powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 +MPC8360EMDS_CLKIN33_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_33M,PQ_MDS_PIB=1 +MPC8360EMDS_CLKIN33_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_66M,PQ_MDS_PIB=1 +MPC8360EMDS_CLKIN33_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCISLAVE
Can you please chose somewhat shorter config names? I consider it a personal offense when you coerce me into typing config names like "MPC8360EMDS_CLKIN33_HOST_33". Please chose shorter names. For a start, consider what represents the defualt configuration, and omit all options for this, i. e. allow for a plain "MPC8360EMDS" to represent the default configuration.
Best regards,
Wolfgang Denk
On Thu, 3 Nov 2011 18:53:50 +0100 Wolfgang Denk wd@denx.de wrote:
Dear Chang-Ming.Huang@freescale.com,
In message 1320302773-6704-2-git-send-email-Chang-Ming.Huang@freescale.com you wrote:
From: Jerry Huang Chang-Ming.Huang@freescale.com
The new MPC8360EMDS board changes the oscillator to 33.33MHz in order to support QE 500MHz since 2008.
...
MPC8360EMDS_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_33M,PQ_MDS_PIB=1 MPC8360EMDS_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_66M,PQ_MDS_PIB=1 MPC8360EMDS_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCISLAVE +MPC8360EMDS_CLKIN33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ +MPC8360EMDS_CLKIN33_ATM powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 +MPC8360EMDS_CLKIN33_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_33M,PQ_MDS_PIB=1 +MPC8360EMDS_CLKIN33_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCI_66M,PQ_MDS_PIB=1 +MPC8360EMDS_CLKIN33_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:CLKIN_33MHZ,PCI,PCISLAVE
Can you please chose somewhat shorter config names? I consider it a personal offense when you coerce me into typing config names like "MPC8360EMDS_CLKIN33_HOST_33". Please chose shorter names. For a
right, e.g., MPC8360EMDS_33_HOST_33 would match current 8313 nomenclature.
start, consider what represents the defualt configuration, and omit all options for this, i. e. allow for a plain "MPC8360EMDS" to represent the default configuration.
actually I'd like the user to check their oscillator and be forced specify the _33 or _66.
These changes should also be reflected in the documentation.
Kim
On Thu, 3 Nov 2011 14:46:12 +0800 Chang-Ming.Huang@freescale.com wrote:
From: Jerry Huang Chang-Ming.Huang@freescale.com
The new MPC8360EMDS board supports 512MB DDR since 2008.
For 512MB DDR: BAT0 is used for the first 256MB memory, BAT4 is used for the second 256MB memory and the address space of SDRAM follows the DDR, so if the size of DDR is 256MB, the BAT4 will be used for SDRAM and if the size of DDR is 512MB, the BAT4 will be used for the second 256MB memory and there is no BAT for SDRAM. Therefore, if the size of DDR is 512MB, this patch will use BAT6 for SDRAM and BAT5 will be used for PCI MEM to replace the BAT6 after the codes relocates to the DDR.
Signed-off-by: Jerry Huang Chang-Ming.Huang@freescale.com CC: Kim Phillips kim.phillips@freescale.com
applied.
Thanks,
Kim
participants (3)
-
Chang-Ming.Huang＠freescale.com -
Kim Phillips -
Wolfgang Denk