[U-Boot] [PATCH v2 0/7] arm64: mvebu: Add support for A8K community board
From: Konstantin Porotchkin kostap@marvell.com
This patch series adds initil support for A8K community board MACCHIATOBin manufactured by SolidRun. It should be applied on top of Stefan Roese patches adding support for SD/eMMC devices on Marvell A37x0/A80x0/A70x0 SoCs. The top level patch is called: "arm64: mvebu: Enable SDHCI/MMC support for the db-88f7040/8040" The default board DTS file is based on the original work of Rabeeh Khory from SolidRun.
Changes for v2: - Move PCIe reset GPIO support from board-specific function to mvebu PCIe driver - Move VBUS GPIO support from board-specific function to mvebu XHCI driver - Allow MMC support for "bubt" command with and without CONFIG_BLK
Konstantin Porotchkin (6): arm64: mvebu: Update bubt command MMC block device access arm64: mvebu: gpio: Add GPIO nodes to A8K family devices arm64: mvebu: dts: Add i2c1 pin definitions to CPM mvebu: usb: xhci: Add support for VBUS controlled by GPIO mvebu: pcie: Add support for GPIO reset for PCIe device arm64: mvebu: Add default configuraton for MACCHIATOBin board
Rabeeh Khoury (1): arm64: mvebu: dts: Add DTS file for MACCHIATOBin board
arch/arm/dts/Makefile | 1 + arch/arm/dts/armada-7040.dtsi | 1 + arch/arm/dts/armada-8040-mcbin.dts | 253 ++++++++++++++++++++++ arch/arm/dts/armada-8040.dtsi | 1 + arch/arm/dts/armada-ap806.dtsi | 8 + arch/arm/dts/armada-cp110-master.dtsi | 22 ++ arch/arm/dts/armada-cp110-slave.dtsi | 18 ++ cmd/mvebu/bubt.c | 25 ++- configs/mvebu_mcbin-88f8040_defconfig | 65 ++++++ doc/device-tree-bindings/pci/armada8k-pcie.txt | 49 +++++ doc/device-tree-bindings/usb/marvell.xhci-usb.txt | 29 +++ drivers/pci/pcie_dw_mvebu.c | 20 ++ drivers/usb/host/xhci-mvebu.c | 14 ++ 13 files changed, 503 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/armada-8040-mcbin.dts create mode 100644 configs/mvebu_mcbin-88f8040_defconfig create mode 100644 doc/device-tree-bindings/pci/armada8k-pcie.txt create mode 100644 doc/device-tree-bindings/usb/marvell.xhci-usb.txt
From: Konstantin Porotchkin kostap@marvell.com
Update the MMC block device access code in bubt command implementation according to the latest MMC driver changes.
Change-Id: Ie852ceefa0b040ffe1362bdb7815fcea9b2d923b Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com --- Changes for v2: - Allow MMC support for builds without CONFIG_BLK
cmd/mvebu/bubt.c | 25 ++++++++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c index 1cbfcf0..b752927 100644 --- a/cmd/mvebu/bubt.c +++ b/cmd/mvebu/bubt.c @@ -18,6 +18,9 @@ #include <usb.h> #include <fs.h> #include <mmc.h> +#ifdef CONFIG_BLK +#include <blk.h> +#endif #include <u-boot/sha1.h> #include <u-boot/sha256.h>
@@ -116,7 +119,9 @@ static int mmc_burn_image(size_t image_size) ulong blk_written; int err; const u8 mmc_dev_num = CONFIG_SYS_MMC_ENV_DEV; - +#ifdef CONFIG_BLK + struct blk_desc *blk_desc; +#endif mmc = find_mmc_device(mmc_dev_num); if (!mmc) { printf("No SD/MMC/eMMC card found\n"); @@ -144,13 +149,27 @@ static int mmc_burn_image(size_t image_size) * MMC/eMMC boots from LBA-0 */ start_lba = IS_SD(mmc) ? 1 : 0; +#ifdef CONFIG_BLK + blk_count = image_size / mmc->write_bl_len; + if (image_size % mmc->write_bl_len) + blk_count += 1; + + blk_desc = mmc_get_blk_desc(mmc); + if (!blk_desc) { + printf("Error - failed to obtain block descriptor\n"); + return -ENODEV; + } + blk_written = blk_dwrite(blk_desc, start_lba, blk_count, + (void *)get_load_addr()); +#else blk_count = image_size / mmc->block_dev.blksz; if (image_size % mmc->block_dev.blksz) blk_count += 1;
blk_written = mmc->block_dev.block_write(mmc_dev_num, - start_lba, blk_count, - (void *)get_load_addr()); + start_lba, blk_count, + (void *)get_load_addr()); +#endif /* CONFIG_BLK */ if (blk_written != blk_count) { printf("Error - written %#lx blocks\n", blk_written); return -ENOSPC;
On 08.01.2017 15:52, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Update the MMC block device access code in bubt command implementation according to the latest MMC driver changes.
Change-Id: Ie852ceefa0b040ffe1362bdb7815fcea9b2d923b Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com
Changes for v2:
- Allow MMC support for builds without CONFIG_BLK
Applied to u-boot-marvell/master
Thanks, Stefan
From: Konstantin Porotchkin kostap@marvell.com
Add GPIO nodes to AP-806 and CP-110-master DTSI files.
Change-Id: I05958698d460cb721b7d8683d34f74a5ea32532c Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com --- Changes for v2: - None, copy
arch/arm/dts/armada-7040.dtsi | 1 + arch/arm/dts/armada-8040.dtsi | 1 + arch/arm/dts/armada-ap806.dtsi | 8 ++++++++ arch/arm/dts/armada-cp110-master.dtsi | 18 ++++++++++++++++++ arch/arm/dts/armada-cp110-slave.dtsi | 18 ++++++++++++++++++ 5 files changed, 46 insertions(+)
diff --git a/arch/arm/dts/armada-7040.dtsi b/arch/arm/dts/armada-7040.dtsi index 78d995d..b5be0c4 100644 --- a/arch/arm/dts/armada-7040.dtsi +++ b/arch/arm/dts/armada-7040.dtsi @@ -45,6 +45,7 @@ * one CP110. */
+#include <dt-bindings/gpio/gpio.h> #include "armada-ap806-quad.dtsi" #include "armada-cp110-master.dtsi"
diff --git a/arch/arm/dts/armada-8040.dtsi b/arch/arm/dts/armada-8040.dtsi index 9c1b28c..96cc112 100644 --- a/arch/arm/dts/armada-8040.dtsi +++ b/arch/arm/dts/armada-8040.dtsi @@ -45,6 +45,7 @@ * two CP110. */
+#include <dt-bindings/gpio/gpio.h> #include "armada-ap806-quad.dtsi" #include "armada-cp110-master.dtsi" #include "armada-cp110-slave.dtsi" diff --git a/arch/arm/dts/armada-ap806.dtsi b/arch/arm/dts/armada-ap806.dtsi index b6d31af..d86e5dd 100644 --- a/arch/arm/dts/armada-ap806.dtsi +++ b/arch/arm/dts/armada-ap806.dtsi @@ -158,6 +158,14 @@ }; };
+ ap_gpio0: gpio@6F5040 { + compatible = "marvell,orion-gpio"; + reg = <0x6F5040 0x40>; + ngpios = <20>; + gpio-controller; + #gpio-cells = <2>; + }; + xor@400000 { compatible = "marvell,mv-xor-v2"; reg = <0x400000 0x1000>, diff --git a/arch/arm/dts/armada-cp110-master.dtsi b/arch/arm/dts/armada-cp110-master.dtsi index d637867..a3e922d 100644 --- a/arch/arm/dts/armada-cp110-master.dtsi +++ b/arch/arm/dts/armada-cp110-master.dtsi @@ -113,6 +113,24 @@ }; };
+ cpm_gpio0: gpio@440100 { + compatible = "marvell,orion-gpio"; + reg = <0x440100 0x40>; + ngpios = <32>; + gpiobase = <20>; + gpio-controller; + #gpio-cells = <2>; + }; + + cpm_gpio1: gpio@440140 { + compatible = "marvell,orion-gpio"; + reg = <0x440140 0x40>; + ngpios = <31>; + gpiobase = <52>; + gpio-controller; + #gpio-cells = <2>; + }; + cpm_sata0: sata@540000 { compatible = "marvell,armada-8k-ahci"; reg = <0x540000 0x30000>; diff --git a/arch/arm/dts/armada-cp110-slave.dtsi b/arch/arm/dts/armada-cp110-slave.dtsi index 92ef55c..ff3fbed 100644 --- a/arch/arm/dts/armada-cp110-slave.dtsi +++ b/arch/arm/dts/armada-cp110-slave.dtsi @@ -100,6 +100,24 @@ }; };
+ cps_gpio0: gpio@440100 { + compatible = "marvell,orion-gpio"; + reg = <0x440100 0x40>; + ngpios = <32>; + gpiobase = <20>; + gpio-controller; + #gpio-cells = <2>; + }; + + cps_gpio1: gpio@440140 { + compatible = "marvell,orion-gpio"; + reg = <0x440140 0x40>; + ngpios = <31>; + gpiobase = <52>; + gpio-controller; + #gpio-cells = <2>; + }; + cps_sata0: sata@540000 { compatible = "marvell,armada-8k-ahci"; reg = <0x540000 0x30000>;
From: Konstantin Porotchkin kostap@marvell.com
Add i2c-1 pin mappings to CP0(master) DTSI file
Change-Id: I0c6e6de8a557393f518f7df8e6daa6dfce1788b0 Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com --- Changes for v2: - None, copy
arch/arm/dts/armada-cp110-master.dtsi | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/armada-cp110-master.dtsi b/arch/arm/dts/armada-cp110-master.dtsi index a3e922d..3776e4e 100644 --- a/arch/arm/dts/armada-cp110-master.dtsi +++ b/arch/arm/dts/armada-cp110-master.dtsi @@ -94,6 +94,10 @@ marvell,pins = < 37 38 >; marvell,function = <2>; }; + cpm_i2c1_pins: cpm-i2c-pins-1 { + marvell,pins = < 35 36 >; + marvell,function = <2>; + }; cpm_ge2_rgmii_pins: cpm-ge-rgmii-pins-0 { marvell,pins = < 44 45 46 47 48 49 50 51 52 53 54 55 >;
From: Konstantin Porotchkin kostap@marvell.com
Add support for "marvell,vbus-gpio" property to mvebu XHCI host adapter driver. This option is valid when CONFIG_DM_GPIO=y
Change-Id: I930b3ebe001e50ae8d5abe1f3c774bcdb1739e64 Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com --- Changes for v2: - Move VBUS GPIO support from board-specific function to mvebu XHCI driver - Increase delay after VBUS GPIO activation
doc/device-tree-bindings/usb/marvell.xhci-usb.txt | 29 +++++++++++++++++++++++ drivers/usb/host/xhci-mvebu.c | 14 +++++++++++ 2 files changed, 43 insertions(+) create mode 100644 doc/device-tree-bindings/usb/marvell.xhci-usb.txt
diff --git a/doc/device-tree-bindings/usb/marvell.xhci-usb.txt b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt new file mode 100644 index 0000000..b0a53ad --- /dev/null +++ b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt @@ -0,0 +1,29 @@ +Marvell SOC USB controllers + +This controller is integrated in Armada 3700/8K. +It uses the same properties as a generic XHCI host controller + +Required properties : + - compatible: should be one or more of: + - "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs + - "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs + - reg: should contain address and length of the standard XHCI + register set for the device. + - interrupts: one XHCI interrupt should be described here. + +Optional properties: + - clocks: reference to a clock + - marvell,vbus-gpio : If present, specifies a gpio that needs to be + activated for the bus to be powered. + +Example: + cpm_usb3_0: usb3@500000 { + compatible = "marvell,armada-8k-xhci", + "generic-xhci"; + reg = <0x500000 0x4000>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpm_syscon0 1 22>; + marvell,vbus-gpio = <&cpm_gpio1 15 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c index 46eb937..64801e7 100644 --- a/drivers/usb/host/xhci-mvebu.c +++ b/drivers/usb/host/xhci-mvebu.c @@ -45,6 +45,20 @@ static int xhci_usb_probe(struct udevice *dev) struct mvebu_xhci *ctx = dev_get_priv(dev); struct xhci_hcor *hcor; int len; +#ifdef CONFIG_DM_GPIO + struct gpio_desc vbus_gpio; + + gpio_request_by_name(dev, "marvell,vbus-gpio", 0, &vbus_gpio, + GPIOD_IS_OUT); + + if (dm_gpio_is_valid(&vbus_gpio)) { + dm_gpio_set_value(&vbus_gpio, 1); + /* Wait for the GPIO VBUS output set */ + mdelay(500); + } +#else + debug("USB VBUS on GPIO support is missing\n"); +#endif /* CONFIG_DM_GPIO */
ctx->hcd = (struct xhci_hccr *)plat->hcd_base; len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase));
Hi Marek,
(adding Marek as USB custodian to Cc)
On 08.01.2017 15:52, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Add support for "marvell,vbus-gpio" property to mvebu XHCI host adapter driver. This option is valid when CONFIG_DM_GPIO=y
Change-Id: I930b3ebe001e50ae8d5abe1f3c774bcdb1739e64 Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com
Changes for v2:
- Move VBUS GPIO support from board-specific function to mvebu XHCI driver
- Increase delay after VBUS GPIO activation
doc/device-tree-bindings/usb/marvell.xhci-usb.txt | 29 +++++++++++++++++++++++ drivers/usb/host/xhci-mvebu.c | 14 +++++++++++ 2 files changed, 43 insertions(+) create mode 100644 doc/device-tree-bindings/usb/marvell.xhci-usb.txt
diff --git a/doc/device-tree-bindings/usb/marvell.xhci-usb.txt b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt new file mode 100644 index 0000000..b0a53ad --- /dev/null +++ b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt @@ -0,0 +1,29 @@ +Marvell SOC USB controllers
+This controller is integrated in Armada 3700/8K. +It uses the same properties as a generic XHCI host controller
+Required properties :
- compatible: should be one or more of:
- "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs
- "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs
- reg: should contain address and length of the standard XHCI
- register set for the device.
- interrupts: one XHCI interrupt should be described here.
+Optional properties:
- clocks: reference to a clock
- marvell,vbus-gpio : If present, specifies a gpio that needs to be
- activated for the bus to be powered.
+Example:
- cpm_usb3_0: usb3@500000 {
compatible = "marvell,armada-8k-xhci","generic-xhci";reg = <0x500000 0x4000>;interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;clocks = <&cpm_syscon0 1 22>;marvell,vbus-gpio = <&cpm_gpio1 15 GPIO_ACTIVE_HIGH>;status = "disabled";- };
diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c index 46eb937..64801e7 100644 --- a/drivers/usb/host/xhci-mvebu.c +++ b/drivers/usb/host/xhci-mvebu.c @@ -45,6 +45,20 @@ static int xhci_usb_probe(struct udevice *dev) struct mvebu_xhci *ctx = dev_get_priv(dev); struct xhci_hcor *hcor; int len; +#ifdef CONFIG_DM_GPIO
- struct gpio_desc vbus_gpio;
- gpio_request_by_name(dev, "marvell,vbus-gpio", 0, &vbus_gpio,
GPIOD_IS_OUT);- if (dm_gpio_is_valid(&vbus_gpio)) {
dm_gpio_set_value(&vbus_gpio, 1);/* Wait for the GPIO VBUS output set */mdelay(500);- }
+#else
- debug("USB VBUS on GPIO support is missing\n");
+#endif /* CONFIG_DM_GPIO */
ctx->hcd = (struct xhci_hccr *)plat->hcd_base; len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase));
Marek, do you have some comments on this USB related patch? If not, are you okay with me pushing it via the Marvell repository?
Thanks, Stefan
On 01/24/2017 02:53 PM, Stefan Roese wrote:
Hi Marek,
(adding Marek as USB custodian to Cc)
On 08.01.2017 15:52, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Add support for "marvell,vbus-gpio" property to mvebu XHCI host adapter driver. This option is valid when CONFIG_DM_GPIO=y
Change-Id: I930b3ebe001e50ae8d5abe1f3c774bcdb1739e64 Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com
Changes for v2:
- Move VBUS GPIO support from board-specific function to mvebu XHCI
driver
- Increase delay after VBUS GPIO activation
doc/device-tree-bindings/usb/marvell.xhci-usb.txt | 29 +++++++++++++++++++++++ drivers/usb/host/xhci-mvebu.c | 14 +++++++++++ 2 files changed, 43 insertions(+) create mode 100644 doc/device-tree-bindings/usb/marvell.xhci-usb.txt
diff --git a/doc/device-tree-bindings/usb/marvell.xhci-usb.txt b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt new file mode 100644 index 0000000..b0a53ad --- /dev/null +++ b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt @@ -0,0 +1,29 @@ +Marvell SOC USB controllers
+This controller is integrated in Armada 3700/8K. +It uses the same properties as a generic XHCI host controller
+Required properties :
- compatible: should be one or more of:
- "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs
- "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs
- reg: should contain address and length of the standard XHCI
- register set for the device.
- interrupts: one XHCI interrupt should be described here.
+Optional properties:
- clocks: reference to a clock
Reference clock are optional ?
- marvell,vbus-gpio : If present, specifies a gpio that needs to be
- activated for the bus to be powered.
Shouldn't this be a regulator instead ?
+Example:
- cpm_usb3_0: usb3@500000 {
compatible = "marvell,armada-8k-xhci","generic-xhci";reg = <0x500000 0x4000>;interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;clocks = <&cpm_syscon0 1 22>;marvell,vbus-gpio = <&cpm_gpio1 15 GPIO_ACTIVE_HIGH>;status = "disabled";- };
diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c index 46eb937..64801e7 100644 --- a/drivers/usb/host/xhci-mvebu.c +++ b/drivers/usb/host/xhci-mvebu.c @@ -45,6 +45,20 @@ static int xhci_usb_probe(struct udevice *dev) struct mvebu_xhci *ctx = dev_get_priv(dev); struct xhci_hcor *hcor; int len; +#ifdef CONFIG_DM_GPIO
- struct gpio_desc vbus_gpio;
- gpio_request_by_name(dev, "marvell,vbus-gpio", 0, &vbus_gpio,
GPIOD_IS_OUT);- if (dm_gpio_is_valid(&vbus_gpio)) {
dm_gpio_set_value(&vbus_gpio, 1);/* Wait for the GPIO VBUS output set */mdelay(500);
I think if the GPIO was instead a regulator-fixed, the regulator could handle the delay with something like "ramp-up" delay. But I don't think we do support the ramp-up delay yet ... maybe this can be easily added?
- }
+#else
- debug("USB VBUS on GPIO support is missing\n");
+#endif /* CONFIG_DM_GPIO */
ctx->hcd = (struct xhci_hccr *)plat->hcd_base; len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase));Marek, do you have some comments on this USB related patch? If not, are you okay with me pushing it via the Marvell repository?
I have one .
Hi, Marek, ________________________________________ From: Marek Vasut marex@denx.de Sent: Tuesday, January 24, 2017 16:11 To: Stefan Roese; Kostya Porotchkin; u-boot@lists.denx.de Cc: Haim Boot; Hanna Hawa; Omri Itach; Nadav Haklai; Neta Zur Hershkovits; Igal Liberman Subject: [EXT] Re: [U-Boot] [PATCH v2 4/7] mvebu: usb: xhci: Add support for VBUS controlled by GPIO
---------------------------------------------------------------------- On 01/24/2017 02:53 PM, Stefan Roese wrote:
Hi Marek,
(adding Marek as USB custodian to Cc)
On 08.01.2017 15:52, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Add support for "marvell,vbus-gpio" property to mvebu XHCI host adapter driver. This option is valid when CONFIG_DM_GPIO=y
Change-Id: I930b3ebe001e50ae8d5abe1f3c774bcdb1739e64 Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com
Changes for v2:
- Move VBUS GPIO support from board-specific function to mvebu XHCI
driver
- Increase delay after VBUS GPIO activation
doc/device-tree-bindings/usb/marvell.xhci-usb.txt | 29 +++++++++++++++++++++++ drivers/usb/host/xhci-mvebu.c | 14 +++++++++++ 2 files changed, 43 insertions(+) create mode 100644 doc/device-tree-bindings/usb/marvell.xhci-usb.txt
diff --git a/doc/device-tree-bindings/usb/marvell.xhci-usb.txt b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt new file mode 100644 index 0000000..b0a53ad --- /dev/null +++ b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt @@ -0,0 +1,29 @@ +Marvell SOC USB controllers
+This controller is integrated in Armada 3700/8K. +It uses the same properties as a generic XHCI host controller
+Required properties :
- compatible: should be one or more of:
- "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs
- "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs
- reg: should contain address and length of the standard XHCI
- register set for the device.
- interrupts: one XHCI interrupt should be described here.
+Optional properties:
- clocks: reference to a clock
Reference clock are optional ?
Actually the basis for this file was taken from kernel documentation and clocks are listed as "optional" here.
- marvell,vbus-gpio : If present, specifies a gpio that needs to be
- activated for the bus to be powered.
Shouldn't this be a regulator instead ?
If it is required, I can implement the regulator method. However as you mentioned the regulator core has to be extended for the ramp-up time support. This is kind of a shortcut, that enables immediate community board support. The same GPIO VBUS implementation exists in Marvell SDK.
+Example:
- cpm_usb3_0: usb3@500000 {
compatible = "marvell,armada-8k-xhci","generic-xhci";reg = <0x500000 0x4000>;interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;clocks = <&cpm_syscon0 1 22>;marvell,vbus-gpio = <&cpm_gpio1 15 GPIO_ACTIVE_HIGH>;status = "disabled";- };
diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c index 46eb937..64801e7 100644 --- a/drivers/usb/host/xhci-mvebu.c +++ b/drivers/usb/host/xhci-mvebu.c @@ -45,6 +45,20 @@ static int xhci_usb_probe(struct udevice *dev) struct mvebu_xhci *ctx = dev_get_priv(dev); struct xhci_hcor *hcor; int len; +#ifdef CONFIG_DM_GPIO
- struct gpio_desc vbus_gpio;
- gpio_request_by_name(dev, "marvell,vbus-gpio", 0, &vbus_gpio,
GPIOD_IS_OUT);- if (dm_gpio_is_valid(&vbus_gpio)) {
dm_gpio_set_value(&vbus_gpio, 1);/* Wait for the GPIO VBUS output set */mdelay(500);
I think if the GPIO was instead a regulator-fixed, the regulator could handle the delay with something like "ramp-up" delay. But I don't think we do support the ramp-up delay yet ... maybe this can be easily added?
So I assume you suggest to drop this one and implement the VBUS through regulator GPIO?
- }
+#else
- debug("USB VBUS on GPIO support is missing\n");
+#endif /* CONFIG_DM_GPIO */
ctx->hcd = (struct xhci_hccr *)plat->hcd_base; len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase));Marek, do you have some comments on this USB related patch? If not, are you okay with me pushing it via the Marvell repository?
I have one .
Thank you for your review!
Best Regards Konstantin Porotchkin
-- Best regards, Marek Vasut
On 01/24/2017 03:57 PM, Kostya Porotchkin wrote:
Hi, Marek,
Hi!
[...]
+Required properties :
- compatible: should be one or more of:
- "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs
- "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs
- reg: should contain address and length of the standard XHCI
- register set for the device.
- interrupts: one XHCI interrupt should be described here.
+Optional properties:
- clocks: reference to a clock
Reference clock are optional ?
Actually the basis for this file was taken from kernel documentation and clocks are listed as "optional" here.
Oh ok, interesting.
- marvell,vbus-gpio : If present, specifies a gpio that needs to be
- activated for the bus to be powered.
Shouldn't this be a regulator instead ?
If it is required, I can implement the regulator method. However as you mentioned the regulator core has to be extended for the ramp-up time support. This is kind of a shortcut, that enables immediate community board support. The same GPIO VBUS implementation exists in Marvell SDK.
Switching to regulator should be pretty painless and much better than new ad-hoc property, yes.
[...]
+#ifdef CONFIG_DM_GPIO
- struct gpio_desc vbus_gpio;
- gpio_request_by_name(dev, "marvell,vbus-gpio", 0, &vbus_gpio,
GPIOD_IS_OUT);- if (dm_gpio_is_valid(&vbus_gpio)) {
dm_gpio_set_value(&vbus_gpio, 1);/* Wait for the GPIO VBUS output set */mdelay(500);I think if the GPIO was instead a regulator-fixed, the regulator could handle the delay with something like "ramp-up" delay. But I don't think we do support the ramp-up delay yet ... maybe this can be easily added?
So I assume you suggest to drop this one and implement the VBUS through regulator GPIO?
Yeah, that'd be neat and if you retain the mdelay() here, it should also be very straightforward without the need for additional patches.
If you want to extend the regulator-fixed driver to support the ramp-up delay the same way Linux does, that'd be awesome and you'd be able to drop even the mdelay() here, which'd be much more systematic solution.
- }
+#else
- debug("USB VBUS on GPIO support is missing\n");
+#endif /* CONFIG_DM_GPIO */
ctx->hcd = (struct xhci_hccr *)plat->hcd_base; len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase));Marek, do you have some comments on this USB related patch? If not, are you okay with me pushing it via the Marvell repository?
I have one .
Thank you for your review!
Best Regards Konstantin Porotchkin
-- Best regards, Marek Vasut
Hi, Marek,
I added a regulator to the board DTS and connected it to the USB port:
/{ model = "MACCHIATOBin-8040"; compatible = "marvell,armada8040-mcbin", "marvell,armada8040"; ... ... regulators { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>;
reg_usb3h0_vbus: usb3-vbus0 { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&cpm_xhci_vbus_pins>; regulator-name = "reg-usb3h0-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; startup-delay-us = <500000>; enable-active-high; regulator-always-on; gpio = <&cpm_gpio1 15 GPIO_ACTIVE_HIGH>; /* GPIO[47] */ }; }; };
&cps_usb3_0 { vcc-supply = <®_usb3h0_vbus>; status = "okay"; };
However the regulator is not activated when I issue "usb reset" command. I can either call to " uclass_first_device(UCLASS_REGULATOR, &dev)" during arch early init stage, or select the regulator with "regulator dev" command.
Only then the VBUS GPIO enables the USB power.
Is it the expected behavior or I am missing something in my configuration?
Thank you for your help Kosta
-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Kostya Porotchkin Sent: Tuesday, January 24, 2017 16:58 To: Marek Vasut; Stefan Roese; u-boot@lists.denx.de Cc: Haim Boot; Hanna Hawa; Omri Itach; Nadav Haklai; Neta Zur Hershkovits; Igal Liberman Subject: Re: [U-Boot] [EXT] Re: [PATCH v2 4/7] mvebu: usb: xhci: Add support for VBUS controlled by GPIO
Hi, Marek, ________________________________________ From: Marek Vasut marex@denx.de Sent: Tuesday, January 24, 2017 16:11 To: Stefan Roese; Kostya Porotchkin; u-boot@lists.denx.de Cc: Haim Boot; Hanna Hawa; Omri Itach; Nadav Haklai; Neta Zur Hershkovits; Igal Liberman Subject: [EXT] Re: [U-Boot] [PATCH v2 4/7] mvebu: usb: xhci: Add support for VBUS controlled by GPIO
On 01/24/2017 02:53 PM, Stefan Roese wrote:
Hi Marek,
(adding Marek as USB custodian to Cc)
On 08.01.2017 15:52, kostap@marvell.com wrote:
From: Konstantin Porotchkin kostap@marvell.com
Add support for "marvell,vbus-gpio" property to mvebu XHCI host adapter driver. This option is valid when CONFIG_DM_GPIO=y
Change-Id: I930b3ebe001e50ae8d5abe1f3c774bcdb1739e64 Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com
Changes for v2:
- Move VBUS GPIO support from board-specific function to mvebu XHCI
driver
- Increase delay after VBUS GPIO activation
doc/device-tree-bindings/usb/marvell.xhci-usb.txt | 29 +++++++++++++++++++++++ drivers/usb/host/xhci-mvebu.c | 14 +++++++++++ 2 files changed, 43 insertions(+) create mode 100644 doc/device-tree-bindings/usb/marvell.xhci-usb.txt
diff --git a/doc/device-tree-bindings/usb/marvell.xhci-usb.txt b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt new file mode 100644 index 0000000..b0a53ad --- /dev/null +++ b/doc/device-tree-bindings/usb/marvell.xhci-usb.txt @@ -0,0 +1,29 @@ +Marvell SOC USB controllers
+This controller is integrated in Armada 3700/8K. +It uses the same properties as a generic XHCI host controller
+Required properties :
- compatible: should be one or more of:
- "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs
- "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs
- reg: should contain address and length of the standard XHCI
- register set for the device.
- interrupts: one XHCI interrupt should be described here.
+Optional properties:
- clocks: reference to a clock
Reference clock are optional ?
Actually the basis for this file was taken from kernel documentation and clocks are listed as "optional" here.
- marvell,vbus-gpio : If present, specifies a gpio that needs to be
- activated for the bus to be powered.
Shouldn't this be a regulator instead ?
If it is required, I can implement the regulator method. However as you mentioned the regulator core has to be extended for the ramp-up time support. This is kind of a shortcut, that enables immediate community board support. The same GPIO VBUS implementation exists in Marvell SDK.
+Example:
- cpm_usb3_0: usb3@500000 {
compatible = "marvell,armada-8k-xhci","generic-xhci";reg = <0x500000 0x4000>;interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;clocks = <&cpm_syscon0 1 22>;marvell,vbus-gpio = <&cpm_gpio1 15 GPIO_ACTIVE_HIGH>;status = "disabled";- };
diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c index 46eb937..64801e7 100644 --- a/drivers/usb/host/xhci-mvebu.c +++ b/drivers/usb/host/xhci-mvebu.c @@ -45,6 +45,20 @@ static int xhci_usb_probe(struct udevice *dev) struct mvebu_xhci *ctx = dev_get_priv(dev); struct xhci_hcor *hcor; int len; +#ifdef CONFIG_DM_GPIO
- struct gpio_desc vbus_gpio;
- gpio_request_by_name(dev, "marvell,vbus-gpio", 0, &vbus_gpio,
GPIOD_IS_OUT);- if (dm_gpio_is_valid(&vbus_gpio)) {
dm_gpio_set_value(&vbus_gpio, 1);/* Wait for the GPIO VBUS output set */mdelay(500);I think if the GPIO was instead a regulator-fixed, the regulator could handle the delay with something like "ramp-up" delay. But I don't think we do support the ramp-up delay yet ... maybe this can be easily added?
So I assume you suggest to drop this one and implement the VBUS through regulator GPIO?
- }
+#else
- debug("USB VBUS on GPIO support is missing\n"); #endif /*
+CONFIG_DM_GPIO */
ctx->hcd = (struct xhci_hccr *)plat->hcd_base; len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase));Marek, do you have some comments on this USB related patch? If not, are you okay with me pushing it via the Marvell repository?
I have one .
Thank you for your review!
Best Regards Konstantin Porotchkin
-- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
On 02/06/2017 02:26 PM, Kostya Porotchkin wrote:
Hi, Marek,
Hi,
(please stop top-posting)
I added a regulator to the board DTS and connected it to the USB port:
/{ model = "MACCHIATOBin-8040"; compatible = "marvell,armada8040-mcbin", "marvell,armada8040"; ... ... regulators { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>;
reg_usb3h0_vbus: usb3-vbus0 { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&cpm_xhci_vbus_pins>; regulator-name = "reg-usb3h0-vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; startup-delay-us = <500000>; enable-active-high; regulator-always-on; gpio = <&cpm_gpio1 15 GPIO_ACTIVE_HIGH>; /* GPIO[47] */ };}; };
&cps_usb3_0 { vcc-supply = <®_usb3h0_vbus>; status = "okay"; };
However the regulator is not activated when I issue "usb reset" command. I can either call to " uclass_first_device(UCLASS_REGULATOR, &dev)" during arch early init stage, or select the regulator with "regulator dev" command.
Only then the VBUS GPIO enables the USB power.
Is it the expected behavior or I am missing something in my configuration?
You should request and enable the regulator in your driver , ie using regulator_set_enable()
From: Konstantin Porotchkin kostap@marvell.com
Add support for "marvell,reset-gpio" property to mvebu DW PCIe driver. This option is valid when CONFIG_DM_GPIO=y
Change-Id: Ic17c500449050c2fbb700731f1a9ca8b83298986 Signed-off-by: Konstantin Porotchkin kostap@marvell.com Signed-off-by: Rabeeh Khoury rabeeh@solid-run.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com --- Changes for v2: - Move PCIe reset GPIO support from board-specific function to mvebu PCIe driver - Increase delay after releasing the PCIe reset GPIO
doc/device-tree-bindings/pci/armada8k-pcie.txt | 49 ++++++++++++++++++++++++++ drivers/pci/pcie_dw_mvebu.c | 20 +++++++++++ 2 files changed, 69 insertions(+) create mode 100644 doc/device-tree-bindings/pci/armada8k-pcie.txt
diff --git a/doc/device-tree-bindings/pci/armada8k-pcie.txt b/doc/device-tree-bindings/pci/armada8k-pcie.txt new file mode 100644 index 0000000..7230f10 --- /dev/null +++ b/doc/device-tree-bindings/pci/armada8k-pcie.txt @@ -0,0 +1,49 @@ +Armada-8K PCIe DT details: +========================== + +Armada-8k uses synopsis designware PCIe controller. + +Required properties: +- compatible : should be "marvell,armada8k-pcie", "snps,dw-pcie". +- reg: base addresses and lengths of the pcie control and global control registers. + "ctrl" registers points to the global control registers, while the "config" space + points to the pcie configuration registers as mentioned in dw-pcie dt bindings in the link below. +- interrupt-map-mask and interrupt-map, standard PCI properties to + define the mapping of the PCIe interface to interrupt numbers. +- All other definitions as per generic PCI bindings +See Linux kernel documentation: +"Documentation/devicetree/bindings/pci/designware-pcie.txt" + +Optional properties: +PHY support is still not supported for armada-8k, once it will, the following parameters can be used: +- phys : phandle to phy node associated with pcie controller. +- phy-names : must be "pcie-phy" +- marvell,reset-gpio : specifies a gpio that needs to be activated for plug-in + card reset signal release. +Example: + +cpm_pcie0: pcie@f2600000 { + compatible = "marvell,armada8k-pcie", "snps,dw-pcie"; + reg = <0 0xf2600000 0 0x10000>, + <0 0xf6f00000 0 0x80000>; + reg-names = "ctrl", "config"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + dma-coherent; + + bus-range = <0 0xff>; + ranges = + /* downstream I/O */ + <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 + /* non-prefetchable memory */ + 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + num-lanes = <1>; + clocks = <&cpm_syscon0 1 13>; + marvell,reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c index 17fa024..d4776a9 100644 --- a/drivers/pci/pcie_dw_mvebu.c +++ b/drivers/pci/pcie_dw_mvebu.c @@ -15,6 +15,7 @@ #include <dm.h> #include <pci.h> #include <asm/io.h> +#include <asm-generic/gpio.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -461,6 +462,25 @@ static int pcie_dw_mvebu_probe(struct udevice *dev) struct pcie_dw_mvebu *pcie = dev_get_priv(dev); struct udevice *ctlr = pci_get_controller(dev); struct pci_controller *hose = dev_get_uclass_priv(ctlr); +#ifdef CONFIG_DM_GPIO + struct gpio_desc reset_gpio; + + gpio_request_by_name(dev, "marvell,reset-gpio", 0, &reset_gpio, + GPIOD_IS_OUT); + /* + * Issue reset to add-in card trough the dedicated GPIO. + * Some boards are connecting the card reset pin to common system + * reset wire and others are using separate GPIO port. + * In the last case we have to release a reset of the addon card + * using this GPIO. + */ + if (dm_gpio_is_valid(&reset_gpio)) { + dm_gpio_set_value(&reset_gpio, 1); + mdelay(200); + } +#else + debug("PCIE Reset on GPIO support is missing\n"); +#endif /* CONFIG_DM_GPIO */
pcie->first_busno = dev->seq;
From: Rabeeh Khoury rabeeh@solid-run.com
Added A8040 dts file for community board MACCHIATIBin. The patch includes the following features: AP - eMMC, Serial console (connected to onboard FTDI usb to serial) CP0 - PCIe x4, SATA, I2C and 10G KR (connected to Marvell 3310 10G copper / SFP+ phy) CP1 - Boot SPI, USB3 host, 2xSATA, 10G KR (connected to Marvell 3310 10G copper / SFP+ phy), SGMII connected to onboard 1512 1Gbps copper phy, and additional SGMII connected to SFP (default 1Gbps can be configured to 2.5Gbps).
Network interface naming - egiga0 - CP0 KR egiga1 - CP1 KR egiga2 - CP1 RJ45 1Gbps connector (recommended for TFTP boot) egiga3 - CP1 SFP default 1Gbps and can be modified to 2.5Gbps
Change-Id: Icb844eff9a8f07cd76ca8f86ffb01fe297bde836 Signed-off-by: Konstantin Porotchkin kostap@marvell.com Signed-off-by: Rabeeh Khoury rabeeh@solid-run.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com --- Changes for v2: - None, copy
arch/arm/dts/Makefile | 1 + arch/arm/dts/armada-8040-mcbin.dts | 253 +++++++++++++++++++++++++++++++++++++ 2 files changed, 254 insertions(+) create mode 100644 arch/arm/dts/armada-8040-mcbin.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ff78385..10e0536 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -76,6 +76,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-385-amc.dtb \ armada-7040-db.dtb \ armada-8040-db.dtb \ + armada-8040-mcbin.dtb \ armada-xp-gp.dtb \ armada-xp-maxbcm.dtb \ armada-xp-synology-ds414.dtb \ diff --git a/arch/arm/dts/armada-8040-mcbin.dts b/arch/arm/dts/armada-8040-mcbin.dts new file mode 100644 index 0000000..682e6f7 --- /dev/null +++ b/arch/arm/dts/armada-8040-mcbin.dts @@ -0,0 +1,253 @@ +/* + * Copyright (C) 2016 Marvell International Ltd. + * + * SPDX-License-Identifier: GPL-2.0 + * https://spdx.org/licenses + */ + +#include "armada-8040.dtsi" /* include SoC device tree */ + +/ { + model = "MACCHIATOBin-8040"; + compatible = "marvell,armada8040-mcbin", + "marvell,armada8040"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + i2c0 = &cpm_i2c0; + i2c1 = &cpm_i2c1; + spi0 = &cps_spi1; + gpio0 = &ap_gpio0; + gpio1 = &cpm_gpio0; + gpio2 = &cpm_gpio1; + }; + + memory@00000000 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; +}; + +/* Accessible over the mini-USB CON9 connector on the main board */ +&uart0 { + status = "okay"; +}; + +&ap_pinctl { + /* + * MPP Bus: + * eMMC [0-10] + * UART0 [11,19] + */ + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 1 1 1 1 1 1 1 1 1 1 + 1 3 0 0 0 0 0 0 0 3 >; +}; + +/* on-board eMMC */ +&sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&ap_emmc_pins>; + bus-width= <8>; + status = "okay"; +}; + +&cpm_pinctl { + /* + * MPP Bus: + * [0-31] = 0xff: Keep default CP0_shared_pins: + * [11] CLKOUT_MPP_11 (out) + * [23] LINK_RD_IN_CP2CP (in) + * [25] CLKOUT_MPP_25 (out) + * [29] AVS_FB_IN_CP2CP (in) + * [32,34] SMI + * [33] MSS power down + * [35-38] CP0 I2C1 and I2C0 + * [39] MSS CKE Enable + * [40,41] CP0 UART1 TX/RX + * [42,43] XSMI (controls two 10G phys) + * [47] USB VBUS EN + * [48] FAN PWM + * [49] 10G port 1 interrupt + * [50] 10G port 0 interrupt + * [51] 2.5G SFP TX fault + * [52] PCIe reset out + * [53] 2.5G SFP mode + * [54] 2.5G SFP LOS + * [55] Micro SD card detect + * [56-61] Micro SD + * [62] CP1 KR SFP FAULT + */ + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0 7 0xa 7 2 2 2 2 0xa + 7 7 8 8 0 0 0 0 0 0 + 0 0 9 0 0 0 0xe 0xe 0xe 0xe + 0xe 0xe 0 >; +}; + +/* PCIe x4 */ +&cpm_pcie0 { + num-lanes = <4>; + marvell,reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_HIGH>; /* GPIO[52] */ + status = "okay"; +}; + +&cpm_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_i2c0_pins>; + status = "okay"; + clock-frequency = <100000>; +}; + +&cpm_i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&cpm_i2c1_pins>; + status = "okay"; + clock-frequency = <100000>; +}; + +&cpm_sata0 { + status = "okay"; +}; + +&cpm_comphy { + /* + * CP0 Serdes Configuration: + * Lane 0: PCIe0 (x4) + * Lane 1: PCIe0 (x4) + * Lane 2: PCIe0 (x4) + * Lane 3: PCIe0 (x4) + * Lane 4: KR (10G) + * Lane 5: SATA1 + */ + phy0 { + phy-type = <PHY_TYPE_PEX0>; + }; + phy1 { + phy-type = <PHY_TYPE_PEX0>; + }; + phy2 { + phy-type = <PHY_TYPE_PEX0>; + }; + phy3 { + phy-type = <PHY_TYPE_PEX0>; + }; + phy4 { + phy-type = <PHY_TYPE_KR>; + }; + phy5 { + phy-type = <PHY_TYPE_SATA1>; + }; +}; + +&cps_sata0 { + status = "okay"; +}; + +&cps_usb3_0 { + status = "okay"; + marvell,vbus-gpio = <&cpm_gpio1 15 GPIO_ACTIVE_HIGH>; /* GPIO[47] */ +}; + +&cps_utmi0 { + status = "okay"; +}; + +&cps_pinctl { + /* + * MPP Bus: + * [0-5] TDM + * [6,7] CP1_UART 0 + * [8] CP1 10G SFP LOS + * [9] CP1 10G PHY RESET + * [10] CP1 10G SFP TX Disable + * [11] CP1 10G SFP Mode + * [12] SPI1 CS1n + * [13] SPI1 MISO (TDM and SPI ROM shared) + * [14] SPI1 CS0n + * [15] SPI1 MOSI (TDM and SPI ROM shared) + * [16] SPI1 CLK (TDM and SPI ROM shared) + * [24] CP1 2.5G SFP TX Disable + * [26] CP0 10G SFP TX Fault + * [27] CP0 10G SFP Mode + * [28] CP0 10G SFP LOS + * [29] CP0 10G SFP TX Disable + * [30] USB Over current indication + * [31] 10G Port 0 phy reset + * [32-62] = 0xff: Keep default CP1_shared_pins: + */ + /* 0 1 2 3 4 5 6 7 8 9 */ + pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x8 0x8 0x0 0x0 + 0x0 0x0 0x3 0x3 0x3 0x3 0x3 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0x0 0xff 0x0 0x0 0x0 0x0 + 0x0 0x0 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff + 0xff 0xff 0xff>; +}; + +&cps_spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&cps_spi1_pins>; + status = "okay"; + + spi-flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "U-Boot"; + reg = <0 0x200000>; + }; + partition@400000 { + label = "Filesystem"; + reg = <0x200000 0xce0000>; + }; + }; + }; +}; + +&cps_comphy { + /* + * CP1 Serdes Configuration: + * Lane 0: SGMII2 + * Lane 1: SATA 0 + * Lane 2: USB HOST 0 + * Lane 3: SATA1 + * Lane 4: KR (10G) + * Lane 5: SGMII3 + */ + phy0 { + phy-type = <PHY_TYPE_SGMII2>; + phy-speed = <PHY_SPEED_1_25G>; + }; + phy1 { + phy-type = <PHY_TYPE_SATA0>; + }; + phy2 { + phy-type = <PHY_TYPE_USB3_HOST0>; + }; + phy3 { + phy-type = <PHY_TYPE_SATA1>; + }; + phy4 { + phy-type = <PHY_TYPE_KR>; + }; + phy5 { + phy-type = <PHY_TYPE_SGMII3>; + }; +};
From: Konstantin Porotchkin kostap@marvell.com
Add default configuration for MACHHIATOBin community board based on Aramda-8040 SoC.
Change-Id: I60efcca5b31060340ad0a948561f082646f6556c Signed-off-by: Konstantin Porotchkin kostap@marvell.com Cc: Stefan Roese sr@denx.de Cc: Nadav Haklai nadavh@marvell.com Cc: Neta Zur Hershkovits neta@marvell.com Cc: Omri Itach omrii@marvell.com Cc: Igal Liberman igall@marvell.com Cc: Haim Boot hayim@marvell.com Cc: Hanna Hawa hannah@marvell.com --- Changes for v2: - None, copy
configs/mvebu_mcbin-88f8040_defconfig | 65 +++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 configs/mvebu_mcbin-88f8040_defconfig
diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig new file mode 100644 index 0000000..ed6e9db --- /dev/null +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -0,0 +1,65 @@ +CONFIG_ARM=y +CONFIG_ARCH_MVEBU=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_TARGET_MVEBU_ARMADA_8K=y +CONFIG_DEFAULT_DEVICE_TREE="armada-8040-mcbin" +CONFIG_SMBIOS_PRODUCT_NAME="" +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_I2C=y +CONFIG_CMD_USB=y +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_MMC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_CMD_MVEBU_BUBT=y +CONFIG_BLOCK_CACHE=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_DM_GPIO=y +CONFIG_MVEBU_GPIO=y +CONFIG_MISC=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_PCIE_DW_MVEBU=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +# CONFIG_SPL_SERIAL_PRESENT is not set +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0xf0512000 +CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_DM_MMC=y +CONFIG_XENON_SDHCI=y +CONFIG_SMBIOS_MANUFACTURER="" +CONFIG_PINCTRL=y +CONFIG_HUSH_PARSER=y
participants (4)
-
kostap＠marvell.com -
Kostya Porotchkin
-
Marek Vasut -
Stefan Roese