Hello Jagan, hello Maxime,

when I try to enable additional options in .config for the Pine A64 LTS I end up in an endless loop returning into the ARM trusted firmware (ATF) and then SPL.

Do you have an idea where to search? Do we run into an image size problem?

Here is an example:

make pine64-lts_defconfig

CONFIG_LOG=y CONFIG_LOG_MAX_LEVEL=6 CONFIG_LOG_CONSOLE=y

make

U-Boot SPL 2020.04-rc3-dirty (Feb 26 2020 - 22:23:31 +0000) DRAM:MBUS port 0 cfg0 00a0000d cfg1 00500064 MBUS port 1 cfg0 06000008 cfg1 01000578 MBUS port 2 cfg0 0200000d cfg1 00600100 MBUS port 3 cfg0 01000009 cfg1 00640050 MBUS port 4 cfg0 07000009 cfg1 01000640 MBUS port 5 cfg0 01000009 cfg1 00000080 MBUS port 6 cfg0 01000009 cfg1 00400080 MBUS port 7 cfg0 0100000d cfg1 00400080 MBUS port 8 cfg0 0100000d cfg1 00400080 MBUS port 9 cfg0 04000009 cfg1 00400100 MBUS port 10 cfg0 20000209 cfg1 08001800 MBUS port 11 cfg0 05000009 cfg1 00400090 2048 MiB SPL malloc() before relocation used 0x0 bytes (0 KB)

...

SPL: board_init_r()

Trying to boot from MMC1 init mmc 0 resource init mmc 0 clock and io mmc 0 set mod-clk req 24000000 parent 24000000 n 1 m 1 rate 24000000 init mmc 2 resource init mmc 2 clock and io mmc 2 set mod-clk req 24000000 parent 24000000 n 1 m 1 rate 24000000 clock is disabled (0Hz) set ios: bus_width: 0, clock: 0 set ios: bus_width: 1, clock: 0 clock is enabled (400000Hz) set ios: bus_width: 1, clock: 400000 mmc 0 set mod-clk req 400000 parent 24000000 n 4 m 15 rate 400000 mmc 0, cmd 0(0x80008000), arg 0x00000000 mmc resp 0x00000000 mmc 0, cmd 8(0x80000148), arg 0x000001aa mmc resp 0x000001aa mmc 0, cmd 55(0x80000177), arg 0x00000000 mmc resp 0x00000120 mmc 0, cmd 41(0x80000069), arg 0x40300000 mmc resp 0x40ff8000 mmc 0, cmd 55(0x80000177), arg 0x00000000 mmc resp 0x00000120 mmc 0, cmd 41(0x80000069), arg 0x40300000 mmc resp 0xc0ff8000 mmc 0, cmd 2(0x800001c2), arg 0x00000000 mmc resp 0x0600db0b 0x80009d5a 0x55333247 0x03534453 mmc 0, cmd 3(0x80000143), arg 0x00000000 mmc resp 0xaaaa0520 mmc 0, cmd 9(0x800001c9), arg 0xaaaa0000 mmc resp 0x0a4040c3 0xedc87f80 0x5b590000 0x400e0032 mmc 0, cmd 7(0x80000147), arg 0xaaaa0000 mmc resp 0x00000700 mmc 0, cmd 55(0x80000177), arg 0xaaaa0000 mmc resp 0x00000920 mmc 0, cmd 51(0x80002373), arg 0x00000000 trans data 8 bytes cacl timeout 78 msec mmc resp 0x00000920 mmc 0, cmd 6(0x80002346), arg 0x00fffff1 trans data 64 bytes cacl timeout 78 msec mmc resp 0x00000900 mmc 0, cmd 55(0x80000177), arg 0xaaaa0000 mmc resp 0x00000920 mmc 0, cmd 6(0x80000146), arg 0x00000002 mmc resp 0x00000920 set ios: bus_width: 4, clock: 400000 mmc 0 set mod-clk req 400000 parent 24000000 n 4 m 15 rate 400000 mmc 0, cmd 6(0x80002346), arg 0x80fffff1 trans data 64 bytes cacl timeout 78 msec mmc resp 0x00000900 clock is enabled (50000000Hz) set ios: bus_width: 4, clock: 50000000 mmc 0 set mod-clk req 50000000 parent 600000000 n 1 m 12 rate 50000000 spl: mmc boot mode: raw mmc 0, cmd 16(0x80000150), arg 0x00000200 mmc resp 0x00000900 mmc 0, cmd 17(0x80002351), arg 0x00000050 trans data 512 bytes cacl timeout 78 msec mmc resp 0x00000900 hdr read sector 50, count=1 Found FIT mmc 0, cmd 16(0x80000150), arg 0x00000200 mmc resp 0x00000900 mmc 0, cmd 18(0x80003352), arg 0x00000050 trans data 1024 bytes cacl timeout 78 msec mmc resp 0x00000900 mmc cmd 12 check rsp busy fit read sector 50, sectors=2, dst=49fffa40, count=2, size=0x394 Selecting config 'sun50i-a64-pine64-lts'firmware: 'uboot' mmc 0, cmd 16(0x80000150), arg 0x00000200 mmc resp 0x00000900 mmc 0, cmd 18(0x80003352), arg 0x00000051 trans data 635904 bytes cacl timeout 78 msec mmc resp 0x00000900 mmc cmd 12 check rsp busy External data: dst=4a000000, offset=394, size=9b218 Selecting config 'sun50i-a64-pine64-lts'fdt: 'fdt_1' Can't get 'load' property from FIT 0x49fffa40, node: offset 436, name fdt_1 (FDT_ERR_NOTFOUND) mmc 0, cmd 16(0x80000150), arg 0x00000200 mmc resp 0x00000900 mmc 0, cmd 18(0x80003352), arg 0x00000583 trans data 19968 bytes cacl timeout 78 msec mmc resp 0x00000900 mmc cmd 12 check rsp busy External data: dst=4a09b240, offset=a6734, size=4b6d Selecting config 'sun50i-a64-pine64-lts'loadables: 'atf' mmc 0, cmd 16(0x80000150), arg 0x00000200 mmc resp 0x00000900 mmc 0, cmd 18(0x80003352), arg 0x0000052a trans data 46080 bytes cacl timeout 78 msec mmc resp 0x00000900 mmc cmd 12 check rsp busy External data: dst=44000, offset=9b5ac, size=b185 Selecting config 'sun50i-a64-pine64-lts'fdt: 'fdt_1' Can't get 'load' property from FIT 0x49fffa40, node: offset 436, name fdt_1 (FDT_ERR_NOTFOUND) mmc 0, cmd 16(0x80000150), arg 0x00000200 mmc resp 0x00000900 mmc 0, cmd 18(0x80003352), arg 0x00000583 trans data 19968 bytes cacl timeout 78 msec mmc resp 0x00000900 mmc cmd 12 check rsp busy External data: dst=4f1c0, offset=a6734, size=4b6d Selecting config 'sun50i-a64-pine64-lts'no string for index 1 Jumping to U-Boot SPL malloc() used 0x330 bytes (0 KB) loaded - jumping to U-Boot... image entry point: 0x44000 NOTICE: BL31: v2.2(debug):v2.2-784-g896d684de NOTICE: BL31: Built : 20:11:27, Feb 26 2020 NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689) NOTICE: BL31: Found U-Boot DTB at 0x409b218, model: Pine64 LTS INFO: ARM GICv2 driver initialized INFO: Configuring SPC Controller INFO: PMIC: Probing AXP803 on RSB INFO: PMIC: dcdc1 voltage: 3.300V INFO: PMIC: dcdc5 voltage: 1.200V INFO: PMIC: dcdc6 voltage: 1.100V INFO: PMIC: dldo1 voltage: 3.300V INFO: PMIC: Enabling DC SW INFO: BL31: Platform setup done INFO: BL31: Initializing runtime services INFO: BL31: cortex_a53: CPU workaround for 843419 was applied INFO: BL31: cortex_a53: CPU workaround for 855873 was applied INFO: BL31: Preparing for EL3 exit to normal world INFO: Entry point address = 0x4a000000 INFO: SPSR = 0x3c9

U-Boot SPL 2020.04-rc3-dirty (Feb 26 2020 - 22:23:31 +0000) DRAM:MBUS port 0 cfg0 00a0000d cfg1 00500064

Best regards

Heinrich