[U-Boot-Users] need help for LAN91C111 driver
Hi,
I've found unexpected code inside of smc_phy_configure() in file drivers/smc91111.c:
/* Enable PHY Interrupts (for register 18) */ /* Interrupts listed here are disabled */ smc_write_phy_register (PHY_INT_REG, 0xffff);
PHY_INT_REG is an read only register (all bits). So I don't understand the write access -- Why? Can anybody explain this step?
I think the corregt register have to be PHY_MASK_REG (register 19), which correspond to PHY_INT_REG (register 18) as interrupt mask.
Thanks, and best regards
On Tue, Oct 28, 2003 at 02:03:42PM +0100, Stephan Linz wrote:
PHY_INT_REG is an read only register (all bits). So I don't understand the write access -- Why? Can anybody explain this step?
I think the corregt register have to be PHY_MASK_REG (register 19), which correspond to PHY_INT_REG (register 18) as interrupt mask.
I assume you are right - at least that is how we have fixed it in our -ptx patch. Unfortunately I didn't find the time to push everything upstream yet :-(
Robert
Am Dienstag, 28. Oktober 2003 14:28 schrieb Robert Schwebel:
On Tue, Oct 28, 2003 at 02:03:42PM +0100, Stephan Linz wrote:
PHY_INT_REG is an read only register (all bits). So I don't understand the write access -- Why? Can anybody explain this step?
I think the corregt register have to be PHY_MASK_REG (register 19), which correspond to PHY_INT_REG (register 18) as interrupt mask.
I assume you are right - at least that is how we have fixed it in our -ptx patch. Unfortunately I didn't find the time to push everything upstream yet :-(
I'll post a patch in near future, because that isn't the only problem I have with this LAN adapter (driver).
Bye,
participants (2)
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Robert Schwebel -
Stephan Linz