There was a bug for calculating ddr_freq_mhz, it should be divided by 1000000 rather than 0x1000000.

Signed-off-by: Shengzhou Liu Shengzhou.Liu@freescale.com --- board/freescale/p1010rdb/spl_minimal.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/board/freescale/p1010rdb/spl_minimal.c b/board/freescale/p1010rdb/spl_minimal.c index 73289f3..d0e712e 100644 --- a/board/freescale/p1010rdb/spl_minimal.c +++ b/board/freescale/p1010rdb/spl_minimal.c @@ -26,7 +26,7 @@ void sdram_init(void)

ddr_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO; ddr_ratio = ddr_ratio >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT; - ddr_freq_mhz = (CONFIG_SYS_CLK_FREQ * ddr_ratio) / 0x1000000; + ddr_freq_mhz = (CONFIG_SYS_CLK_FREQ * ddr_ratio) / 1000000;

/* mask off E bit */ u32 svr = SVR_SOC_VER(mfspr(SPRN_SVR));