[U-Boot] [PATCH v2 0/6] spl: full-featured heap cleanups

Some platforms cannot use simple malloc even in very early stages, e.g. when using FAT before DRAM is available. Such platforms currently often use non-Kconfig defines to initialize full malloc and rely on simple heap before that.
This series makes some adjustments to ensure SPL behaves the same with simple or full malloc: when CONFIG_SPL_SYS_MALLOC_F_LEN is != 0, both heap types can be used (by changing CONFIG_SPL_SYS_MALLOC_SIMPLE), without manually supplying an address range for the full heap.
Changes in v2: - make CONFIG_SPL_CLEAR_BSS_F depend on ARM for now - add CONFIG_SPL_CLEAR_BSS_F implementation for arm64 also
Simon Goldschmidt (6): spl: add Kconfig option to clear bss early spl: arm: implement SPL_CLEAR_BSS_F dlmalloc: fix malloc range at end of ram dlmalloc: be compatible to tiny printf spl: support using full malloc with SYS_MALLOC_F_LEN arm: socfpga: a10: move SPL stack size to Kconfig
arch/arm/lib/crt0.S | 22 ++++++++++++++++++++++ arch/arm/lib/crt0_64.S | 14 ++++++++++++++ common/dlmalloc.c | 6 +++++- common/spl/Kconfig | 12 ++++++++++++ common/spl/spl.c | 5 +++++ configs/socfpga_arria10_defconfig | 1 + include/configs/socfpga_common.h | 14 -------------- 7 files changed, 59 insertions(+), 15 deletions(-)

This introduces a new Kconfig option SPL_CLEAR_BSS_F. If enabled, it clears the bss before calling board_init_f() instead of clearing it before calling board_init_r().
This also ensures that variables placed in BSS can be shared between board_init_f() and board_init_r() in SPL.
Make the new option depend on ARM for now until more implementations follow.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
Changes in v2: - make CONFIG_SPL_CLEAR_BSS_F depend on ARM for now
common/spl/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 206c24076d..6a4270516a 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -156,6 +156,18 @@ config SPL_STACK_R_MALLOC_SIMPLE_LEN to give board_init_r() a larger heap then the initial heap in SRAM which is limited to SYS_MALLOC_F_LEN bytes.
+config SPL_CLEAR_BSS_F + bool "Clear BSS section before calling board_init_f" + depends on ARM + help + The BSS section is initialized to zero. In SPL, this is normally done + before calling board_init_r(). + For platforms using BSS in board_init_f() already, enable this to + clear the BSS section before calling board_init_f() instead of + clearing it before calling board_init_r(). This also ensures that + variables placed in BSS can be shared between board_init_f() and + board_init_r(). + config SPL_SEPARATE_BSS bool "BSS section is in a different memory region from text" help

Hi,
On Sat, 16 Mar 2019 at 04:13, Simon Goldschmidt simon.k.r.goldschmidt@gmail.com wrote:
This introduces a new Kconfig option SPL_CLEAR_BSS_F. If enabled, it clears the bss before calling board_init_f() instead of clearing it before calling board_init_r().
This also ensures that variables placed in BSS can be shared between board_init_f() and board_init_r() in SPL.
Make the new option depend on ARM for now until more implementations follow.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
Changes in v2:
- make CONFIG_SPL_CLEAR_BSS_F depend on ARM for now
common/spl/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+)
The current restriction is that you are not allowed to use BSS before board_init_r().
Can you please add a motivation to change this?
Regards, SImon

Hi Simon,
On Fri, Mar 22, 2019 at 8:53 AM Simon Glass sjg@chromium.org wrote:
Hi,
On Sat, 16 Mar 2019 at 04:13, Simon Goldschmidt simon.k.r.goldschmidt@gmail.com wrote:
This introduces a new Kconfig option SPL_CLEAR_BSS_F. If enabled, it clears the bss before calling board_init_f() instead of clearing it before calling board_init_r().
This also ensures that variables placed in BSS can be shared between board_init_f() and board_init_r() in SPL.
Make the new option depend on ARM for now until more implementations follow.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
Changes in v2:
- make CONFIG_SPL_CLEAR_BSS_F depend on ARM for now
common/spl/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+)
The current restriction is that you are not allowed to use BSS before board_init_r().
I understood that, but I did not understand why. This is perfectly valid for U-Boot proper or for SPL if SPL_SEPARATE_BSS is used and bss is in SDRAM. However, the latter seems to be seldom used and for the "default" case where bss is in SRAM, it's available right from the start and clearing it after board_init_f() has been run seems quite unuseful and unexpected.
Can you please add a motivation to change this?
The motivation is to allow SPL to use full malloc in board_init_f() like required by socfpga_arria10 (see patch 5/6). Without this, the malloc pointers get overwritten after board_init_f() and further calls to malloc() fail.
Regards, Simon

Hi Simon,
On Fri, 22 Mar 2019 at 02:16, Simon Goldschmidt simon.k.r.goldschmidt@gmail.com wrote:
Hi Simon,
On Fri, Mar 22, 2019 at 8:53 AM Simon Glass sjg@chromium.org wrote:
Hi,
On Sat, 16 Mar 2019 at 04:13, Simon Goldschmidt simon.k.r.goldschmidt@gmail.com wrote:
This introduces a new Kconfig option SPL_CLEAR_BSS_F. If enabled, it clears the bss before calling board_init_f() instead of clearing it before calling board_init_r().
This also ensures that variables placed in BSS can be shared between board_init_f() and board_init_r() in SPL.
Make the new option depend on ARM for now until more implementations follow.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
Changes in v2:
- make CONFIG_SPL_CLEAR_BSS_F depend on ARM for now
common/spl/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+)
The current restriction is that you are not allowed to use BSS before board_init_r().
I understood that, but I did not understand why. This is perfectly valid for U-Boot proper or for SPL if SPL_SEPARATE_BSS is used and bss is in SDRAM. However, the latter seems to be seldom used and for the "default" case where bss is in SRAM, it's available right from the start and clearing it after board_init_f() has been run seems quite unuseful and unexpected.
Well this is the API. We have to have some order and conventions otherwise things just decend into chaos, with so many options that it all becomes bewildering.
See 'Board Initialisation Flow:' in the README.
Can you please add a motivation to change this?
The motivation is to allow SPL to use full malloc in board_init_f() like required by socfpga_arria10 (see patch 5/6). Without this, the malloc pointers get overwritten after board_init_f() and further calls to malloc() fail.
Can you call spl_early_init() instead?
Regards, Simon

This implements the new option to clear BSS early in SPL for standard arm and arm64 crt0.
BSS is cleared before calling board_init_f() and thus not cleared before calling board_init_r() as it is not relocated in SPL.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
Changes in v2: - add CONFIG_SPL_CLEAR_BSS_F implementation for arm64 also
arch/arm/lib/crt0.S | 22 ++++++++++++++++++++++ arch/arm/lib/crt0_64.S | 14 ++++++++++++++ 2 files changed, 36 insertions(+)
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index fe312db690..b06e54e144 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -80,6 +80,26 @@ ENTRY(_main) mov r9, r0 bl board_init_f_init_reserve
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_CLEAR_BSS_F) + ldr r0, =__bss_start + +#ifdef CONFIG_USE_ARCH_MEMSET + ldr r3, =__bss_end + mov r1, #0x00000000 /* prepare zero to clear BSS */ + + subs r2, r3, r0 /* r2 = memset len */ + bl memset +#else + ldr r1, =__bss_end + mov r2, #0x00000000 /* prepare zero to clear BSS */ + +clbss_l:cmp r0, r1 /* while not at end of BSS */ + strlo r2, [r0] /* clear 32-bit BSS word */ + addlo r0, r0, #4 /* move to next */ + blo clbss_l +#endif +#endif + mov r0, #0 bl board_init_f
@@ -124,6 +144,7 @@ here: movne sp, r0 movne r9, r0 # endif +#if !defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_CLEAR_BSS_F) ldr r0, =__bss_start /* this is auto-relocated! */
#ifdef CONFIG_USE_ARCH_MEMSET @@ -141,6 +162,7 @@ clbss_l:cmp r0, r1 /* while not at end of BSS */ addlo r0, r0, #4 /* move to next */ blo clbss_l #endif +#endif
#if ! defined(CONFIG_SPL_BUILD) bl coloured_LED_init diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index d6b632aa87..82f643f737 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -86,6 +86,18 @@ ENTRY(_main) mov x18, x0 bl board_init_f_init_reserve
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_CLEAR_BSS_F) +/* + * Clear BSS section + */ + ldr x0, =__bss_start + ldr x1, =__bss_end +clear_loop: + str xzr, [x0], #8 + cmp x0, x1 + b.lo clear_loop +#endif + mov x0, #0 bl board_init_f
@@ -136,6 +148,7 @@ relocation_return: mov sp, x0 #endif
+#if !defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SPL_CLEAR_BSS_F) /* * Clear BSS section */ @@ -145,6 +158,7 @@ clear_loop: str xzr, [x0], #8 cmp x0, x1 b.lo clear_loop +#endif
/* call board_init_r(gd_t *id, ulong dest_addr) */ mov x0, x18 /* gd_t */

If the malloc range passed to mem_malloc_init() is at the end of address range and 'start + size' overflows to 0, following allocations fail as mem_malloc_end is zero (which looks like uninitialized).
Fix this by subtracting 1 of 'start + size' overflows to zero.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
Changes in v2: None
common/dlmalloc.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/common/dlmalloc.c b/common/dlmalloc.c index edaad299bb..51d3bd671a 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -603,6 +603,10 @@ void mem_malloc_init(ulong start, ulong size) mem_malloc_start = start; mem_malloc_end = start + size; mem_malloc_brk = start; + if (start && size && !mem_malloc_end) { + /* overflow: malloc area is at end of address range */ + mem_malloc_end--; + }
debug("using memory %#lx-%#lx for malloc()\n", mem_malloc_start, mem_malloc_end);

Convert debug output from '%#lx' to '0x%lx' to be compatible with tiny printf used in SPL.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
Changes in v2: None
common/dlmalloc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/common/dlmalloc.c b/common/dlmalloc.c index 51d3bd671a..af6f43dcc9 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -608,7 +608,7 @@ void mem_malloc_init(ulong start, ulong size) mem_malloc_end--; }
- debug("using memory %#lx-%#lx for malloc()\n", mem_malloc_start, + debug("using memory 0x%lx-0x%lx for malloc()\n", mem_malloc_start, mem_malloc_end); #ifdef CONFIG_SYS_MALLOC_CLEAR_ON_INIT memset((void *)mem_malloc_start, 0x0, size);

Some platforms (like socfpga A10) need a big hep before SDRAM is available (e.g. because FAT is used). For such platforms, simple_malloc is often not a good option as it does not support freeing memory. These platforms often use the non-Kconfig defines CONFIG_SYS_SPL_MALLOC_START (and its SIZE).
This patch allows enabling CONFIG_SPL_SYS_MALLOC_F_LEN while leaving CONFIG_SPL_SYS_MALLOC_SIMPLE disabled. In this case, the full malloc heap is made available as early as the simple_malloc heap would be normally.
This way, platforms can drop the non-Kconfig options to set up the full heap and rely on the same automatically calculated heap allocation used for simple heap.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
Changes in v2: None
common/spl/spl.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/common/spl/spl.c b/common/spl/spl.c index 88d4b8a9bf..b89340eb27 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -383,8 +383,13 @@ static int spl_common_init(bool setup_malloc) #ifdef CONFIG_MALLOC_F_ADDR gd->malloc_base = CONFIG_MALLOC_F_ADDR; #endif +#if CONFIG_IS_ENABLED(SYS_MALLOC_SIMPLE) gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN); gd->malloc_ptr = 0; +#else + mem_malloc_init(gd->malloc_base, CONFIG_VAL(SYS_MALLOC_F_LEN)); + gd->flags |= GD_FLG_FULL_MALLOC_INIT; +#endif } #endif ret = bootstage_init(true);

Hi,
On Sat, 16 Mar 2019 at 04:14, Simon Goldschmidt simon.k.r.goldschmidt@gmail.com wrote:
Some platforms (like socfpga A10) need a big hep before SDRAM is available
heap
(e.g. because FAT is used). For such platforms, simple_malloc is often not a good option as it does not support freeing memory. These platforms often
Does the lack of free() actually cause any problems on this platform?
use the non-Kconfig defines CONFIG_SYS_SPL_MALLOC_START (and its SIZE).
This patch allows enabling CONFIG_SPL_SYS_MALLOC_F_LEN while leaving CONFIG_SPL_SYS_MALLOC_SIMPLE disabled. In this case, the full malloc heap is made available as early as the simple_malloc heap would be normally.
Why not init SDRAM before using FAT?
This way, platforms can drop the non-Kconfig options to set up the full heap and rely on the same automatically calculated heap allocation used for simple heap.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
Changes in v2: None
common/spl/spl.c | 5 +++++ 1 file changed, 5 insertions(+)
Regards, Simon

Hi Simon,
On Fri, Mar 22, 2019 at 8:53 AM Simon Glass sjg@chromium.org wrote:
Hi,
On Sat, 16 Mar 2019 at 04:14, Simon Goldschmidt simon.k.r.goldschmidt@gmail.com wrote:
Some platforms (like socfpga A10) need a big hep before SDRAM is available
heap
(e.g. because FAT is used). For such platforms, simple_malloc is often not a good option as it does not support freeing memory. These platforms often
Does the lack of free() actually cause any problems on this platform?
Yes. Without free(), the available SRAM is not enough to provide the heap required.
use the non-Kconfig defines CONFIG_SYS_SPL_MALLOC_START (and its SIZE).
This patch allows enabling CONFIG_SPL_SYS_MALLOC_F_LEN while leaving CONFIG_SPL_SYS_MALLOC_SIMPLE disabled. In this case, the full malloc heap is made available as early as the simple_malloc heap would be normally.
Why not init SDRAM before using FAT?
Because the SDRAM controller is not available yet. As I understood, his is an FPGA platform where the initial FPGA image has to be loaded to get SDRAM running.
If that initial FPGA image is to be loaded from FAT, you just need a rather big heap.
Currently, the non-Kconfig CONFIG_SYS_SPL_MALLOC_START is used. I don't think using this one is a good approach as it is yet another way of ad-hoc memory allocation plus it's quite confusing to have full and simple malloc use a different way to allocate the heap region.
Regards, Simon
This way, platforms can drop the non-Kconfig options to set up the full heap and rely on the same automatically calculated heap allocation used for simple heap.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
Changes in v2: None
common/spl/spl.c | 5 +++++ 1 file changed, 5 insertions(+)
Regards, Simon

Instead of fixing the SPL stack to 64 KiB in the board config header via CONFIG_SYS_SPL_MALLOC_SIZE, let's just use CONFIG_SPL_SYS_MALLOC_F_LEN in the defconfig.
This also has the advandage that it removes sub-mach specific ifdefs in socfpga_common.h.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
Changes in v2: None
configs/socfpga_arria10_defconfig | 1 + include/configs/socfpga_common.h | 14 -------------- 2 files changed, 1 insertion(+), 14 deletions(-)
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index f321a0ac3b..8d0479cc05 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x01000040 CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y CONFIG_SPL=y CONFIG_IDENT_STRING="socfpga_arria10" diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 181af9b646..16c83900c3 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -251,16 +251,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE
-#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -/* SPL memory allocation configuration, this is for FAT implementation */ -#ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \ - CONFIG_SYS_SPL_MALLOC_SIZE + \ - CONFIG_SYS_INIT_RAM_ADDR) -#endif -#endif - /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) @@ -294,11 +284,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* * Stack setup */ -#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START -#endif
/* Extra Environment */ #ifndef CONFIG_SPL_BUILD

On Fri, 2019-03-15 at 21:13 +0100, Simon Goldschmidt wrote:
Instead of fixing the SPL stack to 64 KiB in the board config header via CONFIG_SYS_SPL_MALLOC_SIZE, let's just use CONFIG_SPL_SYS_MALLOC_F_LEN in the defconfig.
This also has the advandage that it removes sub-mach specific ifdefs in socfpga_common.h.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
Hi Simon,
I found the culprit in patch[5], you cannot put mem_malloc_init in spl_common_init function because spl_common_init would be called in board_init_f, then board_init_f would call mem_malloc_init, mem_malloc_init would store start and end addresses to few global variables such as mem_malloc_start, mem_malloc_end and mem_malloc_brk. By that time, global variables are unavailable yet.
Thanks. TF
Changes in v2: None
configs/socfpga_arria10_defconfig | 1 + include/configs/socfpga_common.h | 14 -------------- 2 files changed, 1 insertion(+), 14 deletions(-)
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index f321a0ac3b..8d0479cc05 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x01000040 CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y CONFIG_SPL=y CONFIG_IDENT_STRING="socfpga_arria10" diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 181af9b646..16c83900c3 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -251,16 +251,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE -#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -/* SPL memory allocation configuration, this is for FAT implementation */ -#ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE
- \
CONFIG_SYS_SPL_MALLOC_SIZE
- \
CONFIG_SYS_INIT_RAM_ADDR)
-#endif -#endif
/* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) @@ -294,11 +284,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* * Stack setup */ -#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START -#endif /* Extra Environment */ #ifndef CONFIG_SPL_BUILD

Am 19.03.2019 um 17:19 schrieb Chee, Tien Fong:
On Fri, 2019-03-15 at 21:13 +0100, Simon Goldschmidt wrote:
Instead of fixing the SPL stack to 64 KiB in the board config header via CONFIG_SYS_SPL_MALLOC_SIZE, let's just use CONFIG_SPL_SYS_MALLOC_F_LEN in the defconfig.
This also has the advandage that it removes sub-mach specific ifdefs in socfpga_common.h.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
Hi Simon,
I found the culprit in patch[5], you cannot put mem_malloc_init in spl_common_init function because spl_common_init would be called in board_init_f, then board_init_f would call mem_malloc_init, mem_malloc_init would store start and end addresses to few global variables such as mem_malloc_start, mem_malloc_end and mem_malloc_brk. By that time, global variables are unavailable yet.
Thanks for testing. Patch 2/6 should make sure global variables are available in board_init_f by clearing bss *before* calling that function, not *after* calling it. Because technicaly, global variables are always available for a10-SPL as they are located in SRAM. They only got cleared after board_init_f...
Which gets me to my error: I forgot to enable the newly added CONFIG_SPL_CLEAR_BSS_F in this patch. Could you probably try again with CONFIG_SPL_CLEAR_BSS_F enabled? That would be great!
Regards, Simon
Thanks. TF
Changes in v2: None
configs/socfpga_arria10_defconfig | 1 + include/configs/socfpga_common.h | 14 -------------- 2 files changed, 1 insertion(+), 14 deletions(-)
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index f321a0ac3b..8d0479cc05 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x01000040 CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y CONFIG_SPL=y CONFIG_IDENT_STRING="socfpga_arria10" diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 181af9b646..16c83900c3 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -251,16 +251,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE
-#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -/* SPL memory allocation configuration, this is for FAT implementation */ -#ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE
- \
CONFIG_SYS_SPL_MALLOC_SIZE
- \
CONFIG_SYS_INIT_RAM_ADDR)
-#endif -#endif
/* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) @@ -294,11 +284,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* * Stack setup */ -#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START -#endif
/* Extra Environment */ #ifndef CONFIG_SPL_BUILD

On Tue, 2019-03-19 at 17:29 +0100, Simon Goldschmidt wrote:
Am 19.03.2019 um 17:19 schrieb Chee, Tien Fong:
On Fri, 2019-03-15 at 21:13 +0100, Simon Goldschmidt wrote:
Instead of fixing the SPL stack to 64 KiB in the board config header via CONFIG_SYS_SPL_MALLOC_SIZE, let's just use CONFIG_SPL_SYS_MALLOC_F_LEN in the defconfig.
This also has the advandage that it removes sub-mach specific ifdefs in socfpga_common.h.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com
Hi Simon,
I found the culprit in patch[5], you cannot put mem_malloc_init in spl_common_init function because spl_common_init would be called in board_init_f, then board_init_f would call mem_malloc_init, mem_malloc_init would store start and end addresses to few global variables such as mem_malloc_start, mem_malloc_end and mem_malloc_brk. By that time, global variables are unavailable yet.
Thanks for testing. Patch 2/6 should make sure global variables are available in board_init_f by clearing bss *before* calling that function, not *after* calling it. Because technicaly, global variables are always available for a10-SPL as they are located in SRAM. They only got cleared after board_init_f...
Yes, you are right, memset would clear .BSS after mem_malloc_init.
Which gets me to my error: I forgot to enable the newly added CONFIG_SPL_CLEAR_BSS_F in this patch. Could you probably try again with CONFIG_SPL_CLEAR_BSS_F enabled? That would be great!
Tested, passing. May be force enabling it or compile error if full malloc is used?
Thanks. TF.
Regards, Simon
Thanks. TF
Changes in v2: None
configs/socfpga_arria10_defconfig | 1 + include/configs/socfpga_common.h | 14 -------------- 2 files changed, 1 insertion(+), 14 deletions(-)
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index f321a0ac3b..8d0479cc05 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x01000040 CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y CONFIG_SPL=y CONFIG_IDENT_STRING="socfpga_arria10" diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 181af9b646..16c83900c3 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -251,16 +251,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM _ADDR #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_ SIZE -#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -/* SPL memory allocation configuration, this is for FAT implementation */ -#ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_ SIZE
- \
CONFIG_SYS_SPL_MALLOC_S
IZE
- \
CONFIG_SYS_INIT_RAM_ADD
R) -#endif -#endif
/* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) @@ -294,11 +284,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* * Stack setup */ -#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_ST ART -#endif /* Extra Environment */ #ifndef CONFIG_SPL_BUILD

Chee, Tien Fong tien.fong.chee@intel.com schrieb am Mi., 20. März 2019, 05:15:
On Tue, 2019-03-19 at 17:29 +0100, Simon Goldschmidt wrote:
Am 19.03.2019 um 17:19 schrieb Chee, Tien Fong:
On Fri, 2019-03-15 at 21:13 +0100, Simon Goldschmidt wrote:
Instead of fixing the SPL stack to 64 KiB in the board config header via CONFIG_SYS_SPL_MALLOC_SIZE, let's just use CONFIG_SPL_SYS_MALLOC_F_LEN in the defconfig.
This also has the advandage that it removes sub-mach specific ifdefs in socfpga_common.h.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com
Hi Simon,
I found the culprit in patch[5], you cannot put mem_malloc_init in spl_common_init function because spl_common_init would be called in board_init_f, then board_init_f would call mem_malloc_init, mem_malloc_init would store start and end addresses to few global variables such as mem_malloc_start, mem_malloc_end and mem_malloc_brk. By that time, global variables are unavailable yet.
Thanks for testing. Patch 2/6 should make sure global variables are available in board_init_f by clearing bss *before* calling that function, not *after* calling it. Because technicaly, global variables are always available for a10-SPL as they are located in SRAM. They only got cleared after board_init_f...
Yes, you are right, memset would clear .BSS after mem_malloc_init.
Which gets me to my error: I forgot to enable the newly added CONFIG_SPL_CLEAR_BSS_F in this patch. Could you probably try again with CONFIG_SPL_CLEAR_BSS_F enabled? That would be great!
Tested, passing. May be force enabling it or compile error if full malloc is used?
Ok, thanks for testing again! I'll make up some kind of check for v3.
Regards, Simon
Thanks. TF.
Regards, Simon
Thanks. TF
Changes in v2: None
configs/socfpga_arria10_defconfig | 1 + include/configs/socfpga_common.h | 14 -------------- 2 files changed, 1 insertion(+), 14 deletions(-)
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index f321a0ac3b..8d0479cc05 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_TEXT_BASE=0x01000040 CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y CONFIG_SPL=y CONFIG_IDENT_STRING="socfpga_arria10" diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 181af9b646..16c83900c3 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -251,16 +251,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM _ADDR #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_ SIZE
-#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -/* SPL memory allocation configuration, this is for FAT implementation */ -#ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_ SIZE
- \
CONFIG_SYS_SPL_MALLOC_S
IZE
- \
CONFIG_SYS_INIT_RAM_ADD
R) -#endif -#endif
- /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
@@ -294,11 +284,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /*
- Stack setup
*/ -#if defined(CONFIG_TARGET_SOCFPGA_GEN5) #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_ST ART -#endif
/* Extra Environment */ #ifndef CONFIG_SPL_BUILD
participants (3)
-
Chee, Tien Fong
-
Simon Glass
-
Simon Goldschmidt