[U-Boot] [PATCH v2 0/8] Device tree support for Powerpc in u-boot

In current implementation, Powerpc does not support device tree in u-boot. This patch enables device tree support for PowerPC platform .
T2080AQDS board used as first platform.
Dtb is embedded in the u-boot following below steps using binmam tool.
1. Remove bootpg and resetvec section if required 2. Append dtb using binman 3. Append bootpg and resetvec section back if removed in 1st step.
To enable binman tool, 'binman' node has been added in the device tree.
Jagdish Gediya (8): powerpc/dts: Define '_end' symbol in mpc85xx u-boot lds files powerpc/dts: Makefile changes to clean and build dts binman: Add a new "skip-at-start" property in Section class binman: Add support for Powerpc mpc85xx 'bootpg + resetvec' entry powerpc: mpc85xx: Select BINMAN by default powerpc: mpc85xx: Use binman to embed dtb inside u-boot powerpc: dts: Add u-boot.dtsi to use binman for MPC85xx boards powerpc: dts: Enable device tree support for T2080QDS
Makefile | 23 +++++++- arch/powerpc/Kconfig | 1 + arch/powerpc/cpu/mpc85xx/Kconfig | 4 ++ arch/powerpc/cpu/mpc85xx/u-boot-nand.lds | 1 + arch/powerpc/cpu/mpc85xx/u-boot.lds | 1 + arch/powerpc/dts/Makefile | 14 +++++ arch/powerpc/dts/e6500_power_isa.dtsi | 39 ++++++++++++++ arch/powerpc/dts/t2080.dtsi | 62 ++++++++++++++++++++++ arch/powerpc/dts/t2080qds.dts | 17 ++++++ arch/powerpc/dts/u-boot.dtsi | 32 +++++++++++ board/freescale/t208xqds/README | 19 +++++++ configs/T2080QDS_NAND_defconfig | 3 +- configs/T2080QDS_SDCARD_defconfig | 3 +- configs/T2080QDS_SPIFLASH_defconfig | 3 +- configs/T2080QDS_defconfig | 4 +- dts/Makefile | 2 +- tools/binman/README | 9 ++++ tools/binman/README.entries | 14 ++++- tools/binman/bsection.py | 1 + .../etype/powerpc_mpc85xx_bootpg_resetvec.py | 25 +++++++++ tools/binman/ftest.py | 8 +++ .../test/80_powerpc_mpc85xx_bootpg_resetvec.dts | 16 ++++++ 22 files changed, 294 insertions(+), 7 deletions(-) create mode 100644 arch/powerpc/dts/Makefile create mode 100644 arch/powerpc/dts/e6500_power_isa.dtsi create mode 100644 arch/powerpc/dts/t2080.dtsi create mode 100644 arch/powerpc/dts/t2080qds.dts create mode 100644 arch/powerpc/dts/u-boot.dtsi create mode 100644 tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py create mode 100644 tools/binman/test/80_powerpc_mpc85xx_bootpg_resetvec.dts

'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- Changes for v2: - Defined '_end' symbol in lds file instead of defining new 'board_fdt_blob_setup' function using existing '_init_end' symbol.
arch/powerpc/cpu/mpc85xx/u-boot-nand.lds | 1 + arch/powerpc/cpu/mpc85xx/u-boot.lds | 1 + 2 files changed, 2 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds index 6db6da1..75b0285 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds @@ -74,6 +74,7 @@ SECTIONS .data.init : { *(.data.init) } . = ALIGN(256); __init_end = .; + _end = .;
.bootpg ADDR(.text) - 0x1000 : { diff --git a/arch/powerpc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds index 14c31be..22bbac5 100644 --- a/arch/powerpc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -81,6 +81,7 @@ SECTIONS .data.init : { *(.data.init) } . = ALIGN(256); __init_end = .; + _end = .;
#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC .bootpg ADDR(.text) - 0x1000 :

On Tue, Aug 28, 2018 at 11:53 AM Jagdish Gediya jagdish.gediya@nxp.com wrote:
'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Defined '_end' symbol in lds file instead of defining new 'board_fdt_blob_setup' function using existing '_init_end' symbol.
arch/powerpc/cpu/mpc85xx/u-boot-nand.lds | 1 + arch/powerpc/cpu/mpc85xx/u-boot.lds | 1 + 2 files changed, 2 insertions(+)
This only updates 2 lds files. Can you update all mpc85xx lds files so that they are consistent?
Regards, Bin

Hi Bin,
-----Original Message----- From: Bin Meng bmeng.cn@gmail.com Sent: Tuesday, August 28, 2018 2:46 PM To: Jagdish Gediya jagdish.gediya@nxp.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; York Sun york.sun@nxp.com; Poonam Aggrwal poonam.aggrwal@nxp.com; Simon Glass sjg@chromium.org; Tom Rini trini@konsulko.com Subject: Re: [PATCH v2 1/8] powerpc/dts: Define '_end' symbol in mpc85xx u- boot lds files
On Tue, Aug 28, 2018 at 11:53 AM Jagdish Gediya jagdish.gediya@nxp.com wrote:
'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Defined '_end' symbol in lds file instead of defining new 'board_fdt_blob_setup' function using existing '_init_end' symbol.
arch/powerpc/cpu/mpc85xx/u-boot-nand.lds | 1 + arch/powerpc/cpu/mpc85xx/u-boot.lds | 1 + 2 files changed, 2 insertions(+)
This only updates 2 lds files. Can you update all mpc85xx lds files so that they are consistent?
Remaining are spl lds files and I think '_end' symbol is not needed there.
Thanks, Jagdish

On Tue, Aug 28, 2018 at 6:50 PM Jagdish Gediya jagdish.gediya@nxp.com wrote:
Hi Bin,
-----Original Message----- From: Bin Meng bmeng.cn@gmail.com Sent: Tuesday, August 28, 2018 2:46 PM To: Jagdish Gediya jagdish.gediya@nxp.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; York Sun york.sun@nxp.com; Poonam Aggrwal poonam.aggrwal@nxp.com; Simon Glass sjg@chromium.org; Tom Rini trini@konsulko.com Subject: Re: [PATCH v2 1/8] powerpc/dts: Define '_end' symbol in mpc85xx u- boot lds files
On Tue, Aug 28, 2018 at 11:53 AM Jagdish Gediya jagdish.gediya@nxp.com wrote:
'board_fdt_blob_setup' function sets up fdt blob at '&_end' so define '_end' symbol in mpc85xx lds files.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Defined '_end' symbol in lds file instead of defining new 'board_fdt_blob_setup' function using existing '_init_end' symbol.
arch/powerpc/cpu/mpc85xx/u-boot-nand.lds | 1 + arch/powerpc/cpu/mpc85xx/u-boot.lds | 1 + 2 files changed, 2 insertions(+)
This only updates 2 lds files. Can you update all mpc85xx lds files so that they are consistent?
Remaining are spl lds files and I think '_end' symbol is not needed there.
But if you look at other targets, the spl version lds has the _end symbol. Adding _end there does not cause any problem, no?
Regards, Bin

Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- arch/powerpc/dts/Makefile | 12 ++++++++++++ dts/Makefile | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) create mode 100644 arch/powerpc/dts/Makefile
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile new file mode 100644 index 0000000..de14e7b --- /dev/null +++ b/arch/powerpc/dts/Makefile @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0+ + +targets += $(dtb-y) + +# Add any required device tree compiler flags here +DTC_FLAGS += + +PHONY += dtbs +dtbs: $(addprefix $(obj)/, $(dtb-y)) + @: + +clean-files := *.dtb diff --git a/dts/Makefile b/dts/Makefile index 36dfbe7..9a9a3d5 100644 --- a/dts/Makefile +++ b/dts/Makefile @@ -61,4 +61,4 @@ dtbs: $(obj)/dt.dtb $(obj)/dt-spl.dtb clean-files := dt.dtb.S dt-spl.dtb.S
# Let clean descend into dts directories -subdir- += ../arch/arm/dts ../arch/microblaze/dts ../arch/mips/dts ../arch/sandbox/dts ../arch/x86/dts +subdir- += ../arch/arm/dts ../arch/microblaze/dts ../arch/mips/dts ../arch/sandbox/dts ../arch/x86/dts ../arch/powerpc/dts

On Tue, Aug 28, 2018 at 11:53 AM Jagdish Gediya jagdish.gediya@nxp.com wrote:
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
arch/powerpc/dts/Makefile | 12 ++++++++++++ dts/Makefile | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) create mode 100644 arch/powerpc/dts/Makefile
Reviewed-by: Bin Meng bmeng.cn@gmail.com
I think I reviewed this already, and you did not mention any v2 changes. So can you please preserve the review tags in the future when sending new version series, so that people know they have reviewed the patch?
Regards, Bin

On 28 August 2018 at 08:49, Jagdish Gediya jagdish.gediya@nxp.com wrote:
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
arch/powerpc/dts/Makefile | 12 ++++++++++++ dts/Makefile | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) create mode 100644 arch/powerpc/dts/Makefile
Reviewed-by: Simon Glass sjg@chromium.org

Currently binman calculates '_skip_at_start' based on 'end-at-4gb' property and it is used for x86 images.
For Powerpc mpc85xx based CPU, CONFIG_SYS_TEXT_BASE is the first entry offset which can be 0xeff40000 or 0xfff40000 for nor flash boot, 0x201000 for sd boot etc, so "_skip_at_start" should be set to CONFIG_SYS_TEXT_BASE.
'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE + Image size != 4gb.
Add new property "skip-at-start" in Section class so that '_skip_at_start' can be calculated either based on "end-at-4gb" or based on "skip-at-start".
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- Changes for v2: - Renamed 'start-pos' property to 'skip-at-start' - Updated README
tools/binman/README | 9 +++++++++ tools/binman/bsection.py | 1 + 2 files changed, 10 insertions(+)
diff --git a/tools/binman/README b/tools/binman/README index cb34171..7b4bf2e 100644 --- a/tools/binman/README +++ b/tools/binman/README @@ -397,6 +397,15 @@ end-at-4gb: 8MB ROM, the offset of the first entry would be 0xfff80000 with this option, instead of 0 without this option.
+skip-at-start: + This property specifies the first entry offset if not 0. + + For Powerpc Book-E architecture, CONFIG_SYS_TEXT_BASE is the first + entry offset which can be 0xeff40000 or 0xfff40000 for nor flash boot, + 0x201000 for sd boot etc. + + 'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE + + Image size != 4gb.
Examples of the above options can be found in the tests. See the tools/binman/test directory. diff --git a/tools/binman/bsection.py b/tools/binman/bsection.py index a0bd1b6..68997b7 100644 --- a/tools/binman/bsection.py +++ b/tools/binman/bsection.py @@ -79,6 +79,7 @@ class Section(object): self._pad_byte = fdt_util.GetInt(self._node, 'pad-byte', 0) self._sort = fdt_util.GetBool(self._node, 'sort-by-offset') self._end_4gb = fdt_util.GetBool(self._node, 'end-at-4gb') + self._skip_at_start = fdt_util.GetInt(self._node, 'skip-at-start', 0) if self._end_4gb and not self._size: self._Raise("Section size must be provided when using end-at-4gb") if self._end_4gb:

On Tue, Aug 28, 2018 at 11:53 AM Jagdish Gediya jagdish.gediya@nxp.com wrote:
Currently binman calculates '_skip_at_start' based on 'end-at-4gb' property and it is used for x86 images.
For Powerpc mpc85xx based CPU, CONFIG_SYS_TEXT_BASE is the first
nits: PowerPC
entry offset which can be 0xeff40000 or 0xfff40000 for nor flash boot, 0x201000 for sd boot etc, so "_skip_at_start" should be set to CONFIG_SYS_TEXT_BASE.
'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE + Image size != 4gb.
Add new property "skip-at-start" in Section class so that '_skip_at_start' can be calculated either based on "end-at-4gb" or based on "skip-at-start".
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Renamed 'start-pos' property to 'skip-at-start' - Updated README
tools/binman/README | 9 +++++++++ tools/binman/bsection.py | 1 + 2 files changed, 10 insertions(+)
Reviewed-by: Bin Meng bmeng.cn@gmail.com
But two nits below:
diff --git a/tools/binman/README b/tools/binman/README index cb34171..7b4bf2e 100644 --- a/tools/binman/README +++ b/tools/binman/README @@ -397,6 +397,15 @@ end-at-4gb: 8MB ROM, the offset of the first entry would be 0xfff80000 with this option, instead of 0 without this option.
+skip-at-start:
This property specifies the first entry offset if not 0.
For Powerpc Book-E architecture, CONFIG_SYS_TEXT_BASE is the first
nits: PowerPC
entry offset which can be 0xeff40000 or 0xfff40000 for nor flash boot,
0x201000 for sd boot etc.
'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE +
Image size != 4gb.
Examples of the above options can be found in the tests. See the tools/binman/test directory. diff --git a/tools/binman/bsection.py b/tools/binman/bsection.py index a0bd1b6..68997b7 100644 --- a/tools/binman/bsection.py +++ b/tools/binman/bsection.py @@ -79,6 +79,7 @@ class Section(object): self._pad_byte = fdt_util.GetInt(self._node, 'pad-byte', 0) self._sort = fdt_util.GetBool(self._node, 'sort-by-offset') self._end_4gb = fdt_util.GetBool(self._node, 'end-at-4gb')
self._skip_at_start = fdt_util.GetInt(self._node, 'skip-at-start', 0) if self._end_4gb and not self._size: self._Raise("Section size must be provided when using end-at-4gb") if self._end_4gb:
--
Regards, Bin

Hi,
On 28 August 2018 at 08:49, Jagdish Gediya jagdish.gediya@nxp.com wrote:
Currently binman calculates '_skip_at_start' based on 'end-at-4gb' property and it is used for x86 images.
For Powerpc mpc85xx based CPU, CONFIG_SYS_TEXT_BASE is the first entry offset which can be 0xeff40000 or 0xfff40000 for nor flash boot, 0x201000 for sd boot etc, so "_skip_at_start" should be set to CONFIG_SYS_TEXT_BASE.
'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE + Image size != 4gb.
Add new property "skip-at-start" in Section class so that '_skip_at_start' can be calculated either based on "end-at-4gb" or based on "skip-at-start".
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Renamed 'start-pos' property to 'skip-at-start' - Updated README
tools/binman/README | 9 +++++++++ tools/binman/bsection.py | 1 + 2 files changed, 10 insertions(+)
Please add a test for this feature. You will need to add a new numbered dts in tools/binman/tests and test in ftest.py
diff --git a/tools/binman/README b/tools/binman/README index cb34171..7b4bf2e 100644 --- a/tools/binman/README +++ b/tools/binman/README @@ -397,6 +397,15 @@ end-at-4gb: 8MB ROM, the offset of the first entry would be 0xfff80000 with this option, instead of 0 without this option.
+skip-at-start:
This property specifies the first entry offset if not 0.
For Powerpc Book-E architecture, CONFIG_SYS_TEXT_BASE is the first
entry offset which can be 0xeff40000 or 0xfff40000 for nor flash boot,
0x201000 for sd boot etc.
Can you say 'entry offset of the first entry. It can be ...'. I think it is clearer.
'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE +
Image size != 4gb.
Examples of the above options can be found in the tests. See the tools/binman/test directory. diff --git a/tools/binman/bsection.py b/tools/binman/bsection.py index a0bd1b6..68997b7 100644 --- a/tools/binman/bsection.py +++ b/tools/binman/bsection.py @@ -79,6 +79,7 @@ class Section(object): self._pad_byte = fdt_util.GetInt(self._node, 'pad-byte', 0) self._sort = fdt_util.GetBool(self._node, 'sort-by-offset') self._end_4gb = fdt_util.GetBool(self._node, 'end-at-4gb')
self._skip_at_start = fdt_util.GetInt(self._node, 'skip-at-start', 0)
This is a bit pedantic, but...
I think this needs to drop the '0' default value. Also in the __init__ constructor, set _skip_at_start to None....
if self._end_4gb and not self._size: self._Raise("Section size must be provided when using end-at-4gb") if self._end_4gb:
...here you need to check that self._skip_at_start is None, so people don't set both properties. Then set it to 0 if not set and not end_4gb. Something like:
if self._end_4gb: if if self._skip_at_start is not None: self.Raise... self._skip_at_start = 0x100000000 - self._size else: self._skip_at_start = 0
Does that make sense? This needs a test too...
-- 2.7.4
Regards, Simon

Hi,
-----Original Message----- From: sjg@google.com sjg@google.com On Behalf Of Simon Glass Sent: Thursday, August 30, 2018 8:21 AM To: Jagdish Gediya jagdish.gediya@nxp.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; York Sun york.sun@nxp.com; Poonam Aggrwal poonam.aggrwal@nxp.com; Bin Meng bmeng.cn@gmail.com; Tom Rini trini@konsulko.com Subject: Re: [PATCH v2 3/8] binman: Add a new "skip-at-start" property in Section class
Hi,
On 28 August 2018 at 08:49, Jagdish Gediya jagdish.gediya@nxp.com wrote:
Currently binman calculates '_skip_at_start' based on 'end-at-4gb' property and it is used for x86 images.
For Powerpc mpc85xx based CPU, CONFIG_SYS_TEXT_BASE is the first entry offset which can be 0xeff40000 or 0xfff40000 for nor flash boot, 0x201000 for sd boot etc, so "_skip_at_start" should be set to CONFIG_SYS_TEXT_BASE.
'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE + Image size != 4gb.
Add new property "skip-at-start" in Section class so that '_skip_at_start' can be calculated either based on "end-at-4gb" or based on "skip-at-start".
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Renamed 'start-pos' property to 'skip-at-start' - Updated README
tools/binman/README | 9 +++++++++ tools/binman/bsection.py | 1 + 2 files changed, 10 insertions(+)
Please add a test for this feature. You will need to add a new numbered dts in tools/binman/tests and test in ftest.py
diff --git a/tools/binman/README b/tools/binman/README index cb34171..7b4bf2e 100644 --- a/tools/binman/README +++ b/tools/binman/README @@ -397,6 +397,15 @@ end-at-4gb: 8MB ROM, the offset of the first entry would be 0xfff80000 with this option, instead of 0 without this option.
+skip-at-start:
This property specifies the first entry offset if not 0.
For Powerpc Book-E architecture, CONFIG_SYS_TEXT_BASE is the first
entry offset which can be 0xeff40000 or 0xfff40000 for nor flash boot,
0x201000 for sd boot etc.
Can you say 'entry offset of the first entry. It can be ...'. I think it is clearer.
'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE
Image size != 4gb.
Examples of the above options can be found in the tests. See the tools/binman/test directory. diff --git a/tools/binman/bsection.py b/tools/binman/bsection.py index a0bd1b6..68997b7 100644 --- a/tools/binman/bsection.py +++ b/tools/binman/bsection.py @@ -79,6 +79,7 @@ class Section(object): self._pad_byte = fdt_util.GetInt(self._node, 'pad-byte', 0) self._sort = fdt_util.GetBool(self._node, 'sort-by-offset') self._end_4gb = fdt_util.GetBool(self._node, 'end-at-4gb')
self._skip_at_start = fdt_util.GetInt(self._node,
- 'skip-at-start', 0)
This is a bit pedantic, but...
I think this needs to drop the '0' default value. Also in the __init__ constructor, set _skip_at_start to None....
if self._end_4gb and not self._size: self._Raise("Section size must be provided when using end-at-4gb") if self._end_4gb:
...here you need to check that self._skip_at_start is None, so people don't set both properties. Then set it to 0 if not set and not end_4gb. Something like:
if self._end_4gb: if if self._skip_at_start is not None: self.Raise... self._skip_at_start = 0x100000000 - self._size else: self._skip_at_start = 0
Does that make sense? This needs a test too...
I think it should be checked that self._skip_at_start is None before setting it to 0 in else part. What's your opinion on below implementation?
self._end_4gb = fdt_util.GetBool(self._node, 'end-at-4gb') self._skip_at_start = fdt_util.GetInt(self._node, 'skip-at-start') if self._end_4gb: if not self._size: self._Raise("Section size must be provided when using end-at-4gb") if self._skip_at_start is not None: self._Raise("Provide either 'end-at-4gb' or 'skip-at-start'") else: self._skip_at_start = 0x100000000 - self._size else: if self._skip_at_start is None: self._skip_at_start = 0
Thanks, Jagdish

Hi,
On 30 August 2018 at 23:22, Jagdish Gediya jagdish.gediya@nxp.com wrote:
Hi,
-----Original Message----- From: sjg@google.com sjg@google.com On Behalf Of Simon Glass Sent: Thursday, August 30, 2018 8:21 AM To: Jagdish Gediya jagdish.gediya@nxp.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; York Sun york.sun@nxp.com; Poonam Aggrwal poonam.aggrwal@nxp.com; Bin Meng bmeng.cn@gmail.com; Tom Rini trini@konsulko.com Subject: Re: [PATCH v2 3/8] binman: Add a new "skip-at-start" property in Section class
Hi,
On 28 August 2018 at 08:49, Jagdish Gediya jagdish.gediya@nxp.com wrote:
Currently binman calculates '_skip_at_start' based on 'end-at-4gb' property and it is used for x86 images.
For Powerpc mpc85xx based CPU, CONFIG_SYS_TEXT_BASE is the first entry offset which can be 0xeff40000 or 0xfff40000 for nor flash boot, 0x201000 for sd boot etc, so "_skip_at_start" should be set to CONFIG_SYS_TEXT_BASE.
'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE + Image size != 4gb.
Add new property "skip-at-start" in Section class so that '_skip_at_start' can be calculated either based on "end-at-4gb" or based on "skip-at-start".
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Renamed 'start-pos' property to 'skip-at-start' - Updated README
tools/binman/README | 9 +++++++++ tools/binman/bsection.py | 1 + 2 files changed, 10 insertions(+)
Please add a test for this feature. You will need to add a new numbered dts in tools/binman/tests and test in ftest.py
diff --git a/tools/binman/README b/tools/binman/README index cb34171..7b4bf2e 100644 --- a/tools/binman/README +++ b/tools/binman/README @@ -397,6 +397,15 @@ end-at-4gb: 8MB ROM, the offset of the first entry would be 0xfff80000 with this option, instead of 0 without this option.
+skip-at-start:
This property specifies the first entry offset if not 0.
For Powerpc Book-E architecture, CONFIG_SYS_TEXT_BASE is the first
entry offset which can be 0xeff40000 or 0xfff40000 for nor flash boot,
0x201000 for sd boot etc.
Can you say 'entry offset of the first entry. It can be ...'. I think it is clearer.
'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE
Image size != 4gb.
Examples of the above options can be found in the tests. See the tools/binman/test directory. diff --git a/tools/binman/bsection.py b/tools/binman/bsection.py index a0bd1b6..68997b7 100644 --- a/tools/binman/bsection.py +++ b/tools/binman/bsection.py @@ -79,6 +79,7 @@ class Section(object): self._pad_byte = fdt_util.GetInt(self._node, 'pad-byte', 0) self._sort = fdt_util.GetBool(self._node, 'sort-by-offset') self._end_4gb = fdt_util.GetBool(self._node, 'end-at-4gb')
self._skip_at_start = fdt_util.GetInt(self._node,
- 'skip-at-start', 0)
This is a bit pedantic, but...
I think this needs to drop the '0' default value. Also in the __init__ constructor, set _skip_at_start to None....
if self._end_4gb and not self._size: self._Raise("Section size must be provided when using end-at-4gb") if self._end_4gb:
...here you need to check that self._skip_at_start is None, so people don't set both properties. Then set it to 0 if not set and not end_4gb. Something like:
if self._end_4gb: if if self._skip_at_start is not None: self.Raise... self._skip_at_start = 0x100000000 - self._size else: self._skip_at_start = 0
Does that make sense? This needs a test too...
I think it should be checked that self._skip_at_start is None before setting it to 0 in else part. What's your opinion on below implementation?
self._end_4gb = fdt_util.GetBool(self._node, 'end-at-4gb') self._skip_at_start = fdt_util.GetInt(self._node, 'skip-at-start') if self._end_4gb: if not self._size: self._Raise("Section size must be provided when using end-at-4gb") if self._skip_at_start is not None: self._Raise("Provide either 'end-at-4gb' or 'skip-at-start'") else: self._skip_at_start = 0x100000000 - self._size else: if self._skip_at_start is None: self._skip_at_start = 0
That looks OK to me. Make sure you change __init__() to set it to None instead of 0.
Regards, Simon

This entry contains the Powerpc mpc85xx boot page and resetvec sections.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- Changes for v2: - Updated README for new binman entry - Added test
tools/binman/README.entries | 14 +++++++++++- .../etype/powerpc_mpc85xx_bootpg_resetvec.py | 25 ++++++++++++++++++++++ tools/binman/ftest.py | 8 +++++++ .../test/80_powerpc_mpc85xx_bootpg_resetvec.dts | 16 ++++++++++++++ 4 files changed, 62 insertions(+), 1 deletion(-) create mode 100644 tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py create mode 100644 tools/binman/test/80_powerpc_mpc85xx_bootpg_resetvec.dts
diff --git a/tools/binman/README.entries b/tools/binman/README.entries index c6e7b22..99440d6 100644 --- a/tools/binman/README.entries +++ b/tools/binman/README.entries @@ -221,6 +221,18 @@ See README.x86 for information about Intel binary blobs.
+Entry: powerpc-mpc85xx-bootpg-resetvec: Powerpc mpc85xx bootpg + resetvec code for U-Boot +----------------------------------------------------------------------------------------- + +Properties / Entry arguments: + - filename: Filename of u-boot-br.bin (default 'u-boot-br.bin') + +This enrty is valid for Powerpc mpc85xx cpus. This entry holds +'bootpg + resetvec' code for Powerpc mpc85xx CPUs which needs to be +placed at offset 'RESET_VECTOR_ADDRESS - 0xffc'. + + + Entry: section: Entry that contains other entries -------------------------------------------------
@@ -543,7 +555,7 @@ Properties / Entry arguments: - kernelkey: Name of the kernel key to use (inside keydir) - preamble-flags: Value of the vboot preamble flags (typically 0)
-Chromium OS signs the read-write firmware and kernel, writing the signature +Chromium OS signs the read-write firmware and kernel, writing the signature in this block. This allows U-Boot to verify that the next firmware stage and kernel are genuine.
diff --git a/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py b/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py new file mode 100644 index 0000000..37cf408 --- /dev/null +++ b/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2018 NXP +# +# Entry-type module for the Powerpc mpc85xx bootpg and resetvec code for U-Boot +# + +from entry import Entry +from blob import Entry_blob + +class Entry_powerpc_mpc85xx_bootpg_resetvec(Entry_blob): + """Powerpc mpc85xx bootpg + resetvec code for U-Boot + + Properties / Entry arguments: + - filename: Filename of u-boot-br.bin (default 'u-boot-br.bin') + + This enrty is valid for Powerpc mpc85xx cpus. This entry holds + 'bootpg + resetvec' code for Powerpc mpc85xx CPUs which needs to be + placed at offset 'RESET_VECTOR_ADDRESS - 0xffc'. + """ + + def __init__(self, section, etype, node): + Entry_blob.__init__(self, section, etype, node) + + def GetDefaultFilename(self): + return 'u-boot-br.bin' diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index a8456c2..7a6a5ae 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -39,6 +39,7 @@ U_BOOT_SPL_DTB_DATA = 'spldtb' U_BOOT_TPL_DTB_DATA = 'tpldtb' X86_START16_DATA = 'start16' X86_START16_SPL_DATA = 'start16spl' +PPC_MPC85XX_BR_DATA = 'ppcmpc85xxbr' U_BOOT_NODTB_DATA = 'nodtb with microcode pointer somewhere in here' U_BOOT_SPL_NODTB_DATA = 'splnodtb with microcode pointer somewhere in here' FSP_DATA = 'fsp' @@ -90,6 +91,7 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('vga.bin', VGA_DATA) self._ResetDtbs() TestFunctional._MakeInputFile('u-boot-x86-16bit.bin', X86_START16_DATA) + TestFunctional._MakeInputFile('u-boot-br.bin', PPC_MPC85XX_BR_DATA) TestFunctional._MakeInputFile('spl/u-boot-x86-16bit-spl.bin', X86_START16_SPL_DATA) TestFunctional._MakeInputFile('u-boot-nodtb.bin', U_BOOT_NODTB_DATA) @@ -756,6 +758,12 @@ class TestFunctional(unittest.TestCase): data = self._DoReadFile('33_x86-start16.dts') self.assertEqual(X86_START16_DATA, data[:len(X86_START16_DATA)])
+ def testPackPowerpcMpc85xxBootpgResetvec(self): + """Test that an image with powerpc-mpc85xx-bootpg-resetvec can be + created""" + data = self._DoReadFile('80_powerpc_mpc85xx_bootpg_resetvec.dts') + self.assertEqual(PPC_MPC85XX_BR_DATA, data[:len(PPC_MPC85XX_BR_DATA)]) + def _RunMicrocodeTest(self, dts_fname, nodtb_data, ucode_second=False): """Handle running a test for insertion of microcode
diff --git a/tools/binman/test/80_powerpc_mpc85xx_bootpg_resetvec.dts b/tools/binman/test/80_powerpc_mpc85xx_bootpg_resetvec.dts new file mode 100644 index 0000000..8f4b16c --- /dev/null +++ b/tools/binman/test/80_powerpc_mpc85xx_bootpg_resetvec.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + powerpc-mpc85xx-bootpg-resetvec { + }; + }; +};

On Tue, Aug 28, 2018 at 11:53 AM Jagdish Gediya jagdish.gediya@nxp.com wrote:
This entry contains the Powerpc mpc85xx boot page and resetvec
nits: PowerPC
Please fix the title as well
sections.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Updated README for new binman entry - Added test
tools/binman/README.entries | 14 +++++++++++- .../etype/powerpc_mpc85xx_bootpg_resetvec.py | 25 ++++++++++++++++++++++ tools/binman/ftest.py | 8 +++++++ .../test/80_powerpc_mpc85xx_bootpg_resetvec.dts | 16 ++++++++++++++ 4 files changed, 62 insertions(+), 1 deletion(-) create mode 100644 tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py create mode 100644 tools/binman/test/80_powerpc_mpc85xx_bootpg_resetvec.dts
diff --git a/tools/binman/README.entries b/tools/binman/README.entries index c6e7b22..99440d6 100644 --- a/tools/binman/README.entries +++ b/tools/binman/README.entries @@ -221,6 +221,18 @@ See README.x86 for information about Intel binary blobs.
+Entry: powerpc-mpc85xx-bootpg-resetvec: Powerpc mpc85xx bootpg + resetvec code for U-Boot
nits: PowerPC, please fix this globally in this patch
+-----------------------------------------------------------------------------------------
+Properties / Entry arguments:
- filename: Filename of u-boot-br.bin (default 'u-boot-br.bin')
+This enrty is valid for Powerpc mpc85xx cpus. This entry holds +'bootpg + resetvec' code for Powerpc mpc85xx CPUs which needs to be +placed at offset 'RESET_VECTOR_ADDRESS - 0xffc'.
Entry: section: Entry that contains other entries
@@ -543,7 +555,7 @@ Properties / Entry arguments: - kernelkey: Name of the kernel key to use (inside keydir) - preamble-flags: Value of the vboot preamble flags (typically 0)
-Chromium OS signs the read-write firmware and kernel, writing the signature +Chromium OS signs the read-write firmware and kernel, writing the signature in this block. This allows U-Boot to verify that the next firmware stage and kernel are genuine.
diff --git a/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py b/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py new file mode 100644 index 0000000..37cf408 --- /dev/null +++ b/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py @@ -0,0 +1,25 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2018 NXP +# +# Entry-type module for the Powerpc mpc85xx bootpg and resetvec code for U-Boot +#
+from entry import Entry +from blob import Entry_blob
+class Entry_powerpc_mpc85xx_bootpg_resetvec(Entry_blob):
- """Powerpc mpc85xx bootpg + resetvec code for U-Boot
- Properties / Entry arguments:
- filename: Filename of u-boot-br.bin (default 'u-boot-br.bin')
- This enrty is valid for Powerpc mpc85xx cpus. This entry holds
- 'bootpg + resetvec' code for Powerpc mpc85xx CPUs which needs to be
- placed at offset 'RESET_VECTOR_ADDRESS - 0xffc'.
- """
- def __init__(self, section, etype, node):
Entry_blob.__init__(self, section, etype, node)
- def GetDefaultFilename(self):
return 'u-boot-br.bin'
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index a8456c2..7a6a5ae 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -39,6 +39,7 @@ U_BOOT_SPL_DTB_DATA = 'spldtb' U_BOOT_TPL_DTB_DATA = 'tpldtb' X86_START16_DATA = 'start16' X86_START16_SPL_DATA = 'start16spl' +PPC_MPC85XX_BR_DATA = 'ppcmpc85xxbr' U_BOOT_NODTB_DATA = 'nodtb with microcode pointer somewhere in here' U_BOOT_SPL_NODTB_DATA = 'splnodtb with microcode pointer somewhere in here' FSP_DATA = 'fsp' @@ -90,6 +91,7 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('vga.bin', VGA_DATA) self._ResetDtbs() TestFunctional._MakeInputFile('u-boot-x86-16bit.bin', X86_START16_DATA)
TestFunctional._MakeInputFile('u-boot-br.bin', PPC_MPC85XX_BR_DATA) TestFunctional._MakeInputFile('spl/u-boot-x86-16bit-spl.bin', X86_START16_SPL_DATA) TestFunctional._MakeInputFile('u-boot-nodtb.bin', U_BOOT_NODTB_DATA)
@@ -756,6 +758,12 @@ class TestFunctional(unittest.TestCase): data = self._DoReadFile('33_x86-start16.dts') self.assertEqual(X86_START16_DATA, data[:len(X86_START16_DATA)])
- def testPackPowerpcMpc85xxBootpgResetvec(self):
"""Test that an image with powerpc-mpc85xx-bootpg-resetvec can be
created"""
data = self._DoReadFile('80_powerpc_mpc85xx_bootpg_resetvec.dts')
self.assertEqual(PPC_MPC85XX_BR_DATA, data[:len(PPC_MPC85XX_BR_DATA)])
- def _RunMicrocodeTest(self, dts_fname, nodtb_data, ucode_second=False): """Handle running a test for insertion of microcode
diff --git a/tools/binman/test/80_powerpc_mpc85xx_bootpg_resetvec.dts b/tools/binman/test/80_powerpc_mpc85xx_bootpg_resetvec.dts new file mode 100644 index 0000000..8f4b16c --- /dev/null +++ b/tools/binman/test/80_powerpc_mpc85xx_bootpg_resetvec.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright 2018 NXP
- */
+/dts-v1/;
+/ {
#address-cells = <1>;
#size-cells = <1>;
binman {
powerpc-mpc85xx-bootpg-resetvec {
};
};
+};
Regards, Bin

Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- arch/powerpc/Kconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 8faef0b..c727d91 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -20,6 +20,7 @@ config MPC85xx select CREATE_ARCH_SYMLINK select SYS_FSL_DDR select SYS_FSL_DDR_BE + select BINMAN imply CMD_HASH imply CMD_IRQ imply USB_EHCI_HCD if USB

On Tue, Aug 28, 2018 at 11:53 AM Jagdish Gediya jagdish.gediya@nxp.com wrote:
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
arch/powerpc/Kconfig | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Bin Meng bmeng.cn@gmail.com

Below is the sequence to embed dtb inside u-boot, 1. Remove bootpg and resetvec section if needed 2. Append dtb 3. Append bootpg and resetvec section back if removed in step 1
Above procedure is required only when CONFIG_MPC85xx and CONFIG_OF_SEPARATE are defined.
Add new config CONFIG_MPC85XX_HAVE_RESET_VECTOR to indicate that image have resetvec section. step 1 and step 3 described above are required only if this config is y.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- Changes for v2: - Don't change the generic target - Add new config option to use binman
Makefile | 23 ++++++++++++++++++++++- arch/powerpc/cpu/mpc85xx/Kconfig | 4 ++++ 2 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile index b5bf8ab..03baa74 100644 --- a/Makefile +++ b/Makefile @@ -861,6 +861,10 @@ ifneq ($(CONFIG_SYS_INIT_SP_BSS_OFFSET),) ALL-y += init_sp_bss_offset_check endif
+ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy) +ALL-y += u-boot-with-dtb.bin +endif + LDFLAGS_u-boot += $(LDFLAGS_FINAL)
# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards. @@ -983,7 +987,8 @@ spl/u-boot-spl.srec: spl/u-boot-spl FORCE $(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \ - $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) + $(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \ + $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R .resetvec)
binary_size_check: u-boot-nodtb.bin FORCE @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \ @@ -1202,6 +1207,18 @@ u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE $(call if_changed,socboot) endif
+ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy) +u-boot-with-dtb.bin: u-boot.bin u-boot.dtb \ + $(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR), u-boot-br.bin) FORCE + $(call if_changed,binman) + +ifeq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR),y) +OBJCOPYFLAGS_u-boot-br.bin := -O binary -j .bootpg -j .resetvec +u-boot-br.bin: u-boot FORCE + $(call if_changed,objcopy) +endif +endif + # x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including # reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in # the middle. This is handled by binman based on an image description in the @@ -1296,8 +1313,12 @@ spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE ifeq ($(ARCH),arm) UBOOT_BINLOAD := u-boot.img else +ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy) +UBOOT_BINLOAD := u-boot-with-dtb.bin +else UBOOT_BINLOAD := u-boot.bin endif +endif
OBJCOPYFLAGS_u-boot-with-spl-pbl.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \ --gap-fill=0xff diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 19e8d02..7d139ff 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1143,6 +1143,10 @@ config ARCH_T4240 imply CMD_REGINFO imply FSL_SATA
+config MPC85XX_HAVE_RESET_VECTOR + bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc" + depends on MPC85xx + config BOOKE bool default y

On Tue, Aug 28, 2018 at 11:53 AM Jagdish Gediya jagdish.gediya@nxp.com wrote:
Below is the sequence to embed dtb inside u-boot,
nits: U-Boot
- Remove bootpg and resetvec section if needed
- Append dtb
- Append bootpg and resetvec section back if removed in step 1
Above procedure is required only when CONFIG_MPC85xx and CONFIG_OF_SEPARATE are defined.
Add new config CONFIG_MPC85XX_HAVE_RESET_VECTOR to indicate that image have resetvec section. step 1 and step 3 described above are
have -> has. step 1 -> Step 1
required only if this config is y.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Don't change the generic target - Add new config option to use binman
Makefile | 23 ++++++++++++++++++++++- arch/powerpc/cpu/mpc85xx/Kconfig | 4 ++++ 2 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile index b5bf8ab..03baa74 100644 --- a/Makefile +++ b/Makefile @@ -861,6 +861,10 @@ ifneq ($(CONFIG_SYS_INIT_SP_BSS_OFFSET),) ALL-y += init_sp_bss_offset_check endif
+ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy) +ALL-y += u-boot-with-dtb.bin +endif
LDFLAGS_u-boot += $(LDFLAGS_FINAL)
# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards. @@ -983,7 +987,8 @@ spl/u-boot-spl.srec: spl/u-boot-spl FORCE $(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec)
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R .resetvec)
binary_size_check: u-boot-nodtb.bin FORCE @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \ @@ -1202,6 +1207,18 @@ u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE $(call if_changed,socboot) endif
+ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
This looks odd. Both CONFIG_OF_SEPARATE and CONFIG_OF_EMBED should be supported by binman.
+u-boot-with-dtb.bin: u-boot.bin u-boot.dtb \
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR), u-boot-br.bin) FORCE
$(call if_changed,binman)
+ifeq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR),y) +OBJCOPYFLAGS_u-boot-br.bin := -O binary -j .bootpg -j .resetvec +u-boot-br.bin: u-boot FORCE
$(call if_changed,objcopy)
+endif +endif
# x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including # reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in # the middle. This is handled by binman based on an image description in the @@ -1296,8 +1313,12 @@ spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE ifeq ($(ARCH),arm) UBOOT_BINLOAD := u-boot.img else +ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy) +UBOOT_BINLOAD := u-boot-with-dtb.bin +else UBOOT_BINLOAD := u-boot.bin endif +endif
OBJCOPYFLAGS_u-boot-with-spl-pbl.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO) \ --gap-fill=0xff diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 19e8d02..7d139ff 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1143,6 +1143,10 @@ config ARCH_T4240 imply CMD_REGINFO imply FSL_SATA
+config MPC85XX_HAVE_RESET_VECTOR
bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc"
I don't think you want people to turn this option on and off, no? You probably need move the "string" to the help paragraph.
depends on MPC85xx
config BOOKE bool default y --
Regards, Bin

Hi,
-----Original Message----- From: Bin Meng bmeng.cn@gmail.com Sent: Tuesday, August 28, 2018 2:47 PM To: Jagdish Gediya jagdish.gediya@nxp.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Prabhakar Kushwaha prabhakar.kushwaha@nxp.com; York Sun york.sun@nxp.com; Poonam Aggrwal poonam.aggrwal@nxp.com; Simon Glass sjg@chromium.org; Tom Rini trini@konsulko.com Subject: Re: [PATCH v2 6/8] powerpc: mpc85xx: Use binman to embed dtb inside u-boot
On Tue, Aug 28, 2018 at 11:53 AM Jagdish Gediya jagdish.gediya@nxp.com wrote:
Below is the sequence to embed dtb inside u-boot,
nits: U-Boot
- Remove bootpg and resetvec section if needed 2. Append dtb 3.
Append bootpg and resetvec section back if removed in step 1
Above procedure is required only when CONFIG_MPC85xx and CONFIG_OF_SEPARATE are defined.
Add new config CONFIG_MPC85XX_HAVE_RESET_VECTOR to indicate that
image
have resetvec section. step 1 and step 3 described above are
have -> has. step 1 -> Step 1
required only if this config is y.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Don't change the generic target - Add new config option to use binman
Makefile | 23 ++++++++++++++++++++++- arch/powerpc/cpu/mpc85xx/Kconfig | 4 ++++ 2 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile index b5bf8ab..03baa74 100644 --- a/Makefile +++ b/Makefile @@ -861,6 +861,10 @@ ifneq ($(CONFIG_SYS_INIT_SP_BSS_OFFSET),) ALL-y += init_sp_bss_offset_check endif
+ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy) +ALL-y += u-boot-with-dtb.bin +endif
LDFLAGS_u-boot += $(LDFLAGS_FINAL)
# Avoid 'Not enough room for program headers' error on binutils 2.28
onwards.
@@ -983,7 +987,8 @@ spl/u-boot-spl.srec: spl/u-boot-spl FORCE $(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec)
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec) \
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR),-R .bootpg -R
- .resetvec)
binary_size_check: u-boot-nodtb.bin FORCE @file_size=$(shell wc -c u-boot-nodtb.bin | awk '{print $$1}') ; \ @@ -1202,6 +1207,18 @@ u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-
boot.img FORCE
$(call if_changed,socboot)
endif
+ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
This looks odd. Both CONFIG_OF_SEPARATE and CONFIG_OF_EMBED should be supported by binman.
Entry type 'u-boot-dtb-with-ucode' requires file 'u-boot.dtb' which is built only for CONFIG_OF_SEPARATE.
+u-boot-with-dtb.bin: u-boot.bin u-boot.dtb \
$(if $(CONFIG_MPC85XX_HAVE_RESET_VECTOR), u-boot-br.bin)
FORCE
$(call if_changed,binman)
+ifeq ($(CONFIG_MPC85XX_HAVE_RESET_VECTOR),y) +OBJCOPYFLAGS_u-boot-br.bin := -O binary -j .bootpg -j .resetvec +u-boot-br.bin: u-boot FORCE
$(call if_changed,objcopy)
+endif +endif
# x86 uses a large ROM. We fill it with 0xff, put the 16-bit stuff (including # reset vector) at the top, Intel ME descriptor at the bottom, and U-Boot in # the middle. This is handled by binman based on an image description in the @@ -1296,8 +1313,12 @@ spl/u-boot-spl.pbl: spl/u-boot-spl.bin FORCE ifeq ($(ARCH),arm) UBOOT_BINLOAD := u-boot.img else +ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy) +UBOOT_BINLOAD := u-boot-with-dtb.bin +else UBOOT_BINLOAD := u-boot.bin endif +endif
OBJCOPYFLAGS_u-boot-with-spl-pbl.bin = -I binary -O binary --pad-
to=$(CONFIG_SPL_PAD_TO) \
--gap-fill=0xff diff --git
a/arch/powerpc/cpu/mpc85xx/Kconfig
b/arch/powerpc/cpu/mpc85xx/Kconfig
index 19e8d02..7d139ff 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1143,6 +1143,10 @@ config ARCH_T4240 imply CMD_REGINFO imply FSL_SATA
+config MPC85XX_HAVE_RESET_VECTOR
bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS -
0xffc"
I don't think you want people to turn this option on and off, no? You probably need move the "string" to the help paragraph.
This option need to be turned on/off. Only NOR boot have the reset vector and bootpg section at CONFIG_RESET_VECTOR_ADDRESS - 0xffc. Other boot do not have the reset vector but they have the bootpg section at some other address where it don't need to be removed and joined.
This option indicates that reset vector and bootpg sections are placed at CONFIG_RESET_VECTOR_ADDRESS - 0xffc and it need to be turned on/off according to boot device.
depends on MPC85xx
config BOOKE bool default y --
Regards, Bin

Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- Changes for v2: - Remove mpc85xx-u-boot.dtsi - Update u-boot.dtsi to use CONFIG_MPC85XX_HAVE_RESET_VECTOR
arch/powerpc/dts/u-boot.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 arch/powerpc/dts/u-boot.dtsi
diff --git a/arch/powerpc/dts/u-boot.dtsi b/arch/powerpc/dts/u-boot.dtsi new file mode 100644 index 0000000..163e657 --- /dev/null +++ b/arch/powerpc/dts/u-boot.dtsi @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +#include <config.h> + +/ { + binman { + filename = "u-boot-with-dtb.bin"; + skip-at-start = <CONFIG_SYS_TEXT_BASE>; + sort-by-pos; + pad-byte = <0xff>; + size = <CONFIG_SYS_MONITOR_LEN>; + + u-boot-with-ucode-ptr { + offset = <CONFIG_SYS_TEXT_BASE>; + optional-ucode; + }; + + u-boot-dtb-with-ucode { +#ifdef CONFIG_MPC85xx + align = <256>; +#endif + }; +#ifdef CONFIG_MPC85XX_HAVE_RESET_VECTOR + powerpc-mpc85xx-bootpg-resetvec { + offset = <(CONFIG_RESET_VECTOR_ADDRESS - 0xffc)>; + }; +#endif + }; +};

On Tue, Aug 28, 2018 at 11:53 AM Jagdish Gediya jagdish.gediya@nxp.com wrote:
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Remove mpc85xx-u-boot.dtsi - Update u-boot.dtsi to use CONFIG_MPC85XX_HAVE_RESET_VECTOR
arch/powerpc/dts/u-boot.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 arch/powerpc/dts/u-boot.dtsi
Reviewed-by: Bin Meng bmeng.cn@gmail.com

Add device tree for T2080QDS board and enable CONFIG_OF_CONTROL so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com --- Changes for v2: - Enable CONFIG_MPC85XX_HAVE_RESET_VECTOR in T2080QDS_defconfig - README and commit message changes as per Bin Meng's comments
arch/powerpc/dts/Makefile | 2 ++ arch/powerpc/dts/e6500_power_isa.dtsi | 39 ++++++++++++++++++++++ arch/powerpc/dts/t2080.dtsi | 62 +++++++++++++++++++++++++++++++++++ arch/powerpc/dts/t2080qds.dts | 17 ++++++++++ board/freescale/t208xqds/README | 19 +++++++++++ configs/T2080QDS_NAND_defconfig | 3 +- configs/T2080QDS_SDCARD_defconfig | 3 +- configs/T2080QDS_SPIFLASH_defconfig | 3 +- configs/T2080QDS_defconfig | 4 ++- 9 files changed, 148 insertions(+), 4 deletions(-) create mode 100644 arch/powerpc/dts/e6500_power_isa.dtsi create mode 100644 arch/powerpc/dts/t2080.dtsi create mode 100644 arch/powerpc/dts/t2080qds.dts
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile index de14e7b..a19aa56 100644 --- a/arch/powerpc/dts/Makefile +++ b/arch/powerpc/dts/Makefile @@ -1,5 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+
+dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb + targets += $(dtb-y)
# Add any required device tree compiler flags here diff --git a/arch/powerpc/dts/e6500_power_isa.dtsi b/arch/powerpc/dts/e6500_power_isa.dtsi new file mode 100644 index 0000000..1b06170 --- /dev/null +++ b/arch/powerpc/dts/e6500_power_isa.dtsi @@ -0,0 +1,39 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * e6500 Power ISA Device Tree Source (include) + * + * Copyright 2013 Freescale Semiconductor Inc. + * Copyright 2018 NXP + */ + +/ { + cpus { + power-isa-version = "2.06"; + power-isa-b; // Base + power-isa-e; // Embedded + power-isa-atb; // Alternate Time Base + power-isa-cs; // Cache Specification + power-isa-ds; // Decorated Storage + power-isa-e.ed; // Embedded.Enhanced Debug + power-isa-e.pd; // Embedded.External PID + power-isa-e.hv; // Embedded.Hypervisor + power-isa-e.le; // Embedded.Little-Endian + power-isa-e.pm; // Embedded.Performance Monitor + power-isa-e.pc; // Embedded.Processor Control + power-isa-ecl; // Embedded Cache Locking + power-isa-exp; // External Proxy + power-isa-fp; // Floating Point + power-isa-fp.r; // Floating Point.Record + power-isa-mmc; // Memory Coherence + power-isa-scpm; // Store Conditional Page Mobility + power-isa-wt; // Wait + power-isa-64; // 64-bit + power-isa-e.pt; // Embedded.Page Table + power-isa-e.hv.lrat; // Embedded.Hypervisor.LRAT + power-isa-e.em; // Embedded Multi-Threading + power-isa-v; // Vector (AltiVec) + fsl,eref-er; // Enhanced Reservations + fsl,eref-deo; // Data Cache Extended Operations + mmu-type = "power-embedded"; + }; +}; diff --git a/arch/powerpc/dts/t2080.dtsi b/arch/powerpc/dts/t2080.dtsi new file mode 100644 index 0000000..db65ea5 --- /dev/null +++ b/arch/powerpc/dts/t2080.dtsi @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * T2080/T2081 Silicon/SoC Device Tree Source (pre include) + * + * Copyright 2013 Freescale Semiconductor Inc. + * Copyright 2018 NXP + */ + +/dts-v1/; + +/include/ "e6500_power_isa.dtsi" + +/ { + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,e6500@0 { + device_type = "cpu"; + reg = <0 1>; + fsl,portid-mapping = <0x80000000>; + }; + cpu1: PowerPC,e6500@2 { + device_type = "cpu"; + reg = <2 3>; + fsl,portid-mapping = <0x80000000>; + }; + cpu2: PowerPC,e6500@4 { + device_type = "cpu"; + reg = <4 5>; + fsl,portid-mapping = <0x80000000>; + }; + cpu3: PowerPC,e6500@6 { + device_type = "cpu"; + reg = <6 7>; + fsl,portid-mapping = <0x80000000>; + }; + }; + + soc: soc@ffe000000 { + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + + mpic: pic@40000 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <4>; + reg = <0x40000 0x40000>; + compatible = "fsl,mpic"; + device_type = "open-pic"; + clock-frequency = <0x0>; + }; + }; +}; diff --git a/arch/powerpc/dts/t2080qds.dts b/arch/powerpc/dts/t2080qds.dts new file mode 100644 index 0000000..1819a08 --- /dev/null +++ b/arch/powerpc/dts/t2080qds.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * T2080QDS Device Tree Source + * + * Copyright 2013 - 2015 Freescale Semiconductor Inc. + * Copyright 2018 NXP + */ + +/include/ "t2080.dtsi" + +/ { + model = "fsl,T2080QDS"; + compatible = "fsl,T2080QDS"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; +}; diff --git a/board/freescale/t208xqds/README b/board/freescale/t208xqds/README index 2a2a0e5..d690857 100755 --- a/board/freescale/t208xqds/README +++ b/board/freescale/t208xqds/README @@ -272,3 +272,22 @@ How to update the ucode of Freescale FMAN
For more details, please refer to T2080QDS User Guide and access website www.freescale.com and Freescale QorIQ SDK Infocenter document. + +Device tree support and how to enable it for different configs +-------------------------------------------------------------- +Device tree support is available for t2080qds for below mentioned boot, +1. NOR Boot +2. NAND Boot +3. SD Boot +4. SPIFLASH Boot + +To enable device tree support for other boot, below configs need to be +enabled in relative defconfig file, +1. CONFIG_DEFAULT_DEVICE_TREE="t2080qds" (Change default device tree name if required) +2. CONFIG_OF_CONTROL +3. CONFIG_MPC85XX_HAVE_RESET_VECTOR if reset vector is located at + CONFIG_RESET_VECTOR_ADDRESS - 0xffc + +If device tree support is enabled in defconfig, +1. use 'u-boot-with-dtb.bin' for NOR boot. +2. use 'u-boot-with-spl-pbl.bin' for other boot. diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 6b5de4d..4a39cd2 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,6 +36,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -54,4 +56,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index a203582..c89c63d 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -35,6 +36,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -53,4 +55,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 6528eea..b5f960f 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -36,6 +37,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -54,4 +56,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 4a5cbb2..b34a0f5 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -2,6 +2,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y @@ -24,6 +25,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)" +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="t2080qds" CONFIG_ENV_IS_IN_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y @@ -42,4 +45,3 @@ CONFIG_SPI=y CONFIG_FSL_ESPI=y CONFIG_USB=y CONFIG_USB_STORAGE=y -CONFIG_OF_LIBFDT=y

On Tue, Aug 28, 2018 at 11:53 AM Jagdish Gediya jagdish.gediya@nxp.com wrote:
Add device tree for T2080QDS board and enable CONFIG_OF_CONTROL so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Jagdish Gediya jagdish.gediya@nxp.com
Changes for v2: - Enable CONFIG_MPC85XX_HAVE_RESET_VECTOR in T2080QDS_defconfig - README and commit message changes as per Bin Meng's comments
arch/powerpc/dts/Makefile | 2 ++ arch/powerpc/dts/e6500_power_isa.dtsi | 39 ++++++++++++++++++++++ arch/powerpc/dts/t2080.dtsi | 62 +++++++++++++++++++++++++++++++++++ arch/powerpc/dts/t2080qds.dts | 17 ++++++++++ board/freescale/t208xqds/README | 19 +++++++++++ configs/T2080QDS_NAND_defconfig | 3 +- configs/T2080QDS_SDCARD_defconfig | 3 +- configs/T2080QDS_SPIFLASH_defconfig | 3 +- configs/T2080QDS_defconfig | 4 ++- 9 files changed, 148 insertions(+), 4 deletions(-) create mode 100644 arch/powerpc/dts/e6500_power_isa.dtsi create mode 100644 arch/powerpc/dts/t2080.dtsi create mode 100644 arch/powerpc/dts/t2080qds.dts
Reviewed-by: Bin Meng bmeng.cn@gmail.com
participants (3)
-
Bin Meng
-
Jagdish Gediya
-
Simon Glass