These macros should not be put in the generic pci.h header file. Since they are not referenced anywhere, remove them completely.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

include/pci.h | 15 --------------- 1 file changed, 15 deletions(-)

diff --git a/include/pci.h b/include/pci.h index 8e27cbf..427094c 100644 --- a/include/pci.h +++ b/include/pci.h @@ -271,21 +271,6 @@ #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ #define PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled on secondary interface */

-/* From 440ep */ -#define PCI_ERREN 0x48 /* Error Enable */ -#define PCI_ERRSTS 0x49 /* Error Status */ -#define PCI_BRDGOPT1 0x4A /* PCI Bridge Options 1 */ -#define PCI_PLBSESR0 0x4C /* PCI PLB Slave Error Syndrome 0 */ -#define PCI_PLBSESR1 0x50 /* PCI PLB Slave Error Syndrome 1 */ -#define PCI_PLBSEAR 0x54 /* PCI PLB Slave Error Address */ -#define PCI_CAPID 0x58 /* Capability Identifier */ -#define PCI_NEXTITEMPTR 0x59 /* Next Item Pointer */ -#define PCI_PMC 0x5A /* Power Management Capabilities */ -#define PCI_PMCSR 0x5C /* Power Management Control Status */ -#define PCI_PMCSRBSE 0x5E /* PMCSR PCI to PCI Bridge Support Extensions */ -#define PCI_BRDGOPT2 0x60 /* PCI Bridge Options 2 */ -#define PCI_PMSCRR 0x64 /* Power Management State Change Request Re. */ - /* Header type 2 (CardBus bridges) */ #define PCI_CB_CAPABILITY_LIST 0x14 /* 0x15 reserved */

Correct typos in the comment block of uclass_first/next_device_check().

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

include/dm/uclass.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/dm/uclass.h b/include/dm/uclass.h index 9fbaa7d..0e882ce 100644 --- a/include/dm/uclass.h +++ b/include/dm/uclass.h @@ -302,7 +302,7 @@ int uclass_first_device_err(enum uclass_id id, struct udevice **devp); int uclass_next_device(struct udevice **devp);

/** - * uclass_first_device() - Get the first device in a uclass + * uclass_first_device_check() - Get the first device in a uclass * * The device returned is probed if necessary, and ready for use * @@ -318,7 +318,7 @@ int uclass_next_device(struct udevice **devp); int uclass_first_device_check(enum uclass_id id, struct udevice **devp);

/** - * uclass_next_device() - Get the next device in a uclass + * uclass_next_device_check() - Get the next device in a uclass * * The device returned is probed if necessary, and ready for use *

We don't have the live-tree version of fdtdec_get_pci_vendev(). This adds the API.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

drivers/core/ofnode.c | 36 ++++++++++++++++++++++++++++++++++++ include/dm/ofnode.h | 13 +++++++++++++ 2 files changed, 49 insertions(+)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 2937539..0cfb0fb 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -623,6 +623,42 @@ fail: return ret; }

+int ofnode_read_pci_vendev(ofnode node, u16 *vendor, u16 *device) +{ + const char *list, *end; + int len; + + list = ofnode_get_property(node, "compatible", &len); + if (!list) + return -ENOENT; + + end = list + len; + while (list < end) { + len = strlen(list); + if (len >= strlen("pciVVVV,DDDD")) { + char *s = strstr(list, "pci"); + + /* + * check if the string is something like pciVVVV,DDDD.RR + * or just pciVVVV,DDDD + */ + if (s && s[7] == ',' && + (s[12] == '.' || s[12] == 0)) { + s += 3; + *vendor = simple_strtol(s, NULL, 16); + + s += 5; + *device = simple_strtol(s, NULL, 16); + + return 0; + } + } + list += (len + 1); + } + + return -ENOENT; +} + int ofnode_read_addr_cells(ofnode node) { if (ofnode_is_np(node)) diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index cd08a7e..ab36b74 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -586,6 +586,19 @@ int ofnode_read_pci_addr(ofnode node, enum fdt_pci_space type, const char *propname, struct fdt_pci_addr *addr);

/** + * ofnode_read_pci_vendev() - look up PCI vendor and device id + * + * Look at the compatible property of a device node that represents a PCI + * device and extract pci vendor id and device id from it. + * + * @param node node to examine + * @param vendor vendor id of the pci device + * @param device device id of the pci device + * @return 0 if ok, negative on error + */ +int ofnode_read_pci_vendev(ofnode node, u16 *vendor, u16 *device); + +/** * ofnode_read_addr_cells() - Get the number of address cells for a node * * This walks back up the tree to find the closest #address-cells property

Currently only devfn is extracted in child_post_bind(). Now that we have the live-tree version API to look up PCI vendor and device id from the compatible string, let's extract and save them too.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

drivers/pci/pci-uclass.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 46e9c71..b2909a3 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -987,19 +987,18 @@ static int pci_uclass_child_post_bind(struct udevice *dev) if (!dev_of_valid(dev)) return 0;

- /* - * We could read vendor, device, class if available. But for now we - * just check the address. - */ pplat = dev_get_parent_platdata(dev); + + /* Extract vendor id and device id if available */ + ofnode_read_pci_vendev(dev_ofnode(dev), &pplat->vendor, &pplat->device); + + /* Extract the devfn from fdt_pci_addr */ ret = ofnode_read_pci_addr(dev_ofnode(dev), FDT_PCI_SPACE_CONFIG, "reg", &addr); - if (ret) { if (ret != -ENOENT) return -EINVAL; } else { - /* extract the devfn from fdt_pci_addr */ pplat->devfn = addr.phys_hi & 0xff00; }

The flag to control whether to scan multi-function device during enumeration should be cleared at the beginning of each iteration if the device's function number equals to zero.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

drivers/pci/pci-uclass.c | 2 ++ 1 file changed, 2 insertions(+)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index b2909a3..28ea8c5 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -745,6 +745,8 @@ int pci_bind_bus_devices(struct udevice *bus) struct udevice *dev; ulong class;

+ if (!PCI_FUNC(bdf)) + found_multi = false; if (PCI_FUNC(bdf) && !found_multi) continue; /* Check only the first access, we don't expect problems */

The check on uclass_get_device() and device_active() is unnecessary as the follow-up test operations will implicitly probe the driver.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

test/dm/pci.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/test/dm/pci.c b/test/dm/pci.c index 47b5d22..be1208c 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -34,14 +34,12 @@ DM_TEST(dm_test_pci_busnum, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); /* Test that we can use the swapcase device correctly */ static int dm_test_pci_swapcase(struct unit_test_state *uts) { - struct udevice *emul, *swap; + struct udevice *swap; ulong io_addr, mem_addr; char *ptr;

/* Check that asking for the device automatically fires up PCI */ - ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 0, &emul)); ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap)); - ut_assert(device_active(swap));

/* First test I/O */ io_addr = dm_pci_read_bar32(swap, 0);

It's quite common to have more than one device on the same PCI bus. This updates the test case to test such scenario.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

arch/sandbox/dts/test.dts | 7 +++++++ test/dm/pci.c | 37 +++++++++++++++++++++++++++++++++---- 2 files changed, 40 insertions(+), 4 deletions(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 137679a..237266d 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -302,6 +302,13 @@ #size-cells = <2>; ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000 0x01000000 0 0x20000000 0x20000000 0 0x2000>; + pci@0,0 { + compatible = "pci-generic"; + reg = <0x0000 0 0 0 0>; + emul@0,0 { + compatible = "sandbox,swap-case"; + }; + }; pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; diff --git a/test/dm/pci.c b/test/dm/pci.c index be1208c..f2bd52a 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -20,16 +20,24 @@ static int dm_test_pci_base(struct unit_test_state *uts) } DM_TEST(dm_test_pci_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

-/* Test that sandbox PCI bus numbering works correctly */ -static int dm_test_pci_busnum(struct unit_test_state *uts) +/* Test that sandbox PCI bus numbering and device works correctly */ +static int dm_test_pci_busdev(struct unit_test_state *uts) { struct udevice *bus; + struct udevice *emul, *swap;

ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));

+ ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 0, &emul)); + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x00, 0), &swap)); + ut_assert(device_active(swap)); + ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 1, &emul)); + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap)); + ut_assert(device_active(swap)); + return 0; } -DM_TEST(dm_test_pci_busnum, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); +DM_TEST(dm_test_pci_busdev, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

/* Test that we can use the swapcase device correctly */ static int dm_test_pci_swapcase(struct unit_test_state *uts) @@ -38,7 +46,28 @@ static int dm_test_pci_swapcase(struct unit_test_state *uts) ulong io_addr, mem_addr; char *ptr;

- /* Check that asking for the device automatically fires up PCI */ + /* Check that asking for the device 0 automatically fires up PCI */ + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x00, 0), &swap)); + + /* First test I/O */ + io_addr = dm_pci_read_bar32(swap, 0); + outb(2, io_addr); + ut_asserteq(2, inb(io_addr)); + + /* + * Now test memory mapping - note we must unmap and remap to cause + * the swapcase emulation to see our data and response. + */ + mem_addr = dm_pci_read_bar32(swap, 1); + ptr = map_sysmem(mem_addr, 20); + strcpy(ptr, "This is a TesT"); + unmap_sysmem(ptr); + + ptr = map_sysmem(mem_addr, 20); + ut_asserteq_str("tHIS IS A tESt", ptr); + unmap_sysmem(ptr); + + /* Check that asking for the device 1 automatically fires up PCI */ ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));

/* First test I/O */

With the newly added testing of more than one device, we get:

=> ut dm pci_swapcase Test: dm_test_pci_swapcase: pci.c test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr: Expected "tHIS IS A tESt", got "this is a test" Test: dm_test_pci_swapcase: pci.c (flat tree) test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr: Expected "tHIS IS A tESt", got "this is a test" Failures: 2

The failure only happens on the 2nd swap_case device on the PCI bus. The case passes on the 1st device.

It turns out the swap_case driver does not emulate bit#0 in BAR registers as a read-only bit. This corrects the implementation.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

drivers/misc/swap_case.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index b777404..80ccb9f 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -142,6 +142,8 @@ static int sandbox_swap_case_write_config(struct udevice *emul, uint offset,

debug("w bar %d=%lx\n", barnum, value); *bar = value; + /* space indicator (bit#0) is read-only */ + *bar |= barinfo[barnum].type; break; } } @@ -157,11 +159,11 @@ static int sandbox_swap_case_find_bar(struct udevice *emul, unsigned int addr,

for (barnum = 0; barnum < ARRAY_SIZE(barinfo); barnum++) { unsigned int size = barinfo[barnum].size; + u32 base = plat->bar[barnum] & ~PCI_BASE_ADDRESS_SPACE;

- if (addr >= plat->bar[barnum] && - addr < plat->bar[barnum] + size) { + if (addr >= base && addr < base + size) { *barnump = barnum; - *offsetp = addr - plat->bar[barnum]; + *offsetp = addr - base; return 0; } }

So far there is only one PCI host controller in the sandbox test configuration. This is normally the case for x86, but it can be common on other architectures like ARM/PPC to have more than one PCI host controller in the system.

This updates the case to cover such scenario.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

arch/sandbox/dts/test.dts | 28 ++++++++++++++++++++++++++-- test/dm/pci.c | 11 +++++++++++ 2 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 237266d..0bce6d0 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -14,7 +14,8 @@ i2c0 = "/i2c@0"; mmc0 = "/mmc0"; mmc1 = "/mmc1"; - pci0 = &pci; + pci0 = &pci0; + pci1 = &pci1; remoteproc1 = &rproc_1; remoteproc2 = &rproc_2; rtc0 = &rtc_0; @@ -295,7 +296,7 @@ compatible = "sandbox,mmc"; };

- pci: pci-controller { + pci0: pci-controller0 { compatible = "sandbox,pci"; device_type = "pci"; #address-cells = <3>; @@ -318,6 +319,29 @@ }; };

+ pci1: pci-controller1 { + compatible = "sandbox,pci"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 + 0x01000000 0 0x40000000 0x40000000 0 0x2000>; + pci@8,0 { + compatible = "pci-generic"; + reg = <0x4000 0 0 0 0>; + emul@8,0 { + compatible = "sandbox,swap-case"; + }; + }; + pci@c,0 { + compatible = "pci-generic"; + reg = <0x6000 0 0 0 0>; + emul@c,0 { + compatible = "sandbox,swap-case"; + }; + }; + }; + probing { compatible = "simple-bus"; test1 { diff --git a/test/dm/pci.c b/test/dm/pci.c index f2bd52a..727ec34 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -26,6 +26,7 @@ static int dm_test_pci_busdev(struct unit_test_state *uts) struct udevice *bus; struct udevice *emul, *swap;

+ /* Test bus#0 and its devices */ ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));

ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 0, &emul)); @@ -35,6 +36,16 @@ static int dm_test_pci_busdev(struct unit_test_state *uts) ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap)); ut_assert(device_active(swap));

+ /* Test bus#1 and its devices */ + ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus)); + + ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 2, &emul)); + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap)); + ut_assert(device_active(swap)); + ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 3, &emul)); + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap)); + ut_assert(device_active(swap)); + return 0; } DM_TEST(dm_test_pci_busdev, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);

So far we missed the testing for PCI configuration space access.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

test/dm/pci.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-)

diff --git a/test/dm/pci.c b/test/dm/pci.c index 727ec34..089b72e 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -6,6 +6,7 @@ #include <common.h> #include <dm.h> #include <asm/io.h> +#include <asm/test.h> #include <dm/test.h> #include <test/ut.h>

@@ -24,27 +25,32 @@ DM_TEST(dm_test_pci_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); static int dm_test_pci_busdev(struct unit_test_state *uts) { struct udevice *bus; - struct udevice *emul, *swap; + struct udevice *swap; + u16 vendor, device;

/* Test bus#0 and its devices */ ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));

- ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 0, &emul)); ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x00, 0), &swap)); - ut_assert(device_active(swap)); - ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 1, &emul)); + vendor = 0; + ut_assertok(dm_pci_read_config16(swap, PCI_VENDOR_ID, &vendor)); + ut_asserteq(SANDBOX_PCI_VENDOR_ID, vendor); ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap)); - ut_assert(device_active(swap)); + device = 0; + ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device)); + ut_asserteq(SANDBOX_PCI_DEVICE_ID, device);

/* Test bus#1 and its devices */ ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus));

- ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 2, &emul)); ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap)); - ut_assert(device_active(swap)); - ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 3, &emul)); + vendor = 0; + ut_assertok(dm_pci_read_config16(swap, PCI_VENDOR_ID, &vendor)); + ut_asserteq(SANDBOX_PCI_VENDOR_ID, vendor); ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap)); - ut_assert(device_active(swap)); + device = 0; + ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device)); + ut_asserteq(SANDBOX_PCI_DEVICE_ID, device);

return 0; }

At present all emulated sandbox pci devices must be present in the device tree in order to be used. The real world pci uclass driver supports pci device driver matching, and we should add such support on sandbox too.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

doc/driver-model/pci-info.txt | 23 +++++++++++++ drivers/pci/pci-emul-uclass.c | 14 +++++--- drivers/pci/pci_sandbox.c | 78 +++++++++++++++++++++++++++++++++++++++---- include/pci.h | 3 +- 4 files changed, 107 insertions(+), 11 deletions(-)

diff --git a/doc/driver-model/pci-info.txt b/doc/driver-model/pci-info.txt index 52b4389..e67264b 100644 --- a/doc/driver-model/pci-info.txt +++ b/doc/driver-model/pci-info.txt @@ -133,3 +133,26 @@ When this bus is scanned we will end up with something like this:

When accesses go to the pci@1f,0 device they are forwarded to its child, the emulator. + +The sandbox PCI drivers also support dynamic driver binding, allowing device +driver to declare the driver binding information via U_BOOT_PCI_DEVICE(), +eliminating the need to provide any device tree node under the host controller +node. It is required a "sandbox,dev-info" property must be provided in the +host controller node for this functionality to work. + + pci1: pci-controller1 { + compatible = "sandbox,pci"; + ... + sandbox,dev-info = <0x08 0x00 0x1234 0x5678 + 0x0c 0x00 0x1234 0x5678>; + }; + +When this bus is scanned we will end up with something like this: + + pci [ + ] pci_sandbo |-- pci-controller1 + pci_emul [ ] sandbox_sw | |-- sandbox_swap_case_emul + pci_emul [ ] sandbox_sw | `-- sandbox_swap_case_emul + +Note the difference from the statically declared device nodes is that the +device is directly attached to the host controller, instead of via a container +device like pci@1f,0. diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c index 8570a5d..e9d2f49 100644 --- a/drivers/pci/pci-emul-uclass.c +++ b/drivers/pci/pci-emul-uclass.c @@ -16,21 +16,27 @@ struct sandbox_pci_priv { };

int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn, - struct udevice **emulp) + struct udevice **containerp, struct udevice **emulp) { struct udevice *dev; int ret;

+ *containerp = NULL; ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(find_devfn), &dev); if (ret) { debug("%s: Could not find emulator for dev %x\n", __func__, find_devfn); return ret; } + *containerp = dev;

- ret = device_find_first_child(dev, emulp); - if (ret) - return ret; + if (device_get_uclass_id(dev) == UCLASS_PCI_GENERIC) { + ret = device_find_first_child(dev, emulp); + if (ret) + return ret; + } else { + *emulp = dev; + }

return *emulp ? 0 : -ENODEV; } diff --git a/drivers/pci/pci_sandbox.c b/drivers/pci/pci_sandbox.c index 67cd733..119a98d 100644 --- a/drivers/pci/pci_sandbox.c +++ b/drivers/pci/pci_sandbox.c @@ -10,15 +10,27 @@ #include <inttypes.h> #include <pci.h>

+#define FDT_DEV_INFO_CELLS 4 +#define FDT_DEV_INFO_SIZE (FDT_DEV_INFO_CELLS * sizeof(u32)) + +#define SANDBOX_PCI_DEVFN(d, f) ((d << 3) | f) + +struct sandbox_pci_priv { + struct { + u16 vendor; + u16 device; + } vendev[256]; +}; + static int sandbox_pci_write_config(struct udevice *bus, pci_dev_t devfn, uint offset, ulong value, enum pci_size_t size) { struct dm_pci_emul_ops *ops; - struct udevice *emul; + struct udevice *container, *emul; int ret;

- ret = sandbox_pci_get_emul(bus, devfn, &emul); + ret = sandbox_pci_get_emul(bus, devfn, &container, &emul); if (ret) return ret == -ENODEV ? 0 : ret; ops = pci_get_emul_ops(emul); @@ -33,14 +45,31 @@ static int sandbox_pci_read_config(struct udevice *bus, pci_dev_t devfn, enum pci_size_t size) { struct dm_pci_emul_ops *ops; - struct udevice *emul; + struct udevice *container, *emul; + struct sandbox_pci_priv *priv = dev_get_priv(bus); int ret;

/* Prepare the default response */ *valuep = pci_get_ff(size); - ret = sandbox_pci_get_emul(bus, devfn, &emul); - if (ret) - return ret == -ENODEV ? 0 : ret; + ret = sandbox_pci_get_emul(bus, devfn, &container, &emul); + if (ret) { + if (!container) { + u16 vendor, device; + + devfn = SANDBOX_PCI_DEVFN(PCI_DEV(devfn), + PCI_FUNC(devfn)); + vendor = priv->vendev[devfn].vendor; + device = priv->vendev[devfn].device; + if (offset == PCI_VENDOR_ID && vendor) + *valuep = vendor; + else if (offset == PCI_DEVICE_ID && device) + *valuep = device; + + return 0; + } else { + return ret == -ENODEV ? 0 : ret; + } + } ops = pci_get_emul_ops(emul); if (!ops || !ops->read_config) return -ENOSYS; @@ -48,6 +77,41 @@ static int sandbox_pci_read_config(struct udevice *bus, pci_dev_t devfn, return ops->read_config(emul, offset, valuep, size); }

+static int sandbox_pci_probe(struct udevice *dev) +{ + struct sandbox_pci_priv *priv = dev_get_priv(dev); + const fdt32_t *cell; + u8 pdev, pfn, devfn; + int len; + + cell = ofnode_get_property(dev_ofnode(dev), "sandbox,dev-info", &len); + if (!cell) + return 0; + + if ((len % FDT_DEV_INFO_SIZE) == 0) { + int num = len / FDT_DEV_INFO_SIZE; + int i; + + for (i = 0; i < num; i++) { + debug("dev info #%d: %02x %02x %04x %04x\n", i, + fdt32_to_cpu(cell[0]), fdt32_to_cpu(cell[1]), + fdt32_to_cpu(cell[2]), fdt32_to_cpu(cell[3])); + + pdev = fdt32_to_cpu(cell[0]); + pfn = fdt32_to_cpu(cell[1]); + if (pdev > 31 || pfn > 7) + continue; + devfn = SANDBOX_PCI_DEVFN(pdev, pfn); + priv->vendev[devfn].vendor = fdt32_to_cpu(cell[2]); + priv->vendev[devfn].device = fdt32_to_cpu(cell[3]); + + cell += FDT_DEV_INFO_CELLS; + } + } + + return 0; +} + static const struct dm_pci_ops sandbox_pci_ops = { .read_config = sandbox_pci_read_config, .write_config = sandbox_pci_write_config, @@ -63,6 +127,8 @@ U_BOOT_DRIVER(pci_sandbox) = { .id = UCLASS_PCI, .of_match = sandbox_pci_ids, .ops = &sandbox_pci_ops, + .probe = sandbox_pci_probe, + .priv_auto_alloc_size = sizeof(struct sandbox_pci_priv),

/* Attach an emulator if we can */ .child_post_bind = dm_scan_fdt_dev, diff --git a/include/pci.h b/include/pci.h index 427094c..c0ae5d1 100644 --- a/include/pci.h +++ b/include/pci.h @@ -1441,11 +1441,12 @@ struct dm_pci_emul_ops { * * @bus: PCI bus to search * @find_devfn: PCI device and function address (PCI_DEVFN()) + * @containerp: Returns container device if found * @emulp: Returns emulated device if found * @return 0 if found, -ENODEV if not found */ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn, - struct udevice **emulp); + struct udevice **containerp, struct udevice **emulp);

#endif /* CONFIG_DM_PCI */

This adds a U_BOOT_PCI_DEVICE() declaration to the swap_case driver.

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

arch/sandbox/include/asm/test.h | 4 ++++ drivers/misc/swap_case.c | 7 +++++++ 2 files changed, 11 insertions(+)

diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index 08863bf..57aeca8 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -16,6 +16,10 @@ #define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM #define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL

+/* Useful for PCI_VDEVICE() macro */ +#define PCI_VENDOR_ID_SANDBOX SANDBOX_PCI_VENDOR_ID +#define SWAP_CASE_DRV_DATA 0x55aa + #define SANDBOX_CLK_RATE 32768

/* System controller driver data */ diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index 80ccb9f..790bb0c 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -285,3 +285,10 @@ U_BOOT_DRIVER(sandbox_swap_case_emul) = { .priv_auto_alloc_size = sizeof(struct swap_case_priv), .platdata_auto_alloc_size = sizeof(struct swap_case_platdata), }; + +static struct pci_device_id sandbox_swap_case_supported[] = { + { PCI_VDEVICE(SANDBOX, SANDBOX_PCI_DEVICE_ID), SWAP_CASE_DRV_DATA }, + {}, +}; + +U_BOOT_PCI_DEVICE(sandbox_swap_case_emul, sandbox_swap_case_supported);

Signed-off-by: Bin Meng bmeng.cn@gmail.com ---

Changes in v2: None

arch/sandbox/dts/test.dts | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 0bce6d0..44d24f9 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -326,20 +326,8 @@ #size-cells = <2>; ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 0x01000000 0 0x40000000 0x40000000 0 0x2000>; - pci@8,0 { - compatible = "pci-generic"; - reg = <0x4000 0 0 0 0>; - emul@8,0 { - compatible = "sandbox,swap-case"; - }; - }; - pci@c,0 { - compatible = "pci-generic"; - reg = <0x6000 0 0 0 0>; - emul@c,0 { - compatible = "sandbox,swap-case"; - }; - }; + sandbox,dev-info = <0x08 0x00 0x1234 0x5678 + 0x0c 0x00 0x1234 0x5678>; };

probing {

This introduces two new APIs dm_pci_find_capability() and dm_pci_find_ext_capability() to get PCI capability address and PCI express extended capability address for a given PCI device.

Signed-off-by: Bin Meng bmeng.cn@gmail.com

---

Changes in v2: - Mask header_type with 0x7f

drivers/pci/pci-uclass.c | 68 ++++++++++++++++++++++++++++++++++++++++++++++++ include/pci.h | 46 ++++++++++++++++++++++++++++++++ 2 files changed, 114 insertions(+)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 5eb6841..e9671d9 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -1320,6 +1320,74 @@ void *dm_pci_map_bar(struct udevice *dev, int bar, int flags) return dm_pci_bus_to_virt(dev, pci_bus_addr, flags, 0, MAP_NOCACHE); }

+int dm_pci_find_capability(struct udevice *dev, int cap) +{ + u16 status; + u8 header_type; + int ttl = PCI_FIND_CAP_TTL; + u8 id; + u16 ent; + u8 pos; + + dm_pci_read_config16(dev, PCI_STATUS, &status); + if (!(status & PCI_STATUS_CAP_LIST)) + return 0; + + dm_pci_read_config8(dev, PCI_HEADER_TYPE, &header_type); + if ((header_type & 0x7f) == PCI_HEADER_TYPE_CARDBUS) + pos = PCI_CB_CAPABILITY_LIST; + else + pos = PCI_CAPABILITY_LIST; + + dm_pci_read_config8(dev, pos, &pos); + while (ttl--) { + if (pos < PCI_STD_HEADER_SIZEOF) + break; + pos &= ~3; + dm_pci_read_config16(dev, pos, &ent); + + id = ent & 0xff; + if (id == 0xff) + break; + if (id == cap) + return pos; + pos = (ent >> 8); + } + + return 0; +} + +int dm_pci_find_ext_capability(struct udevice *dev, int cap) +{ + u32 header; + int ttl; + int pos = PCI_CFG_SPACE_SIZE; + + /* minimum 8 bytes per capability */ + ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8; + + dm_pci_read_config32(dev, pos, &header); + /* + * If we have no capabilities, this is indicated by cap ID, + * cap version and next pointer all being 0. + */ + if (header == 0) + return 0; + + while (ttl--) { + if (PCI_EXT_CAP_ID(header) == cap) + return pos; + + pos = PCI_EXT_CAP_NEXT(header); + if (pos < PCI_CFG_SPACE_SIZE) + break; + + dm_pci_read_config32(dev, pos, &header); + } + + return 0; +} + UCLASS_DRIVER(pci) = { .id = UCLASS_PCI, .name = "pci", diff --git a/include/pci.h b/include/pci.h index 83a40a5..938a839 100644 --- a/include/pci.h +++ b/include/pci.h @@ -17,6 +17,7 @@ * Under PCI, each device has 256 bytes of configuration address space, * of which the first 64 bytes are standardized as follows: */ +#define PCI_STD_HEADER_SIZEOF 64 #define PCI_VENDOR_ID 0x00 /* 16 bits */ #define PCI_DEVICE_ID 0x02 /* 16 bits */ #define PCI_COMMAND 0x04 /* 16 bits */ @@ -1311,6 +1312,51 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, phys_addr_t addr, */ void *dm_pci_map_bar(struct udevice *dev, int bar, int flags);

+/** + * dm_pci_find_capability() - find a capability + * + * Tell if a device supports a given PCI capability. Returns the + * address of the requested capability structure within the device's + * PCI configuration space or 0 in case the device does not support it. + * + * Possible values for @cap: + * + * %PCI_CAP_ID_MSI Message Signalled Interrupts + * %PCI_CAP_ID_PCIX PCI-X + * %PCI_CAP_ID_EXP PCI Express + * %PCI_CAP_ID_MSIX MSI-X + * + * See PCI_CAP_ID_xxx for the complete capability ID codes. + * + * @dev: PCI device to query + * @cap: capability code + * @return: capability address or 0 if not supported + */ +int dm_pci_find_capability(struct udevice *dev, int cap); + +/** + * dm_pci_find_ext_capability() - find an extended capability + * + * Tell if a device supports a given PCI express extended capability. + * Returns the address of the requested extended capability structure + * within the device's PCI configuration space or 0 in case the device + * does not support it. + * + * Possible values for @cap: + * + * %PCI_EXT_CAP_ID_ERR Advanced Error Reporting + * %PCI_EXT_CAP_ID_VC Virtual Channel + * %PCI_EXT_CAP_ID_DSN Device Serial Number + * %PCI_EXT_CAP_ID_PWR Power Budgeting + * + * See PCI_EXT_CAP_ID_xxx for the complete extended capability ID codes. + * + * @dev: PCI device to query + * @cap: extended capability code + * @return: extended capability address or 0 if not supported + */ +int dm_pci_find_ext_capability(struct udevice *dev, int cap); + #define dm_pci_virt_to_bus(dev, addr, flags) \ dm_pci_phys_to_bus(dev, (virt_to_phys(addr)), (flags)) #define dm_pci_bus_to_virt(dev, addr, flags, len, map_flags) \

Add several PCI capability and extended capability ID registers in the swap_case driver, so that we can add test case for dm_pci_find_capability() and dm_pci_find_ext_capability().

Signed-off-by: Bin Meng bmeng.cn@gmail.com

---

Changes in v2: None

arch/sandbox/include/asm/test.h | 8 ++++++++ drivers/misc/swap_case.c | 21 +++++++++++++++++++++ test/dm/pci.c | 32 ++++++++++++++++++++++++++++++++ 3 files changed, 61 insertions(+)

diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index 57aeca8..c8ae52b 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -16,6 +16,14 @@ #define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM #define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL

+#define PCI_CAP_ID_PM_OFFSET 0x50 +#define PCI_CAP_ID_EXP_OFFSET 0x60 +#define PCI_CAP_ID_MSIX_OFFSET 0x70 + +#define PCI_EXT_CAP_ID_ERR_OFFSET 0x100 +#define PCI_EXT_CAP_ID_VC_OFFSET 0x200 +#define PCI_EXT_CAP_ID_DSN_OFFSET 0x300 + /* Useful for PCI_VDEVICE() macro */ #define PCI_VENDOR_ID_SANDBOX SANDBOX_PCI_VENDOR_ID #define SWAP_CASE_DRV_DATA 0x55aa diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index 790bb0c..bffb809 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -118,6 +118,27 @@ static int sandbox_swap_case_read_config(struct udevice *emul, uint offset, *valuep = result; break; } + case PCI_CAPABILITY_LIST: + *valuep = PCI_CAP_ID_PM_OFFSET; + break; + case PCI_CAP_ID_PM_OFFSET: + *valuep = (PCI_CAP_ID_EXP_OFFSET << 8) | PCI_CAP_ID_PM; + break; + case PCI_CAP_ID_EXP_OFFSET: + *valuep = (PCI_CAP_ID_MSIX_OFFSET << 8) | PCI_CAP_ID_EXP; + break; + case PCI_CAP_ID_MSIX_OFFSET: + *valuep = PCI_CAP_ID_MSIX; + break; + case PCI_EXT_CAP_ID_ERR_OFFSET: + *valuep = (PCI_EXT_CAP_ID_VC_OFFSET << 20) | PCI_EXT_CAP_ID_ERR; + break; + case PCI_EXT_CAP_ID_VC_OFFSET: + *valuep = (PCI_EXT_CAP_ID_DSN_OFFSET << 20) | PCI_EXT_CAP_ID_VC; + break; + case PCI_EXT_CAP_ID_DSN_OFFSET: + *valuep = PCI_EXT_CAP_ID_DSN; + break; }

return 0; diff --git a/test/dm/pci.c b/test/dm/pci.c index e03f6ba..8699700 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -188,3 +188,35 @@ static int dm_test_pci_mixed(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_pci_mixed, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test looking up PCI capability and extended capability */ +static int dm_test_pci_cap(struct unit_test_state *uts) +{ + struct udevice *bus, *swap; + int cap; + + ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus)); + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap)); + + /* look up PCI_CAP_ID_EXP */ + cap = dm_pci_find_capability(swap, PCI_CAP_ID_EXP); + ut_asserteq(PCI_CAP_ID_EXP_OFFSET, cap); + + /* look up PCI_CAP_ID_PCIX */ + cap = dm_pci_find_capability(swap, PCI_CAP_ID_PCIX); + ut_asserteq(0, cap); + + ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus)); + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap)); + + /* look up PCI_EXT_CAP_ID_DSN */ + cap = dm_pci_find_ext_capability(swap, PCI_EXT_CAP_ID_DSN); + ut_asserteq(PCI_EXT_CAP_ID_DSN_OFFSET, cap); + + /* look up PCI_EXT_CAP_ID_SRIOV */ + cap = dm_pci_find_ext_capability(swap, PCI_EXT_CAP_ID_SRIOV); + ut_asserteq(0, cap); + + return 0; +} +DM_TEST(dm_test_pci_cap, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);