[U-Boot] [PATCH v4 0/8] rk3399-puma: Enable PWM regulator for RK3399-Q7
This patch series allows to tune VDD_LOG on RK3399-Q7 Puma boards to a voltage level defined in the DTS using a PWM adjustable regulator.
To do so a reimplemenation of the RK3399 pinctrl driver has been done. Although the new pinctrl driver is written in a way, that we could merge it with other rockchip pinctrl drivers, this is not part of this series.
The effect of the series is, that VDD_LOG will be set to about 950 mV on Puma. This is required to address stability issues on Puma. As a side effect, the pinctrl settings of all RK3399 boards will be configured according to the description in the DTS.
Changes in v4: - Changed patches according to review feedback.
Changes in v3: - Fix message verbosity in pinctrl driver. - Changed patches according to review feedback. - Add patch to enable the full pinctrl driver only for Puma boards.
Changes in v2: - Changed patches according to review feedback. - Fix pinctrl infrastructure instead of hacking board_init() code.
Christoph Muellner (8): rockchip: rk3399-puma: Cleanup of vdd_log DTS entry. power: regulator: Allow PWM regulator to be omitted from SPL. rockchip: rk3399-puma: enable PWM regulator in Puma defconfig. dm: pinctrl: Add pinctrl_decode_pin_config_dm(). rockchip: rk3399: Add improved pinctrl driver. rockchip: rk3399: Add Kconfig option for full pinctrl driver rockchip: rk3399-puma: enable full pinctrl driver in Puma defconfig. rockchip: rk3399-puma: Set VDD_LOG to 950 mV.
arch/arm/dts/rk3399-puma.dtsi | 5 +- configs/puma-rk3399_defconfig | 2 + drivers/pinctrl/Kconfig | 10 ++ drivers/pinctrl/pinctrl-uclass.c | 22 +++ drivers/pinctrl/rockchip/pinctrl_rk3399.c | 236 ++++++++++++++++++++++++++++++ drivers/power/regulator/Kconfig | 7 + drivers/power/regulator/Makefile | 2 +- include/dm/pinctrl.h | 12 ++ 8 files changed, 291 insertions(+), 5 deletions(-)
This patch eliminates the non-standard entries "rockchip,pwm_id" and "rockchip,pwm_voltage". They are neither documented nor read out by any driver.
Additionally it introduces the entry regulator-init-microvolt and sets it to 900 mV, which is the default target value for VDD_LOG.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com ---
Changes in v4: None Changes in v3: None Changes in v2: None
arch/arm/dts/rk3399-puma.dtsi | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index 9a61fbb453..09f7992f65 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -172,10 +172,7 @@ regulator-max-microvolt = <1400000>; regulator-always-on; regulator-boot-on; - - /* for rockchip boot on */ - rockchip,pwm_id= <2>; - rockchip,pwm_voltage = <1000000>; + regulator-init-microvolt = <900000>; }; };
This patch eliminates the non-standard entries "rockchip,pwm_id" and "rockchip,pwm_voltage". They are neither documented nor read out by any driver.
Additionally it introduces the entry regulator-init-microvolt and sets it to 900 mV, which is the default target value for VDD_LOG.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
arch/arm/dts/rk3399-puma.dtsi | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
This patch eliminates the non-standard entries "rockchip,pwm_id" and "rockchip,pwm_voltage". They are neither documented nor read out by any driver.
Additionally it introduces the entry regulator-init-microvolt and sets it to 900 mV, which is the default target value for VDD_LOG.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
arch/arm/dts/rk3399-puma.dtsi | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)
Applied to u-boot-rockchip, thanks!
This patch allows to enable the PWM regulator driver independent for U-Boot and SPL.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com ---
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/power/regulator/Kconfig | 7 +++++++ drivers/power/regulator/Makefile | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig index 09b311de8b..3ed0dd2264 100644 --- a/drivers/power/regulator/Kconfig +++ b/drivers/power/regulator/Kconfig @@ -61,6 +61,13 @@ config REGULATOR_PWM This driver is controlled by a device tree node which includes voltage limits.
+config SPL_REGULATOR_PWM + bool "Enable Driver for PWM regulators in SPL" + depends on REGULATOR_PWM + help + This config enables implementation of driver-model regulator uclass + features for PWM regulators in SPL. + config DM_REGULATOR_MAX77686 bool "Enable Driver Model for REGULATOR MAX77686" depends on DM_REGULATOR && DM_PMIC_MAX77686 diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile index 8017045d54..f617ce723a 100644 --- a/drivers/power/regulator/Makefile +++ b/drivers/power/regulator/Makefile @@ -9,7 +9,7 @@ obj-$(CONFIG_REGULATOR_ACT8846) += act8846.o obj-$(CONFIG_REGULATOR_AS3722) += as3722_regulator.o obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o -obj-$(CONFIG_REGULATOR_PWM) += pwm_regulator.o +obj-$(CONFIG_$(SPL_)REGULATOR_PWM) += pwm_regulator.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_FAN53555) += fan53555.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_FIXED) += fixed.o obj-$(CONFIG_$(SPL_)DM_REGULATOR_GPIO) += gpio-regulator.o
This patch allows to enable the PWM regulator driver independent for U-Boot and SPL.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/power/regulator/Kconfig | 7 +++++++ drivers/power/regulator/Makefile | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
This patch allows to enable the PWM regulator driver independent for U-Boot and SPL.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/power/regulator/Kconfig | 7 +++++++ drivers/power/regulator/Makefile | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-)
Applied to u-boot-rockchip, thanks!
This patch enables the PWM regulator driver in the defconfig for the RK3399-Q7.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com ---
Changes in v4: None Changes in v3: None Changes in v2: None
configs/puma-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index a45a34be31..1afa5a75f9 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -79,6 +79,7 @@ CONFIG_DM_PMIC=y CONFIG_DM_PMIC_FAN53555=y CONFIG_PMIC_RK8XX=y CONFIG_SPL_DM_REGULATOR=y +CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y
This patch enables the PWM regulator driver in the defconfig for the RK3399-Q7.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
configs/puma-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
This patch enables the PWM regulator driver in the defconfig for the RK3399-Q7.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
configs/puma-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+)
Applied to u-boot-rockchip, thanks!
pinctrl_decode_pin_config_dm() is basically a feature-equivalent implementation of pinctrl_decode_pin_config(), which operates on struct udevice devices and uses the dev_read_*() API.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com ---
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/pinctrl/pinctrl-uclass.c | 22 ++++++++++++++++++++++ include/dm/pinctrl.h | 12 ++++++++++++ 2 files changed, 34 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c index 29c910c55f..c8b38d78f6 100644 --- a/drivers/pinctrl/pinctrl-uclass.c +++ b/drivers/pinctrl/pinctrl-uclass.c @@ -27,6 +27,28 @@ int pinctrl_decode_pin_config(const void *blob, int node) return flags; }
+/* + * TODO: this function is temporary for v2019.01. + * It should be renamed to pinctrl_decode_pin_config(), + * the original pinctrl_decode_pin_config() function should + * be removed and all callers of the original function should + * be migrated to use the new one. + */ +int pinctrl_decode_pin_config_dm(struct udevice *dev) +{ + int pinconfig = 0; + + if (dev->uclass->uc_drv->id != UCLASS_PINCONFIG) + return -EINVAL; + + if (dev_read_bool(dev, "bias-pull-up")) + pinconfig |= 1 << PIN_CONFIG_BIAS_PULL_UP; + else if (dev_read_bool(dev, "bias-pull-down")) + pinconfig |= 1 << PIN_CONFIG_BIAS_PULL_DOWN; + + return pinconfig; +} + #if CONFIG_IS_ENABLED(PINCTRL_FULL) /** * pinctrl_config_one() - apply pinctrl settings for a single node diff --git a/include/dm/pinctrl.h b/include/dm/pinctrl.h index 63a7d55b88..ff2b82e7c2 100644 --- a/include/dm/pinctrl.h +++ b/include/dm/pinctrl.h @@ -355,6 +355,18 @@ int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph); int pinctrl_decode_pin_config(const void *blob, int node);
/** + * pinctrl_decode_pin_config_dm() - decode pin configuration flags + * + * This decodes some of the PIN_CONFIG values into flags, with each value + * being (1 << pin_cfg). This does not support things with values like the + * slew rate. + * + * @pinconfig: Pinconfig udevice + * @return decoded flag value, or -ve on error + */ +int pinctrl_decode_pin_config_dm(struct udevice *dev); + +/** * pinctrl_get_gpio_mux() - get the mux value for a particular GPIO * * This allows the raw mux value for a GPIO to be obtained. It is
pinctrl_decode_pin_config_dm() is basically a feature-equivalent implementation of pinctrl_decode_pin_config(), which operates on struct udevice devices and uses the dev_read_*() API.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/pinctrl/pinctrl-uclass.c | 22 ++++++++++++++++++++++ include/dm/pinctrl.h | 12 ++++++++++++ 2 files changed, 34 insertions(+)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
pinctrl_decode_pin_config_dm() is basically a feature-equivalent implementation of pinctrl_decode_pin_config(), which operates on struct udevice devices and uses the dev_read_*() API.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/pinctrl/pinctrl-uclass.c | 22 ++++++++++++++++++++++ include/dm/pinctrl.h | 12 ++++++++++++ 2 files changed, 34 insertions(+)
Applied to u-boot-rockchip, thanks!
The current pinctrl driver for the RK3399 has a range of qulity issues. E.g. it only implements the .set_state_simple() callback, it does not parse the available pinctrl information from the DTS (instead uses hardcoded values), is not flexible enough to cover devices without 'interrupt' field in the DTS (e.g. PWM), is not written generic enough to make code reusable among other rockchip SoCs...
This patch addresses these issues by reimplementing the whole driver from scratch using the .set_state() callback. The new implementation covers all featurese of the old code (i.e. it supports pinmuxing and pullup/pulldown configuration).
This patch has been tested on a RK3399-Q7 SoM (Puma).
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com ---
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/pinctrl/rockchip/pinctrl_rk3399.c | 227 ++++++++++++++++++++++++++++++ 1 file changed, 227 insertions(+)
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c index bc92dd7c06..a1d5e8d0d5 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * (C) 2018 Theobroma Systems Design und Consulting GmbH */
#include <common.h> @@ -14,11 +15,235 @@ #include <asm/arch/clock.h> #include <dm/pinctrl.h>
+static const u32 RK_GRF_P_PULLUP = 1; +static const u32 RK_GRF_P_PULLDOWN = 2; + struct rk3399_pinctrl_priv { struct rk3399_grf_regs *grf; struct rk3399_pmugrf_regs *pmugrf; + struct rockchip_pin_bank *banks; +}; + +/* Location of pinctrl/pinconf registers. */ +enum rk_grf_location { + RK_GRF, + RK_PMUGRF, +}; + +/** + * @nr_pins: number of pins in this bank + * @grf_location: location of pinctrl/pinconf registers + * @bank_num: number of the bank, to account for holes + * @iomux: array describing the 4 iomux sources of the bank + */ +struct rockchip_pin_bank { + u8 nr_pins; + enum rk_grf_location grf_location; + size_t iomux_offset; + size_t pupd_offset; +}; + +#define PIN_BANK(pins, grf, iomux, pupd) \ + { \ + .nr_pins = pins, \ + .grf_location = grf, \ + .iomux_offset = iomux, \ + .pupd_offset = pupd, \ + } + +static struct rockchip_pin_bank rk3399_pin_banks[] = { + PIN_BANK(16, RK_PMUGRF, + offsetof(struct rk3399_pmugrf_regs, gpio0a_iomux), + offsetof(struct rk3399_pmugrf_regs, gpio0_p)), + PIN_BANK(32, RK_PMUGRF, + offsetof(struct rk3399_pmugrf_regs, gpio1a_iomux), + offsetof(struct rk3399_pmugrf_regs, gpio1_p)), + PIN_BANK(32, RK_GRF, + offsetof(struct rk3399_grf_regs, gpio2a_iomux), + offsetof(struct rk3399_grf_regs, gpio2_p)), + PIN_BANK(32, RK_GRF, + offsetof(struct rk3399_grf_regs, gpio3a_iomux), + offsetof(struct rk3399_grf_regs, gpio3_p)), + PIN_BANK(32, RK_GRF, + offsetof(struct rk3399_grf_regs, gpio4a_iomux), + offsetof(struct rk3399_grf_regs, gpio4_p)), };
+static void rk_pinctrl_get_info(uintptr_t base, u32 index, uintptr_t *addr, + u32 *shift, u32 *mask) +{ + /* + * In general we four subsequent 32-bit configuration registers + * per bank (e.g. GPIO2A_P, GPIO2B_P, GPIO2C_P, GPIO2D_P). + * The configuration for each pin has two bits. + * + * @base...contains the address to the first register. + * @index...defines the pin within the bank (0..31). + * @addr...will be the address of the actual register to use + * @shift...will be the bit position in the configuration register + * @mask...will be the (unshifted) mask + */ + + const u32 pins_per_register = 8; + const u32 config_bits_per_pin = 2; + + /* Get the address of the configuration register. */ + *addr = base + (index / pins_per_register) * sizeof(u32); + + /* Get the bit offset within the configuration register. */ + *shift = (index & (pins_per_register - 1)) * config_bits_per_pin; + + /* Get the (unshifted) mask for the configuration pins. */ + *mask = ((1 << config_bits_per_pin) - 1); + + pr_debug("%s: addr=0x%lx, mask=0x%x, shift=0x%x\n", + __func__, *addr, *mask, *shift); +} + +static void rk3399_pinctrl_set_pin_iomux(uintptr_t grf_addr, + struct rockchip_pin_bank *bank, + u32 index, u32 muxval) +{ + uintptr_t iomux_base, addr; + u32 shift, mask; + + iomux_base = grf_addr + bank->iomux_offset; + rk_pinctrl_get_info(iomux_base, index, &addr, &shift, &mask); + + /* Set pinmux register */ + rk_clrsetreg(addr, mask << shift, muxval << shift); +} + +static void rk3399_pinctrl_set_pin_pupd(uintptr_t grf_addr, + struct rockchip_pin_bank *bank, + u32 index, int pinconfig) +{ + uintptr_t pupd_base, addr; + u32 shift, mask, pupdval; + + /* Fast path in case there's nothing to do. */ + if (!pinconfig) + return; + + if (pinconfig & (1 << PIN_CONFIG_BIAS_PULL_UP)) + pupdval = RK_GRF_P_PULLUP; + else if (pinconfig & (1 << PIN_CONFIG_BIAS_PULL_DOWN)) + pupdval = RK_GRF_P_PULLDOWN; + else + /* Flag not supported. */ + pr_warn("%s: Unsupported pinconfig flag: 0x%x\n", __func__, + pinconfig); + return; + + pupd_base = grf_addr + (uintptr_t)bank->pupd_offset; + rk_pinctrl_get_info(pupd_base, index, &addr, &shift, &mask); + + /* Set pull-up/pull-down regisrer */ + rk_clrsetreg(addr, mask << shift, pupdval << shift); +} + +static int rk3399_pinctrl_set_pin(struct udevice *dev, u32 banknum, u32 index, + u32 muxval, int pinconfig) +{ + struct rk3399_pinctrl_priv *priv = dev_get_priv(dev); + struct rockchip_pin_bank *bank = &priv->banks[banknum]; + uintptr_t grf_addr; + + pr_debug("%s: 0x%x 0x%x 0x%x 0x%x\n", __func__, banknum, index, muxval, + pinconfig); + + if (bank->grf_location == RK_GRF) + grf_addr = (uintptr_t)priv->grf; + else if (bank->grf_location == RK_PMUGRF) + grf_addr = (uintptr_t)priv->pmugrf; + else + return -EINVAL; + + rk3399_pinctrl_set_pin_iomux(grf_addr, bank, index, muxval); + + rk3399_pinctrl_set_pin_pupd(grf_addr, bank, index, pinconfig); + return 0; +} + +static int rk3399_pinctrl_set_state(struct udevice *dev, struct udevice *config) +{ + /* + * The order of the fields in this struct must match the order of + * the fields in the "rockchip,pins" property. + */ + struct rk_pin { + u32 banknum; + u32 index; + u32 muxval; + u32 phandle; + } __packed; + + u32 *fields = NULL; + const int fields_per_pin = 4; + int num_fields, num_pins; + int ret; + int size; + int i; + struct rk_pin *pin; + + pr_debug("%s: %s\n", __func__, config->name); + + size = dev_read_size(config, "rockchip,pins"); + if (size < 0) + return -EINVAL; + + num_fields = size / sizeof(u32); + num_pins = num_fields / fields_per_pin; + + if (num_fields * sizeof(u32) != size || + num_pins * fields_per_pin != num_fields) { + pr_warn("Invalid number of rockchip,pins fields.\n"); + return -EINVAL; + } + + fields = calloc(num_fields, sizeof(u32)); + if (!fields) + return -ENOMEM; + + ret = dev_read_u32_array(config, "rockchip,pins", fields, num_fields); + if (ret) { + pr_warn("%s: Failed to read rockchip,pins fields.\n", + config->name); + goto end; + } + + pin = (struct rk_pin *)fields; + for (i = 0; i < num_pins; i++, pin++) { + struct udevice *dev_pinconfig; + int pinconfig; + + ret = uclass_get_device_by_phandle_id(UCLASS_PINCONFIG, + pin->phandle, + &dev_pinconfig); + if (ret) { + pr_debug("Could not get pinconfig device\n"); + goto end; + } + + pinconfig = pinctrl_decode_pin_config_dm(dev_pinconfig); + if (pinconfig < 0) { + pr_warn("Could not parse pinconfig\n"); + goto end; + } + + ret = rk3399_pinctrl_set_pin(dev, pin->banknum, pin->index, + pin->muxval, pinconfig); + if (ret) { + pr_warn("Could not set pinctrl settings\n"); + goto end; + } + } + +end: + free(fields); + return ret; +} + static void pinctrl_rk3399_pwm_config(struct rk3399_grf_regs *grf, struct rk3399_pmugrf_regs *pmugrf, int pwm_id) { @@ -468,6 +693,7 @@ static int rk3399_pinctrl_set_state_simple(struct udevice *dev, }
static struct pinctrl_ops rk3399_pinctrl_ops = { + .set_state = rk3399_pinctrl_set_state, .set_state_simple = rk3399_pinctrl_set_state_simple, .request = rk3399_pinctrl_request, .get_periph_id = rk3399_pinctrl_get_periph_id, @@ -481,6 +707,7 @@ static int rk3399_pinctrl_probe(struct udevice *dev) priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); debug("%s: grf=%p, pmugrf=%p\n", __func__, priv->grf, priv->pmugrf); + priv->banks = rk3399_pin_banks;
return ret; }
The current pinctrl driver for the RK3399 has a range of qulity issues. E.g. it only implements the .set_state_simple() callback, it does not parse the available pinctrl information from the DTS (instead uses hardcoded values), is not flexible enough to cover devices without 'interrupt' field in the DTS (e.g. PWM), is not written generic enough to make code reusable among other rockchip SoCs...
This patch addresses these issues by reimplementing the whole driver from scratch using the .set_state() callback. The new implementation covers all featurese of the old code (i.e. it supports pinmuxing and pullup/pulldown configuration).
This patch has been tested on a RK3399-Q7 SoM (Puma).
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/pinctrl/rockchip/pinctrl_rk3399.c | 227 ++++++++++++++++++++++++++++++ 1 file changed, 227 insertions(+)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
The current pinctrl driver for the RK3399 has a range of qulity issues. E.g. it only implements the .set_state_simple() callback, it does not parse the available pinctrl information from the DTS (instead uses hardcoded values), is not flexible enough to cover devices without 'interrupt' field in the DTS (e.g. PWM), is not written generic enough to make code reusable among other rockchip SoCs...
This patch addresses these issues by reimplementing the whole driver from scratch using the .set_state() callback. The new implementation covers all featurese of the old code (i.e. it supports pinmuxing and pullup/pulldown configuration).
This patch has been tested on a RK3399-Q7 SoM (Puma).
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/pinctrl/rockchip/pinctrl_rk3399.c | 227 ++++++++++++++++++++++++++++++ 1 file changed, 227 insertions(+)
Applied to u-boot-rockchip, thanks!
This patch adds a Kconfig option to enable the full pinctrl driver for the RK3399. This flag needs to be enabed in order to get the features of the full pinctrl driver compiled in (i.e. a .set_state() callback).
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com ---
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/pinctrl/Kconfig | 10 ++++++++++ drivers/pinctrl/rockchip/pinctrl_rk3399.c | 9 +++++++++ 2 files changed, 19 insertions(+)
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 1dbe2b104b..30a6aa6ee8 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -238,6 +238,16 @@ config PINCTRL_ROCKCHIP_RK3399 the GPIO definitions and pin control functions for each available multiplex function.
+config PINCTRL_ROCKCHIP_RK3399_FULL + bool "Rockchip rk3399 pin control driver (full)" + depends on PINCTRL_FULL && PINCTRL_ROCKCHIP_RK3399 + help + Support full pin multiplexing control on Rockchip rk3399 SoCs. + + This enables the full pinctrl driver for the RK3399. + Contrary to the non-full pinctrl driver, this will evaluate + the board DTB to get the pinctrl settings. + config PINCTRL_ROCKCHIP_RV1108 bool "Rockchip rv1108 pin control driver" depends on DM diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3399.c b/drivers/pinctrl/rockchip/pinctrl_rk3399.c index a1d5e8d0d5..c4746b0122 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3399.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3399.c @@ -15,8 +15,10 @@ #include <asm/arch/clock.h> #include <dm/pinctrl.h>
+#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) static const u32 RK_GRF_P_PULLUP = 1; static const u32 RK_GRF_P_PULLDOWN = 2; +#endif /* PINCTRL_ROCKCHIP_RK3399_FULL */
struct rk3399_pinctrl_priv { struct rk3399_grf_regs *grf; @@ -24,6 +26,7 @@ struct rk3399_pinctrl_priv { struct rockchip_pin_bank *banks; };
+#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) /* Location of pinctrl/pinconf registers. */ enum rk_grf_location { RK_GRF, @@ -244,6 +247,8 @@ end: return ret; }
+#endif /* PINCTRL_ROCKCHIP_RK3399_FULL */ + static void pinctrl_rk3399_pwm_config(struct rk3399_grf_regs *grf, struct rk3399_pmugrf_regs *pmugrf, int pwm_id) { @@ -693,7 +698,9 @@ static int rk3399_pinctrl_set_state_simple(struct udevice *dev, }
static struct pinctrl_ops rk3399_pinctrl_ops = { +#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) .set_state = rk3399_pinctrl_set_state, +#endif .set_state_simple = rk3399_pinctrl_set_state_simple, .request = rk3399_pinctrl_request, .get_periph_id = rk3399_pinctrl_get_periph_id, @@ -707,7 +714,9 @@ static int rk3399_pinctrl_probe(struct udevice *dev) priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); priv->pmugrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); debug("%s: grf=%p, pmugrf=%p\n", __func__, priv->grf, priv->pmugrf); +#if CONFIG_IS_ENABLED(PINCTRL_ROCKCHIP_RK3399_FULL) priv->banks = rk3399_pin_banks; +#endif /* PINCTRL_ROCKCHIP_RK3399_FULL */
return ret; }
This patch adds a Kconfig option to enable the full pinctrl driver for the RK3399. This flag needs to be enabed in order to get the features of the full pinctrl driver compiled in (i.e. a .set_state() callback).
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/pinctrl/Kconfig | 10 ++++++++++ drivers/pinctrl/rockchip/pinctrl_rk3399.c | 9 +++++++++ 2 files changed, 19 insertions(+)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
This patch adds a Kconfig option to enable the full pinctrl driver for the RK3399. This flag needs to be enabed in order to get the features of the full pinctrl driver compiled in (i.e. a .set_state() callback).
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
drivers/pinctrl/Kconfig | 10 ++++++++++ drivers/pinctrl/rockchip/pinctrl_rk3399.c | 9 +++++++++ 2 files changed, 19 insertions(+)
Applied to u-boot-rockchip, thanks!
This patch enables the full pinctrl driver in the defconfig for the RK3399-Q7.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com ---
Changes in v4: None Changes in v3: None Changes in v2: None
configs/puma-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 1afa5a75f9..3c293b69e4 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -75,6 +75,7 @@ CONFIG_GMAC_ROCKCHIP=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_ROCKCHIP_RK3399=y +CONFIG_PINCTRL_ROCKCHIP_RK3399_FULL=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_FAN53555=y CONFIG_PMIC_RK8XX=y
This patch enables the full pinctrl driver in the defconfig for the RK3399-Q7.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
configs/puma-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
This patch enables the full pinctrl driver in the defconfig for the RK3399-Q7.
Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v4: None Changes in v3: None Changes in v2: None
configs/puma-rk3399_defconfig | 1 + 1 file changed, 1 insertion(+)
Applied to u-boot-rockchip, thanks!
This patch sets VDD_LOG to 950 mV on RK3399-Q7. This is required to address stability issues on Puma in heavy-load use-cases.
Reported-by: Assaf Agmon assaf@r-go.io Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com
---
Changes in v4: - Changed patches according to review feedback.
Changes in v3: - Fix message verbosity in pinctrl driver. - Changed patches according to review feedback. - Add patch to enable the full pinctrl driver only for Puma boards.
Changes in v2: - Changed patches according to review feedback. - Fix pinctrl infrastructure instead of hacking board_init() code.
arch/arm/dts/rk3399-puma.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi index 09f7992f65..8304f67192 100644 --- a/arch/arm/dts/rk3399-puma.dtsi +++ b/arch/arm/dts/rk3399-puma.dtsi @@ -172,7 +172,7 @@ regulator-max-microvolt = <1400000>; regulator-always-on; regulator-boot-on; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <950000>; }; };
This patch sets VDD_LOG to 950 mV on RK3399-Q7. This is required to address stability issues on Puma in heavy-load use-cases.
Reported-by: Assaf Agmon assaf@r-go.io Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com
Changes in v4:
- Changed patches according to review feedback.
Changes in v3:
- Fix message verbosity in pinctrl driver.
- Changed patches according to review feedback.
- Add patch to enable the full pinctrl driver only for Puma boards.
Changes in v2:
- Changed patches according to review feedback.
- Fix pinctrl infrastructure instead of hacking board_init() code.
arch/arm/dts/rk3399-puma.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
This patch sets VDD_LOG to 950 mV on RK3399-Q7. This is required to address stability issues on Puma in heavy-load use-cases.
Reported-by: Assaf Agmon assaf@r-go.io Signed-off-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Signed-off-by: Christoph Muellner christoph.muellner@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
Changes in v4:
- Changed patches according to review feedback.
Changes in v3:
- Fix message verbosity in pinctrl driver.
- Changed patches according to review feedback.
- Add patch to enable the full pinctrl driver only for Puma boards.
Changes in v2:
- Changed patches according to review feedback.
- Fix pinctrl infrastructure instead of hacking board_init() code.
arch/arm/dts/rk3399-puma.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to u-boot-rockchip, thanks!
participants (2)
-
Christoph Muellner -
Philipp Tomsich