On Tue, 5 Oct 2021 17:58:20 +0200 Manuel Dipolt manuel.dipolt@robart.cc wrote:

Hi Manuel,

This patch enables clock for the r_pio gpios for the h3 r_pio is required to access gpios from port L

Better, but it would be good to know what this actually allows (LEDs)?

And while some of the whitespace issues are fixed, they are still plenty left, in drivers/clk/sunxi/clk_h3-r.c.

But anyway, it seems like Samuel beat you to it, and support for the clock is now merged, in drivers/clk/sunxi/clk_a31_r.c. Check the latest master.

But this still does not enable the clock for the GPIO driver, it seems. Can you check this again, and then re-send just the missing part?

Thanks, Andre

Signed-off-by: Manuel Dipolt manuel.dipolt@robart.cc

drivers/clk/sunxi/Makefile | 1 + drivers/clk/sunxi/clk_h3-r.c | 51 ++++++++++++++++++++++++++++++++++++ drivers/gpio/sunxi_gpio.c | 8 ++++++ 3 files changed, 60 insertions(+) create mode 100644 drivers/clk/sunxi/clk_h3-r.c

diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile index 4f9282a8b9..92414c8217 100644 --- a/drivers/clk/sunxi/Makefile +++ b/drivers/clk/sunxi/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o +obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3-r.o obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o obj-$(CONFIG_CLK_SUN50I_H616) += clk_h616.o obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o diff --git a/drivers/clk/sunxi/clk_h3-r.c b/drivers/clk/sunxi/clk_h3-r.c new file mode 100644 index 0000000000..aed35149bf --- /dev/null +++ b/drivers/clk/sunxi/clk_h3-r.c @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/*

• • Copyright (C) 2021 RobArt GmbH
• • Author: Manuel Dipolt manuel.dipolt@robart.cc
• */

+#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <errno.h> +#include <asm/arch/ccu.h> +#include <dt-bindings/clock/sun8i-r-ccu.h> +#include <dt-bindings/reset/sun8i-r-ccu.h>

+static struct ccu_clk_gate h3_r_gates[] = {

• [CLK_APB0_PIO] = GATE(0x28, BIT(0)),

+};

+static struct ccu_reset h3_r_resets[] = {

• [RST_APB0_IR] = RESET(0x0b0, BIT(2)),
• [RST_APB0_TIMER] = RESET(0x0b0, BIT(3)),
• [RST_APB0_UART] = RESET(0x0b0, BIT(4)),
• [RST_APB0_I2C] = RESET(0x0b0, BIT(6)),

+};

+static const struct ccu_desc h3_r_ccu_desc = {

• .gates = h3_r_gates,
• .resets = h3_r_resets,

+};

+static int h3_r_clk_bind(struct udevice *dev) +{

• return sunxi_reset_bind(dev, ARRAY_SIZE(h3_r_resets));

+}

+static const struct udevice_id h3_r_ccu_ids[] = {

• { .compatible = "allwinner,sun8i-h3-r-ccu",
• .data = (ulong)&h3_r_ccu_desc },
• { }

+};

+U_BOOT_DRIVER(clk_sun8i_h3_r) = {

• .name = "sun8i_h3-r_ccu",
• .id = UCLASS_CLK,
• .of_match = h3_r_ccu_ids,
• .priv_auto = sizeof(struct ccu_priv),
• .ops = &sunxi_clk_ops,
• .probe = sunxi_clk_probe,
• .bind = h3_r_clk_bind,

+};

diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c index 24cb604e3e..884955368f 100644 --- a/drivers/gpio/sunxi_gpio.c +++ b/drivers/gpio/sunxi_gpio.c @@ -14,6 +14,7 @@ #include <errno.h> #include <fdtdec.h> #include <malloc.h> +#include <clk.h> #include <asm/arch/gpio.h> #include <asm/io.h> #include <asm/gpio.h> @@ -262,6 +263,13 @@ static int gpio_sunxi_probe(struct udevice *dev) { struct sunxi_gpio_plat *plat = dev_get_plat(dev); struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);

• struct clk gate_clk;

• int ret;

• ret = clk_get_by_name(dev, "apb", &gate_clk);

• if (!ret)

• clk_enable(&gate_clk);
  
  

  /* Tell the uclass how many GPIOs we have */ if (plat) {