[PATCH 0/2] arm: k3-j721e: Fix uart boot
This series fixes uart boot on j721e SoC
Lokesh Vutla (2): arm: dts: k3-j721e-r5-common-proc-board: Disable power-domains for mcu uart configs: j721e_evm_r5: Enable early cons
arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 4 ++++ configs/j721e_evm_r5_defconfig | 1 + 2 files changed, 5 insertions(+)
mcu uart will be used during uart boot for loading sysfw.itb. Since sysfw is not yet available during uart load, power-domain cannot be enabled. We need to rely on ROM for doing that, so disable power-domains and clocks for mcu uart. Also fix the mcu uart frequency.
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com --- arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index 28a355d49c..64c31e23ca 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -143,9 +143,13 @@ };
&mcu_uart0 { + /delete-property/ power-domains; + /delete-property/ clocks; + /delete-property/ clock-names; pinctrl-names = "default"; pinctrl-0 = <&mcu_uart0_pins_default>; status = "okay"; + clock-frequency = <48000000>; };
&main_uart0 {
Early cons will be used in uart boot. Enable the same for j721e_r5
Signed-off-by: Lokesh Vutla lokeshvutla@ti.com --- configs/j721e_evm_r5_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index a90ab62195..b310eca932 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x55000 CONFIG_SOC_K3_J721E=y +CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_J721E_R5_EVM=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000
participants (1)
-
Lokesh Vutla