[PATCH v2] riscv: spacemit: k1: probe dram size during boot phase.

--- This patch introduce improvement for get dram size on bananapi BPI-F3, retrieving the dram size dynamically. Have tested on bananapi Licheepi LPI3A 8G[1].
Links: [1] https://gist.github.com/per1cycle/e4eab66ebb6f83fe5118e823367fce28 .
Changes in v2: - Fix bracker and return type in map_format_size() function. - Add test log in the cover letter.. - Link to v1: https://lore.kernel.org/r/20250108-get-dram-size-v1-1-4bae32ecf756@per1cycle...
Signed-off-by: Huan Zhou me@per1cycle.org Tested-by: Marcel Ziswiler marcel@ziswiler.com # BPI-F3 16G --- arch/riscv/cpu/k1/dram.c | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/cpu/k1/dram.c b/arch/riscv/cpu/k1/dram.c index c477c15cbfb19f0e3a0ee72985b602f5bda352d7..4140440255fa1b3dbae521c58c6809445499a463 100644 --- a/arch/riscv/cpu/k1/dram.c +++ b/arch/riscv/cpu/k1/dram.c @@ -4,17 +4,53 @@ */
#include <asm/global_data.h> +#include <asm/io.h> #include <config.h> +#include <bitfield.h> #include <fdt_support.h> #include <linux/sizes.h>
+#define DDR_BASE 0xC0000000 DECLARE_GLOBAL_DATA_PTR;
+static inline phys_size_t map_format_size(u32 val) +{ + u32 tmp; + + if (!(val & 0x1)) + return 0; + + tmp = bitfield_extract(val, 16, 5); + switch (tmp) { + case 0xd: + return 512; + case 0xe: + return 1024; + case 0xf: + return 2048; + case 0x10: + return 4096; + case 0x11: + return 8192; + default: + pr_info("Invalid DRAM density %x\n", val); + return 0; + } +} + +phys_size_t ddr_get_density(void) +{ + phys_size_t cs0_size = map_format_size(readl((void *)DDR_BASE + 0x200)); + phys_size_t cs1_size = map_format_size(readl((void *)DDR_BASE + 0x208)); + phys_size_t ddr_size = cs0_size + cs1_size; + + return ddr_size; +} + int dram_init(void) { gd->ram_base = CFG_SYS_SDRAM_BASE; - /* TODO get ram size from ddr controller */ - gd->ram_size = SZ_4G; + gd->ram_size = ddr_get_density() * SZ_1M; return 0; }
--- base-commit: 19fc0b7f7d907119a13e9c207991899f0817f8fc change-id: 20250108-get-dram-size-65cf59a15201
Best regards,

sry for the delay, i was setting my homelab these day.
On Tue, Jan 14, 2025 at 01:10:42PM +0800, Huan Zhou wrote:
these content is from the cover letter and imo should be ignore during patch step.
This patch introduce improvement for get dram size on bananapi BPI-F3, retrieving the dram size dynamically. Have tested on bananapi Licheepi LPI3A 8G[1].
Links: [1] https://gist.github.com/per1cycle/e4eab66ebb6f83fe5118e823367fce28 .
Changes in v2:
- Fix bracker and return type in map_format_size() function.
- Add test log in the cover letter..
- Link to v1: https://lore.kernel.org/r/20250108-get-dram-size-v1-1-4bae32ecf756@per1cycle...
Signed-off-by: Huan Zhou me@per1cycle.org Tested-by: Marcel Ziswiler marcel@ziswiler.com # BPI-F3 16G
arch/riscv/cpu/k1/dram.c | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/cpu/k1/dram.c b/arch/riscv/cpu/k1/dram.c index c477c15cbfb19f0e3a0ee72985b602f5bda352d7..4140440255fa1b3dbae521c58c6809445499a463 100644 --- a/arch/riscv/cpu/k1/dram.c +++ b/arch/riscv/cpu/k1/dram.c @@ -4,17 +4,53 @@ */
#include <asm/global_data.h> +#include <asm/io.h> #include <config.h> +#include <bitfield.h> #include <fdt_support.h> #include <linux/sizes.h>
+#define DDR_BASE 0xC0000000 DECLARE_GLOBAL_DATA_PTR;
+static inline phys_size_t map_format_size(u32 val) +{
- u32 tmp;
- if (!(val & 0x1))
return 0;
- tmp = bitfield_extract(val, 16, 5);
- switch (tmp) {
- case 0xd:
return 512;
- case 0xe:
return 1024;
- case 0xf:
return 2048;
- case 0x10:
return 4096;
- case 0x11:
return 8192;
- default:
pr_info("Invalid DRAM density %x\n", val);
return 0;
- }
+}
+phys_size_t ddr_get_density(void) +{
- phys_size_t cs0_size = map_format_size(readl((void *)DDR_BASE + 0x200));
- phys_size_t cs1_size = map_format_size(readl((void *)DDR_BASE + 0x208));
- phys_size_t ddr_size = cs0_size + cs1_size;
- return ddr_size;
+}
int dram_init(void) { gd->ram_base = CFG_SYS_SDRAM_BASE;
- /* TODO get ram size from ddr controller */
- gd->ram_size = SZ_4G;
- gd->ram_size = ddr_get_density() * SZ_1M; return 0;
}
base-commit: 19fc0b7f7d907119a13e9c207991899f0817f8fc change-id: 20250108-get-dram-size-65cf59a15201
Best regards,
Huan Zhou me@per1cycle.org

Hi Huan
On 13:13 Tue 14 Jan , Huan Zhou wrote:
sry for the delay, i was setting my homelab these day.
On Tue, Jan 14, 2025 at 01:10:42PM +0800, Huan Zhou wrote:
these content is from the cover letter and imo should be ignore during patch step.
still wrong, at least tags will be lost
IMO, it would be better to have some commit message
This patch introduce improvement for get dram size on bananapi BPI-F3,
the patch for k1 SoC, it should be board agnostic ~~~~~~~~~~~~~~~~
retrieving the dram size dynamically. Have tested on bananapi Licheepi LPI3A 8G[1].
Links: [1] https://gist.github.com/per1cycle/e4eab66ebb6f83fe5118e823367fce28 .
Changes in v2:
- Fix bracker and return type in map_format_size() function.
- Add test log in the cover letter..
- Link to v1: https://lore.kernel.org/r/20250108-get-dram-size-v1-1-4bae32ecf756@per1cycle...
..
Signed-off-by: Huan Zhou me@per1cycle.org Tested-by: Marcel Ziswiler marcel@ziswiler.com # BPI-F3 16G
here lost
arch/riscv/cpu/k1/dram.c | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/cpu/k1/dram.c b/arch/riscv/cpu/k1/dram.c index c477c15cbfb19f0e3a0ee72985b602f5bda352d7..4140440255fa1b3dbae521c58c6809445499a463 100644 --- a/arch/riscv/cpu/k1/dram.c +++ b/arch/riscv/cpu/k1/dram.c @@ -4,17 +4,53 @@ */
#include <asm/global_data.h> +#include <asm/io.h> #include <config.h> +#include <bitfield.h> #include <fdt_support.h> #include <linux/sizes.h>
+#define DDR_BASE 0xC0000000 DECLARE_GLOBAL_DATA_PTR;
+static inline phys_size_t map_format_size(u32 val)
I don't think it's necessary to use inline, it's not that short so personally I would drop it
+{
- u32 tmp;
- if (!(val & 0x1))
return 0;
- tmp = bitfield_extract(val, 16, 5);
- switch (tmp) {
- case 0xd:
return 512;
- case 0xe:
return 1024;
- case 0xf:
return 2048;
- case 0x10:
return 4096;
- case 0x11:
return 8192;
- default:
pr_info("Invalid DRAM density %x\n", val);
return 0;
- }
+}
+phys_size_t ddr_get_density(void) +{
- phys_size_t cs0_size = map_format_size(readl((void *)DDR_BASE + 0x200));
- phys_size_t cs1_size = map_format_size(readl((void *)DDR_BASE + 0x208));
- phys_size_t ddr_size = cs0_size + cs1_size;
- return ddr_size;
+}
int dram_init(void) { gd->ram_base = CFG_SYS_SDRAM_BASE;
- /* TODO get ram size from ddr controller */
- gd->ram_size = SZ_4G;
- gd->ram_size = ddr_get_density() * SZ_1M; return 0;
}
base-commit: 19fc0b7f7d907119a13e9c207991899f0817f8fc change-id: 20250108-get-dram-size-65cf59a15201
Best regards,
Huan Zhou me@per1cycle.org
with above fixed, then
Reviewed-by: Yixun Lan dlan@gentoo.org

On Tue, Jan 14, 2025 at 07:12:27AM +0000, Yixun Lan wrote:
Hi Huan
On 13:13 Tue 14 Jan , Huan Zhou wrote:
sry for the delay, i was setting my homelab these day.
On Tue, Jan 14, 2025 at 01:10:42PM +0800, Huan Zhou wrote:
these content is from the cover letter and imo should be ignore during patch step.
still wrong, at least tags will be lost
IMO, it would be better to have some commit message
ok.
This patch introduce improvement for get dram size on bananapi BPI-F3,
the patch for k1 SoC, it should be board agnostic ~~~~~~~~~~~~~~~~
retrieving the dram size dynamically. Have tested on bananapi Licheepi LPI3A 8G[1].
Links: [1] https://gist.github.com/per1cycle/e4eab66ebb6f83fe5118e823367fce28 .
Changes in v2:
- Fix bracker and return type in map_format_size() function.
- Add test log in the cover letter..
- Link to v1: https://lore.kernel.org/r/20250108-get-dram-size-v1-1-4bae32ecf756@per1cycle...
..
Signed-off-by: Huan Zhou me@per1cycle.org Tested-by: Marcel Ziswiler marcel@ziswiler.com # BPI-F3 16G
here lost
fixed.
arch/riscv/cpu/k1/dram.c | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/cpu/k1/dram.c b/arch/riscv/cpu/k1/dram.c index c477c15cbfb19f0e3a0ee72985b602f5bda352d7..4140440255fa1b3dbae521c58c6809445499a463 100644 --- a/arch/riscv/cpu/k1/dram.c +++ b/arch/riscv/cpu/k1/dram.c @@ -4,17 +4,53 @@ */
#include <asm/global_data.h> +#include <asm/io.h> #include <config.h> +#include <bitfield.h> #include <fdt_support.h> #include <linux/sizes.h>
+#define DDR_BASE 0xC0000000 DECLARE_GLOBAL_DATA_PTR;
+static inline phys_size_t map_format_size(u32 val)
I don't think it's necessary to use inline, it's not that short so personally I would drop it
fixed.
+{
- u32 tmp;
- if (!(val & 0x1))
return 0;
- tmp = bitfield_extract(val, 16, 5);
- switch (tmp) {
- case 0xd:
return 512;
- case 0xe:
return 1024;
- case 0xf:
return 2048;
- case 0x10:
return 4096;
- case 0x11:
return 8192;
- default:
pr_info("Invalid DRAM density %x\n", val);
return 0;
- }
+}
+phys_size_t ddr_get_density(void) +{
- phys_size_t cs0_size = map_format_size(readl((void *)DDR_BASE + 0x200));
- phys_size_t cs1_size = map_format_size(readl((void *)DDR_BASE + 0x208));
- phys_size_t ddr_size = cs0_size + cs1_size;
- return ddr_size;
+}
int dram_init(void) { gd->ram_base = CFG_SYS_SDRAM_BASE;
- /* TODO get ram size from ddr controller */
- gd->ram_size = SZ_4G;
- gd->ram_size = ddr_get_density() * SZ_1M; return 0;
}
base-commit: 19fc0b7f7d907119a13e9c207991899f0817f8fc change-id: 20250108-get-dram-size-65cf59a15201
Best regards,
Huan Zhou me@per1cycle.org
with above fixed, then
Reviewed-by: Yixun Lan dlan@gentoo.org
Yixun Lan (dlan) Gentoo Linux Developer GPG Key ID AABEFD55
participants (2)
-
Huan Zhou
-
Yixun Lan