[PATCH 0/3] Read mmc "power-domains" id from DT and use for firmware calls
In this patch series - Existing node_id is u8, change it to u32 to accommodate Versal node_id - Read "power-domains" id from DT and use in all firmware calls in place of node_id. - Remove static values of node_id which are set based on "device_id" - Remove "xlnx,device_id" from all dts files
Ashok Reddy Soma (3): mmc: zynq_sdhci: Change node_id prototype to u32 mmc: zynq_sdhci: Read power-domains id from DT and use arm64: dts: Remove unused property device_id
arch/arm/dts/versal-mini-emmc0.dts | 1 - arch/arm/dts/versal-mini-emmc1.dts | 1 - arch/arm/dts/zynqmp-mini-emmc0.dts | 1 - arch/arm/dts/zynqmp-mini-emmc1.dts | 1 - arch/arm/dts/zynqmp.dtsi | 2 -- drivers/mmc/zynq_sdhci.c | 53 +++++++++++++++--------------- 6 files changed, 27 insertions(+), 32 deletions(-)
In Versal platform power domain node_id is bigger than u8, hence change prototype to u32 to accommodate. Change u8 to u32 in the function prototypes that use node_id and remove casting to u32 from xilinx_pm_request() call parameters.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com ---
drivers/mmc/zynq_sdhci.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 8f4071c8c2..3a4194452c 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -111,7 +111,7 @@ static const u8 mode2timing[] = { [MMC_HS_200] = MMC_TIMING_MMC_HS200, };
-static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) +static inline int arasan_zynqmp_set_in_tapdelay(u32 node_id, u32 itap_delay) { int ret;
@@ -155,7 +155,7 @@ static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) if (ret) return ret; } else { - return xilinx_pm_request(PM_IOCTL, (u32)node_id, + return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, PM_TAPDELAY_INPUT, itap_delay, NULL); } @@ -163,7 +163,7 @@ static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) return 0; }
-static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32 otap_delay) +static inline int arasan_zynqmp_set_out_tapdelay(u32 node_id, u32 otap_delay) { if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { if (node_id == NODE_SD_0) @@ -174,13 +174,13 @@ static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32 otap_delay) return zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, (otap_delay << 16)); } else { - return xilinx_pm_request(PM_IOCTL, (u32)node_id, + return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, PM_TAPDELAY_OUTPUT, otap_delay, NULL); } }
-static inline int zynqmp_dll_reset(u8 node_id, u32 type) +static inline int zynqmp_dll_reset(u32 node_id, u32 type) { if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { if (node_id == NODE_SD_0) @@ -192,12 +192,12 @@ static inline int zynqmp_dll_reset(u8 node_id, u32 type) type == PM_DLL_RESET_ASSERT ? SD1_DLL_RST : 0); } else { - return xilinx_pm_request(PM_IOCTL, (u32)node_id, + return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET, type, 0, NULL); } }
-static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 node_id) +static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u32 node_id) { struct mmc *mmc = (struct mmc *)host->mmc; struct udevice *dev = mmc->dev;
On 9/30/22 18:25, Ashok Reddy Soma wrote:
In Versal platform power domain node_id is bigger than u8, hence change prototype to u32 to accommodate. Change u8 to u32 in the function prototypes that use node_id and remove casting to u32 from xilinx_pm_request() call parameters.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com
drivers/mmc/zynq_sdhci.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 8f4071c8c2..3a4194452c 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -111,7 +111,7 @@ static const u8 mode2timing[] = { [MMC_HS_200] = MMC_TIMING_MMC_HS200, };
-static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) +static inline int arasan_zynqmp_set_in_tapdelay(u32 node_id, u32 itap_delay)
Is it passed by u8 from sdhci_zynqmp_sampleclk_set_pahse()?
Best Regards, Jaehoon Chung
{ int ret;
@@ -155,7 +155,7 @@ static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) if (ret) return ret; } else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, PM_TAPDELAY_INPUT, itap_delay, NULL);@@ -163,7 +163,7 @@ static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) return 0; }
-static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32 otap_delay) +static inline int arasan_zynqmp_set_out_tapdelay(u32 node_id, u32 otap_delay) { if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { if (node_id == NODE_SD_0) @@ -174,13 +174,13 @@ static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32 otap_delay) return zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, (otap_delay << 16)); } else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, PM_TAPDELAY_OUTPUT, otap_delay, NULL);}
-static inline int zynqmp_dll_reset(u8 node_id, u32 type) +static inline int zynqmp_dll_reset(u32 node_id, u32 type) { if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { if (node_id == NODE_SD_0) @@ -192,12 +192,12 @@ static inline int zynqmp_dll_reset(u8 node_id, u32 type) type == PM_DLL_RESET_ASSERT ? SD1_DLL_RST : 0); } else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET, type, 0, NULL);}
-static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 node_id) +static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u32 node_id) { struct mmc *mmc = (struct mmc *)host->mmc; struct udevice *dev = mmc->dev;
Hi Jaehoon,
-----Original Message----- From: Jaehoon Chung jh80.chung@gmail.com Sent: Friday, October 7, 2022 6:16 PM To: Soma, Ashok Reddy ashok.reddy.soma@amd.com; u-boot@lists.denx.de Cc: Simek, Michal michal.simek@amd.com; peng.fan@nxp.com; jh80.chung@samsung.com; Halder, Ayan Kumar ayan.kumar.halder@amd.com; Mehta, Piyush piyush.mehta@amd.com; lakshmi.sai.krishna.potthuri@amd.com; shravya.kumbham@amd.com Subject: Re: [PATCH 1/3] mmc: zynq_sdhci: Change node_id prototype to u32
On 9/30/22 18:25, Ashok Reddy Soma wrote:
In Versal platform power domain node_id is bigger than u8, hence change prototype to u32 to accommodate. Change u8 to u32 in the function prototypes that use node_id and remove casting to u32 from xilinx_pm_request() call parameters.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com
drivers/mmc/zynq_sdhci.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 8f4071c8c2..3a4194452c 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -111,7 +111,7 @@ static const u8 mode2timing[] = { [MMC_HS_200] = MMC_TIMING_MMC_HS200, };
-static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) +static inline int arasan_zynqmp_set_in_tapdelay(u32 node_id, u32 +itap_delay)
Is it passed by u8 from sdhci_zynqmp_sampleclk_set_pahse()?
Seems like I missed to change the type to u32 from where these functions are called. But those lines are removed in patch 2/3. Should I send V2 or is it okay ?
Thanks, Ashok
Best Regards, Jaehoon Chung
{ int ret;
@@ -155,7 +155,7 @@ static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) if (ret) return ret; } else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, PM_TAPDELAY_INPUT, itap_delay, NULL);@@ -163,7 +163,7 @@ static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) return 0; }
-static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32 otap_delay) +static inline int arasan_zynqmp_set_out_tapdelay(u32 node_id, u32 +otap_delay) { if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { if (node_id == NODE_SD_0) @@ -174,13 +174,13 @@ static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32 otap_delay) return zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, (otap_delay << 16)); } else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, PM_TAPDELAY_OUTPUT, otap_delay, NULL);}
-static inline int zynqmp_dll_reset(u8 node_id, u32 type) +static inline int zynqmp_dll_reset(u32 node_id, u32 type) { if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { if (node_id == NODE_SD_0) @@ -192,12 +192,12 @@ static inline int zynqmp_dll_reset(u8 node_id, u32 type) type == PM_DLL_RESET_ASSERT ? SD1_DLL_RST : 0); } else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET, type, 0, NULL);}
-static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 node_id) +static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u32 +node_id) { struct mmc *mmc = (struct mmc *)host->mmc; struct udevice *dev = mmc->dev;
Hi,
-----Original Message----- From: Soma, Ashok Reddy [mailto:ashok.reddy.soma@amd.com] Sent: Wednesday, October 12, 2022 3:27 PM To: Jaehoon Chung jh80.chung@gmail.com; u-boot@lists.denx.de Cc: Simek, Michal michal.simek@amd.com; peng.fan@nxp.com; jh80.chung@samsung.com; Halder, Ayan Kumar ayan.kumar.halder@amd.com; Mehta, Piyush piyush.mehta@amd.com; lakshmi.sai.krishna.potthuri@amd.com; shravya.kumbham@amd.com Subject: RE: [PATCH 1/3] mmc: zynq_sdhci: Change node_id prototype to u32
Hi Jaehoon,
-----Original Message----- From: Jaehoon Chung jh80.chung@gmail.com Sent: Friday, October 7, 2022 6:16 PM To: Soma, Ashok Reddy ashok.reddy.soma@amd.com; u-boot@lists.denx.de Cc: Simek, Michal michal.simek@amd.com; peng.fan@nxp.com; jh80.chung@samsung.com; Halder, Ayan
Kumar ayan.kumar.halder@amd.com; Mehta, Piyush piyush.mehta@amd.com; lakshmi.sai.krishna.potthuri@amd.com; shravya.kumbham@amd.com
Subject: Re: [PATCH 1/3] mmc: zynq_sdhci: Change node_id prototype to u32
On 9/30/22 18:25, Ashok Reddy Soma wrote:
In Versal platform power domain node_id is bigger than u8, hence change prototype to u32 to accommodate. Change u8 to u32 in the function prototypes that use node_id and remove casting to u32 from xilinx_pm_request() call parameters.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com
drivers/mmc/zynq_sdhci.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 8f4071c8c2..3a4194452c 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -111,7 +111,7 @@ static const u8 mode2timing[] = { [MMC_HS_200] = MMC_TIMING_MMC_HS200, };
-static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) +static inline int arasan_zynqmp_set_in_tapdelay(u32 node_id, u32 +itap_delay)
Is it passed by u8 from sdhci_zynqmp_sampleclk_set_pahse()?
Seems like I missed to change the type to u32 from where these functions are called. But those lines are removed in patch 2/3. Should I send V2 or is it okay ?
I think that it doesn't need to resend V2. As you mentioned, it's removed on patch 2/3. And it was already applied. Sorry for reviewed too late.
Thanks!
Best Regards, Jaehoon Chung
Thanks, Ashok
Best Regards, Jaehoon Chung
{ int ret;
@@ -155,7 +155,7 @@ static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) if (ret) return ret; } else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, PM_TAPDELAY_INPUT, itap_delay, NULL);@@ -163,7 +163,7 @@ static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) return 0; }
-static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32 otap_delay) +static inline int arasan_zynqmp_set_out_tapdelay(u32 node_id, u32 +otap_delay) { if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { if (node_id == NODE_SD_0) @@ -174,13 +174,13 @@ static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32
otap_delay)
return zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, (otap_delay << 16));} else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, PM_TAPDELAY_OUTPUT, otap_delay, NULL);}
-static inline int zynqmp_dll_reset(u8 node_id, u32 type) +static inline int zynqmp_dll_reset(u32 node_id, u32 type) { if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { if (node_id == NODE_SD_0) @@ -192,12 +192,12 @@ static inline int zynqmp_dll_reset(u8 node_id, u32 type) type == PM_DLL_RESET_ASSERT ? SD1_DLL_RST : 0); } else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET, type, 0, NULL);}
-static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 node_id) +static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u32 +node_id) { struct mmc *mmc = (struct mmc *)host->mmc; struct udevice *dev = mmc->dev;
Hi Jaehoon,
-----Original Message----- From: 정재훈 jh80.chung@samsung.com Sent: Wednesday, October 12, 2022 3:09 PM To: Soma, Ashok Reddy ashok.reddy.soma@amd.com; 'Jaehoon Chung' jh80.chung@gmail.com; u-boot@lists.denx.de Cc: Simek, Michal michal.simek@amd.com; peng.fan@nxp.com; Halder, Ayan Kumar ayan.kumar.halder@amd.com; Mehta, Piyush piyush.mehta@amd.com; lakshmi.sai.krishna.potthuri@amd.com; shravya.kumbham@amd.com Subject: RE: [PATCH 1/3] mmc: zynq_sdhci: Change node_id prototype to u32
Hi,
-----Original Message----- From: Soma, Ashok Reddy [mailto:ashok.reddy.soma@amd.com] Sent: Wednesday, October 12, 2022 3:27 PM To: Jaehoon Chung jh80.chung@gmail.com; u-boot@lists.denx.de Cc: Simek, Michal michal.simek@amd.com; peng.fan@nxp.com; jh80.chung@samsung.com; Halder, Ayan Kumar ayan.kumar.halder@amd.com; Mehta, Piyush
lakshmi.sai.krishna.potthuri@amd.com; shravya.kumbham@amd.com Subject: RE: [PATCH 1/3] mmc: zynq_sdhci: Change node_id prototype to u32
Hi Jaehoon,
-----Original Message----- From: Jaehoon Chung jh80.chung@gmail.com Sent: Friday, October 7, 2022 6:16 PM To: Soma, Ashok Reddy ashok.reddy.soma@amd.com; u-boot@lists.denx.de Cc: Simek, Michal michal.simek@amd.com; peng.fan@nxp.com; jh80.chung@samsung.com; Halder, Ayan
Kumar ayan.kumar.halder@amd.com; Mehta, Piyush piyush.mehta@amd.com; lakshmi.sai.krishna.potthuri@amd.com; shravya.kumbham@amd.com
Subject: Re: [PATCH 1/3] mmc: zynq_sdhci: Change node_id prototype to u32
On 9/30/22 18:25, Ashok Reddy Soma wrote:
In Versal platform power domain node_id is bigger than u8, hence change prototype to u32 to accommodate. Change u8 to u32 in the function prototypes that use node_id and remove casting to u32 from xilinx_pm_request() call parameters.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com
drivers/mmc/zynq_sdhci.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 8f4071c8c2..3a4194452c 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -111,7 +111,7 @@ static const u8 mode2timing[] = { [MMC_HS_200] = MMC_TIMING_MMC_HS200, };
-static inline int arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay) +static inline int arasan_zynqmp_set_in_tapdelay(u32 node_id, u32 +itap_delay)
Is it passed by u8 from sdhci_zynqmp_sampleclk_set_pahse()?
Seems like I missed to change the type to u32 from where these functions are called. But those lines are removed in patch 2/3. Should I send V2 or is it okay ?
I think that it doesn't need to resend V2. As you mentioned, it's removed on patch 2/3. And it was already applied. Sorry for reviewed too late.
Never mind about the timing, it was a good catch. thanks for the review.
Thanks, Ashok
Thanks!
Best Regards, Jaehoon Chung
Thanks, Ashok
Best Regards, Jaehoon Chung
{ int ret;
@@ -155,7 +155,7 @@ static inline int
arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay)
if (ret) return ret;} else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, PM_TAPDELAY_INPUT, itap_delay,NULL);
} @@ -163,7 +163,7 @@ static inline int
arasan_zynqmp_set_in_tapdelay(u8 node_id, u32 itap_delay)
return 0; }
-static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32 otap_delay) +static inline int arasan_zynqmp_set_out_tapdelay(u32 node_id, u32 +otap_delay) { if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { if (node_id == NODE_SD_0) @@ -174,13 +174,13 @@ static inline int arasan_zynqmp_set_out_tapdelay(u8 node_id, u32
otap_delay)
return zynqmp_mmio_write(SD_OTAP_DLY,SD1_OTAPDLYSEL_MASK,
(otap_delay << 16));} else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, PM_TAPDELAY_OUTPUT, otap_delay,NULL);
} }
-static inline int zynqmp_dll_reset(u8 node_id, u32 type) +static inline int zynqmp_dll_reset(u32 node_id, u32 type) { if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3) { if (node_id == NODE_SD_0) @@ -192,12 +192,12 @@ static inline int zynqmp_dll_reset(u8 node_id,
u32 type)
type == PM_DLL_RESET_ASSERT ? SD1_DLL_RST : 0);} else {
return xilinx_pm_request(PM_IOCTL, (u32)node_id,
return xilinx_pm_request(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET, type, 0, NULL);}
-static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 node_id) +static int arasan_zynqmp_dll_reset(struct sdhci_host *host, u32 +node_id) { struct mmc *mmc = (struct mmc *)host->mmc; struct udevice *dev = mmc->dev;
Firmware calls need node_id which is basically "power-domains" id. At present static values are used based on the "device_id" property of dt. Instead of this, read "power-domains" id from dt and use it. Add a element called node_id in priv structure and read it from dt. Replace static node_id with this priv->node_id across the driver.
Since "device_id" is not used anywhere else simply remove it.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com ---
drivers/mmc/zynq_sdhci.c | 39 ++++++++++++++++++++------------------- 1 file changed, 20 insertions(+), 19 deletions(-)
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 3a4194452c..7dcf6ad842 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -61,7 +61,7 @@ struct arasan_sdhci_plat { struct arasan_sdhci_priv { struct sdhci_host *host; struct arasan_sdhci_clk_data clk_data; - u8 deviceid; + u32 node_id; u8 bank; u8 no_1p8; struct reset_ctl_bulk resets; @@ -250,7 +250,6 @@ static int arasan_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) struct sdhci_host *host; struct arasan_sdhci_priv *priv = dev_get_priv(mmc->dev); char tuning_loop_counter = SDHCI_TUNING_LOOP_COUNT; - u8 node_id = priv->deviceid ? NODE_SD_1 : NODE_SD_0;
dev_dbg(mmc->dev, "%s\n", __func__);
@@ -262,7 +261,7 @@ static int arasan_sdhci_execute_tuning(struct mmc *mmc, u8 opcode)
mdelay(1);
- arasan_zynqmp_dll_reset(host, node_id); + arasan_zynqmp_dll_reset(host, priv->node_id);
sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_INT_ENABLE); sdhci_writel(host, SDHCI_INT_DATA_AVAIL, SDHCI_SIGNAL_ENABLE); @@ -308,7 +307,7 @@ static int arasan_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) }
udelay(1); - arasan_zynqmp_dll_reset(host, node_id); + arasan_zynqmp_dll_reset(host, priv->node_id);
/* Enable only interrupts served by the SD controller */ sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK, @@ -334,7 +333,6 @@ static int sdhci_zynqmp_sdcardclk_set_phase(struct sdhci_host *host, struct mmc *mmc = (struct mmc *)host->mmc; struct udevice *dev = mmc->dev; struct arasan_sdhci_priv *priv = dev_get_priv(mmc->dev); - u8 node_id = priv->deviceid ? NODE_SD_1 : NODE_SD_0; u8 tap_delay, tap_max = 0; int timing = mode2timing[mmc->selected_mode]; int ret; @@ -374,14 +372,14 @@ static int sdhci_zynqmp_sdcardclk_set_phase(struct sdhci_host *host, tap_delay &= SDHCI_ARASAN_OTAPDLY_SEL_MASK;
/* Set the Clock Phase */ - ret = arasan_zynqmp_set_out_tapdelay(node_id, tap_delay); + ret = arasan_zynqmp_set_out_tapdelay(priv->node_id, tap_delay); if (ret) { dev_err(dev, "Error setting output Tap Delay\n"); return ret; }
/* Release DLL Reset */ - ret = zynqmp_dll_reset(node_id, PM_DLL_RESET_RELEASE); + ret = zynqmp_dll_reset(priv->node_id, PM_DLL_RESET_RELEASE); if (ret) { dev_err(dev, "dll_reset release failed with err: %d\n", ret); return ret; @@ -405,7 +403,6 @@ static int sdhci_zynqmp_sampleclk_set_phase(struct sdhci_host *host, struct mmc *mmc = (struct mmc *)host->mmc; struct udevice *dev = mmc->dev; struct arasan_sdhci_priv *priv = dev_get_priv(mmc->dev); - u8 node_id = priv->deviceid ? NODE_SD_1 : NODE_SD_0; u8 tap_delay, tap_max = 0; int timing = mode2timing[mmc->selected_mode]; int ret; @@ -419,7 +416,7 @@ static int sdhci_zynqmp_sampleclk_set_phase(struct sdhci_host *host, return 0;
/* Assert DLL Reset */ - ret = zynqmp_dll_reset(node_id, PM_DLL_RESET_ASSERT); + ret = zynqmp_dll_reset(priv->node_id, PM_DLL_RESET_ASSERT); if (ret) { dev_err(dev, "dll_reset assert failed with err: %d\n", ret); return ret; @@ -451,7 +448,7 @@ static int sdhci_zynqmp_sampleclk_set_phase(struct sdhci_host *host, /* Limit input tap_delay value to 8 bits */ tap_delay &= SDHCI_ARASAN_ITAPDLY_SEL_MASK;
- ret = arasan_zynqmp_set_in_tapdelay(node_id, tap_delay); + ret = arasan_zynqmp_set_in_tapdelay(priv->node_id, tap_delay); if (ret) { dev_err(dev, "Error setting Input Tap Delay\n"); return ret; @@ -717,14 +714,14 @@ static int sdhci_zynqmp_set_dynamic_config(struct arasan_sdhci_priv *priv, struct udevice *dev) { int ret; - u32 node_id = priv->deviceid ? NODE_SD_1 : NODE_SD_0; struct clk clk; unsigned long clock, mhz;
- ret = xilinx_pm_request(PM_REQUEST_NODE, node_id, ZYNQMP_PM_CAPABILITY_ACCESS, - ZYNQMP_PM_MAX_QOS, ZYNQMP_PM_REQUEST_ACK_NO, NULL); + ret = xilinx_pm_request(PM_REQUEST_NODE, priv->node_id, + ZYNQMP_PM_CAPABILITY_ACCESS, ZYNQMP_PM_MAX_QOS, + ZYNQMP_PM_REQUEST_ACK_NO, NULL); if (ret) { - dev_err(dev, "Request node failed for %d\n", node_id); + dev_err(dev, "Request node failed for %d\n", priv->node_id); return ret; }
@@ -743,13 +740,13 @@ static int sdhci_zynqmp_set_dynamic_config(struct arasan_sdhci_priv *priv, return ret; }
- ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_FIXED, 0); + ret = zynqmp_pm_set_sd_config(priv->node_id, SD_CONFIG_FIXED, 0); if (ret) { dev_err(dev, "SD_CONFIG_FIXED failed\n"); return ret; }
- ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_EMMC_SEL, + ret = zynqmp_pm_set_sd_config(priv->node_id, SD_CONFIG_EMMC_SEL, dev_read_bool(dev, "non-removable")); if (ret) { dev_err(dev, "SD_CONFIG_EMMC_SEL failed\n"); @@ -779,13 +776,13 @@ static int sdhci_zynqmp_set_dynamic_config(struct arasan_sdhci_priv *priv, else mhz = 25;
- ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_BASECLK, mhz); + ret = zynqmp_pm_set_sd_config(priv->node_id, SD_CONFIG_BASECLK, mhz); if (ret) { dev_err(dev, "SD_CONFIG_BASECLK failed\n"); return ret; }
- ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_8BIT, + ret = zynqmp_pm_set_sd_config(priv->node_id, SD_CONFIG_8BIT, (dev_read_u32_default(dev, "bus-width", 1) == 8)); if (ret) { dev_err(dev, "SD_CONFIG_8BIT failed\n"); @@ -900,6 +897,7 @@ static int arasan_sdhci_probe(struct udevice *dev) static int arasan_sdhci_of_to_plat(struct udevice *dev) { struct arasan_sdhci_priv *priv = dev_get_priv(dev); + u32 pm_info[2];
priv->host = calloc(1, sizeof(struct sdhci_host)); if (!priv->host) @@ -916,10 +914,13 @@ static int arasan_sdhci_of_to_plat(struct udevice *dev) if (IS_ERR(priv->host->ioaddr)) return PTR_ERR(priv->host->ioaddr);
- priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); priv->bank = dev_read_u32_default(dev, "xlnx,mio-bank", 0); priv->no_1p8 = dev_read_bool(dev, "no-1-8-v");
+ priv->node_id = 0; + if (!dev_read_u32_array(dev, "power-domains", pm_info, ARRAY_SIZE(pm_info))) + priv->node_id = pm_info[1]; + return 0; }
Device tree property "xlnx,device_id" is not used anymore, remove it.
Signed-off-by: Ashok Reddy Soma ashok.reddy.soma@amd.com ---
arch/arm/dts/versal-mini-emmc0.dts | 1 - arch/arm/dts/versal-mini-emmc1.dts | 1 - arch/arm/dts/zynqmp-mini-emmc0.dts | 1 - arch/arm/dts/zynqmp-mini-emmc1.dts | 1 - arch/arm/dts/zynqmp.dtsi | 2 -- 5 files changed, 6 deletions(-)
diff --git a/arch/arm/dts/versal-mini-emmc0.dts b/arch/arm/dts/versal-mini-emmc0.dts index 7c81a82fb9..d098c2d01b 100644 --- a/arch/arm/dts/versal-mini-emmc0.dts +++ b/arch/arm/dts/versal-mini-emmc0.dts @@ -44,7 +44,6 @@ reg = <0x0 0xf1040000 0x0 0x10000>; clock-names = "clk_xin", "clk_ahb"; clocks = <&clk200 &clk200>; - xlnx,device_id = <0>; no-1-8-v; xlnx,mio-bank = <0>; }; diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts index bf7569d4cc..9d4ac28359 100644 --- a/arch/arm/dts/versal-mini-emmc1.dts +++ b/arch/arm/dts/versal-mini-emmc1.dts @@ -44,7 +44,6 @@ reg = <0x0 0xf1050000 0x0 0x10000>; clock-names = "clk_xin", "clk_ahb"; clocks = <&clk200 &clk200>; - xlnx,device_id = <1>; no-1-8-v; xlnx,mio-bank = <0>; }; diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts index 8467dd8e1c..1cc4ade5e8 100644 --- a/arch/arm/dts/zynqmp-mini-emmc0.dts +++ b/arch/arm/dts/zynqmp-mini-emmc0.dts @@ -56,7 +56,6 @@ reg = <0x0 0xff160000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; clocks = <&clk_xin &clk_xin>; - xlnx,device_id = <0>; }; }; }; diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts index 2afcc7751b..96b5dc2932 100644 --- a/arch/arm/dts/zynqmp-mini-emmc1.dts +++ b/arch/arm/dts/zynqmp-mini-emmc1.dts @@ -56,7 +56,6 @@ reg = <0x0 0xff170000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; clocks = <&clk_xin &clk_xin>; - xlnx,device_id = <1>; }; }; }; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index fbc6e752da..2fbd0f711b 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -720,7 +720,6 @@ interrupts = <0 48 4>; reg = <0x0 0xff160000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; - xlnx,device_id = <0>; iommus = <&smmu 0x870>; #clock-cells = <1>; clock-output-names = "clk_out_sd0", "clk_in_sd0"; @@ -736,7 +735,6 @@ interrupts = <0 49 4>; reg = <0x0 0xff170000 0x0 0x1000>; clock-names = "clk_xin", "clk_ahb"; - xlnx,device_id = <1>; iommus = <&smmu 0x871>; #clock-cells = <1>; clock-output-names = "clk_out_sd1", "clk_in_sd1";
On 9/30/22 11:25, Ashok Reddy Soma wrote:
In this patch series
- Existing node_id is u8, change it to u32 to accommodate Versal node_id
- Read "power-domains" id from DT and use in all firmware calls in place of node_id.
- Remove static values of node_id which are set based on "device_id"
- Remove "xlnx,device_id" from all dts files
Ashok Reddy Soma (3): mmc: zynq_sdhci: Change node_id prototype to u32 mmc: zynq_sdhci: Read power-domains id from DT and use arm64: dts: Remove unused property device_id
arch/arm/dts/versal-mini-emmc0.dts | 1 - arch/arm/dts/versal-mini-emmc1.dts | 1 - arch/arm/dts/zynqmp-mini-emmc0.dts | 1 - arch/arm/dts/zynqmp-mini-emmc1.dts | 1 - arch/arm/dts/zynqmp.dtsi | 2 -- drivers/mmc/zynq_sdhci.c | 53 +++++++++++++++--------------- 6 files changed, 27 insertions(+), 32 deletions(-)
Applied. M
participants (5)
-
Ashok Reddy Soma -
Jaehoon Chung -
Michal Simek -
Soma, Ashok Reddy
-
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