[U-Boot] [PATCH] stm32f429-disco: ram: Adds stm32f429-disco fixes for HardFault at booting
- adds reading FMC swap setting from DTB to SDRAM driver - sets FMC swap for stm32f429-disco board - changes ram start address to 0x90000000
Signed-off-by: Radoslaw Pietrzyk radoslaw.pietrzyk@gmail.com --- arch/arm/dts/stm32f429-disco-u-boot.dtsi | 2 ++ drivers/ram/stm32_sdram.c | 37 +++++++++++++++++++++----------- include/configs/stm32f429-discovery.h | 6 +++--- 3 files changed, 29 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi b/arch/arm/dts/stm32f429-disco-u-boot.dtsi index 8a0f642..10e0950 100644 --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi @@ -37,6 +37,8 @@ clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; pinctrl-0 = <&fmc_pins>; pinctrl-names = "default"; + st,syscfg = <&syscfg>; + st,swp_fmc = <1>; u-boot,dm-pre-reloc;
/* diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c index dc39f33..eed3a22 100644 --- a/drivers/ram/stm32_sdram.c +++ b/drivers/ram/stm32_sdram.c @@ -11,6 +11,8 @@ #include <asm/io.h>
#define MEM_MODE_MASK GENMASK(2, 0) +#define SWP_FMC_OFFSET 10 +#define SWP_FMC_MASK GENMASK(SWP_FMC_OFFSET+1, SWP_FMC_OFFSET) #define NOT_FOUND 0xff
struct stm32_fmc_regs { @@ -256,27 +258,36 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev) struct ofnode_phandle_args args; u32 *syscfg_base; u32 mem_remap; + u32 swp_fmc; ofnode bank_node; char *bank_name; u8 bank = 0; int ret;
- mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND); - if (mem_remap != NOT_FOUND) { - ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, + ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, &args); - if (ret) { - debug("%s: can't find syscon device (%d)\n", __func__, - ret); - return ret; - } - + if (ret) { + debug("%s: can't find syscon device (%d)\n", __func__, ret); + } else { syscfg_base = (u32 *)ofnode_get_addr(args.node);
- /* set memory mapping selection */ - clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap); - } else { - debug("%s: cannot find st,mem_remap property\n", __func__); + mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND); + if (mem_remap != NOT_FOUND) { + /* set memory mapping selection */ + clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap); + } else { + debug("%s: cannot find st,mem_remap property\n", __func__); + } + + swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND); + if (swp_fmc != NOT_FOUND) { + /* set fmc swapping selection */ + clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc << SWP_FMC_OFFSET); + } else { + debug("%s: cannot find st,swp_fmc property\n", __func__); + } + + debug("syscfg %x = %x\n", (u32)syscfg_base, *syscfg_base); }
dev_for_each_subnode(bank_node, dev) { diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 4fd9c23..46eda1d 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -22,10 +22,10 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_RAM_CS 1 #define CONFIG_SYS_RAM_FREQ_DIV 2 -#define CONFIG_SYS_RAM_BASE 0xD0000000 +#define CONFIG_SYS_RAM_BASE 0x90000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE -#define CONFIG_SYS_LOAD_ADDR 0xD0400000 -#define CONFIG_LOADADDR 0xD0400000 +#define CONFIG_SYS_LOAD_ADDR 0x90400000 +#define CONFIG_LOADADDR 0x90400000
#define CONFIG_SYS_MAX_FLASH_SECT 12 #define CONFIG_SYS_MAX_FLASH_BANKS 2
Hi Radoslaw
Some minor remarks
On 05/15/2018 05:29 PM, Radoslaw Pietrzyk wrote:
- adds reading FMC swap setting from DTB to SDRAM driver
- sets FMC swap for stm32f429-disco board
- changes ram start address to 0x90000000
Signed-off-by: Radoslaw Pietrzyk radoslaw.pietrzyk@gmail.com
arch/arm/dts/stm32f429-disco-u-boot.dtsi | 2 ++ drivers/ram/stm32_sdram.c | 37 +++++++++++++++++++++----------- include/configs/stm32f429-discovery.h | 6 +++--- 3 files changed, 29 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi b/arch/arm/dts/stm32f429-disco-u-boot.dtsi index 8a0f642..10e0950 100644 --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi @@ -37,6 +37,8 @@ clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; pinctrl-0 = <&fmc_pins>; pinctrl-names = "default";
st,syscfg = <&syscfg>;st,swp_fmc = <1>; > u-boot,dm-pre-reloc; /*diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c index dc39f33..eed3a22 100644 --- a/drivers/ram/stm32_sdram.c +++ b/drivers/ram/stm32_sdram.c @@ -11,6 +11,8 @@ #include <asm/io.h>
#define MEM_MODE_MASK GENMASK(2, 0) +#define SWP_FMC_OFFSET 10 +#define SWP_FMC_MASK GENMASK(SWP_FMC_OFFSET+1, SWP_FMC_OFFSET)
I noticed that these SWP_FMC bits are not described into F429 speficication but in the F469 specification. Nevertheless, it fixes the issue for F429 ... :-)
#define NOT_FOUND 0xff
struct stm32_fmc_regs { @@ -256,27 +258,36 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev) struct ofnode_phandle_args args; u32 *syscfg_base; u32 mem_remap;
- u32 swp_fmc; ofnode bank_node; char *bank_name; u8 bank = 0; int ret;
- mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND);
- if (mem_remap != NOT_FOUND) {
ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
- ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, &args);
if (ret) {debug("%s: can't find syscon device (%d)\n", __func__,ret);return ret;}
- if (ret) {
debug("%s: can't find syscon device (%d)\n", __func__, ret);
replace debug() by dev_dbg()
- } else { syscfg_base = (u32 *)ofnode_get_addr(args.node);
/* set memory mapping selection */clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);- } else {
debug("%s: cannot find st,mem_remap property\n", __func__);
mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND);if (mem_remap != NOT_FOUND) {/* set memory mapping selection */clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);} else {debug("%s: cannot find st,mem_remap property\n", __func__);
ditto
}swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND);if (swp_fmc != NOT_FOUND) {/* set fmc swapping selection */clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc << SWP_FMC_OFFSET);} else {debug("%s: cannot find st,swp_fmc property\n", __func__);
ditto
}debug("syscfg %x = %x\n", (u32)syscfg_base, *syscfg_base);
ditto
}
dev_for_each_subnode(bank_node, dev) { diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 4fd9c23..46eda1d 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -22,10 +22,10 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_RAM_CS 1 #define CONFIG_SYS_RAM_FREQ_DIV 2 -#define CONFIG_SYS_RAM_BASE 0xD0000000 +#define CONFIG_SYS_RAM_BASE 0x90000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE -#define CONFIG_SYS_LOAD_ADDR 0xD0400000 -#define CONFIG_LOADADDR 0xD0400000 +#define CONFIG_SYS_LOAD_ADDR 0x90400000 +#define CONFIG_LOADADDR 0x90400000
#define CONFIG_SYS_MAX_FLASH_SECT 12 #define CONFIG_SYS_MAX_FLASH_BANKS 2
Thanks
Patrice
If they wasn't described I would not know about them. I have read DM00031020 document and found the description there. I'll send corrected v2 soon.
2018-05-16 9:59 GMT+02:00 Patrice CHOTARD patrice.chotard@st.com:
Hi Radoslaw
Some minor remarks
On 05/15/2018 05:29 PM, Radoslaw Pietrzyk wrote:
- adds reading FMC swap setting from DTB to SDRAM driver
- sets FMC swap for stm32f429-disco board
- changes ram start address to 0x90000000
Signed-off-by: Radoslaw Pietrzyk radoslaw.pietrzyk@gmail.com
arch/arm/dts/stm32f429-disco-u-boot.dtsi | 2 ++ drivers/ram/stm32_sdram.c | 37
+++++++++++++++++++++-----------
include/configs/stm32f429-discovery.h | 6 +++--- 3 files changed, 29 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi
b/arch/arm/dts/stm32f429-disco-u-boot.dtsi
index 8a0f642..10e0950 100644 --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi @@ -37,6 +37,8 @@ clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; pinctrl-0 = <&fmc_pins>; pinctrl-names = "default";
st,syscfg = <&syscfg>;st,swp_fmc = <1>; >u-boot,dm-pre-reloc;
/*diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c index dc39f33..eed3a22 100644 --- a/drivers/ram/stm32_sdram.c +++ b/drivers/ram/stm32_sdram.c @@ -11,6 +11,8 @@ #include <asm/io.h>
#define MEM_MODE_MASK GENMASK(2, 0) +#define SWP_FMC_OFFSET 10 +#define SWP_FMC_MASK GENMASK(SWP_FMC_OFFSET+1, SWP_FMC_OFFSET)
I noticed that these SWP_FMC bits are not described into F429 speficication but in the F469 specification. Nevertheless, it fixes the issue for F429 ... :-)
#define NOT_FOUND 0xff
struct stm32_fmc_regs { @@ -256,27 +258,36 @@ static int stm32_fmc_ofdata_to_platdata(struct
udevice *dev)
struct ofnode_phandle_args args; u32 *syscfg_base; u32 mem_remap;
u32 swp_fmc; ofnode bank_node; char *bank_name; u8 bank = 0; int ret;
mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND);if (mem_remap != NOT_FOUND) {ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL,0, 0,
ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, &args);
if (ret) {debug("%s: can't find syscon device (%d)\n",__func__,
ret);return ret;}
if (ret) {debug("%s: can't find syscon device (%d)\n", __func__,ret);
replace debug() by dev_dbg()
} else { syscfg_base = (u32 *)ofnode_get_addr(args.node);
/* set memory mapping selection */clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);} else {debug("%s: cannot find st,mem_remap property\n", __func__);
mem_remap = dev_read_u32_default(dev, "st,mem_remap",NOT_FOUND);
if (mem_remap != NOT_FOUND) {/* set memory mapping selection */clrsetbits_le32(syscfg_base, MEM_MODE_MASK,mem_remap);
} else {debug("%s: cannot find st,mem_remap property\n",__func__);
ditto
}swp_fmc = dev_read_u32_default(dev, "st,swp_fmc",NOT_FOUND);
if (swp_fmc != NOT_FOUND) {/* set fmc swapping selection */clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc<< SWP_FMC_OFFSET);
} else {debug("%s: cannot find st,swp_fmc property\n",__func__);
ditto
}debug("syscfg %x = %x\n", (u32)syscfg_base, *syscfg_base);ditto
} dev_for_each_subnode(bank_node, dev) {diff --git a/include/configs/stm32f429-discovery.h
b/include/configs/stm32f429-discovery.h
index 4fd9c23..46eda1d 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -22,10 +22,10 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_RAM_CS 1 #define CONFIG_SYS_RAM_FREQ_DIV 2 -#define CONFIG_SYS_RAM_BASE 0xD0000000 +#define CONFIG_SYS_RAM_BASE 0x90000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE -#define CONFIG_SYS_LOAD_ADDR 0xD0400000 -#define CONFIG_LOADADDR 0xD0400000 +#define CONFIG_SYS_LOAD_ADDR 0x90400000 +#define CONFIG_LOADADDR 0x90400000
#define CONFIG_SYS_MAX_FLASH_SECT 12 #define CONFIG_SYS_MAX_FLASH_BANKS 2
Thanks
Patrice
On 05/16/2018 10:05 AM, Radosław Pietrzyk wrote:
If they wasn't described I would not know about them. I have read DM00031020 document and found the description there. I'll send corrected v2 soon.
You are right, i just look into the wrong chapter, SWP_FMC is not available for all F4 SoCs family. Only F42x/43x implements it, not F405/407/415/417 ...
Patrice
2018-05-16 9:59 GMT+02:00 Patrice CHOTARD <patrice.chotard@st.com mailto:patrice.chotard@st.com>:
Hi Radoslaw Some minor remarks On 05/15/2018 05:29 PM, Radoslaw Pietrzyk wrote: > - adds reading FMC swap setting from DTB to SDRAM driver > - sets FMC swap for stm32f429-disco board > - changes ram start address to 0x90000000 > > Signed-off-by: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com <mailto:radoslaw.pietrzyk@gmail.com>> > --- > arch/arm/dts/stm32f429-disco-u-boot.dtsi | 2 ++ > drivers/ram/stm32_sdram.c | 37 +++++++++++++++++++++----------- > include/configs/stm32f429-discovery.h | 6 +++--- > 3 files changed, 29 insertions(+), 16 deletions(-) > > diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi b/arch/arm/dts/stm32f429-disco-u-boot.dtsi > index 8a0f642..10e0950 100644 > --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi > +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi > @@ -37,6 +37,8 @@ > clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; > pinctrl-0 = <&fmc_pins>; > pinctrl-names = "default"; > + st,syscfg = <&syscfg>; > + st,swp_fmc = <1>; > u-boot,dm-pre-reloc; > > /* > diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c > index dc39f33..eed3a22 100644 > --- a/drivers/ram/stm32_sdram.c > +++ b/drivers/ram/stm32_sdram.c > @@ -11,6 +11,8 @@ > #include <asm/io.h> > > #define MEM_MODE_MASK GENMASK(2, 0) > +#define SWP_FMC_OFFSET 10 > +#define SWP_FMC_MASK GENMASK(SWP_FMC_OFFSET+1, SWP_FMC_OFFSET) I noticed that these SWP_FMC bits are not described into F429 speficication but in the F469 specification. Nevertheless, it fixes the issue for F429 ... :-) > #define NOT_FOUND 0xff > > struct stm32_fmc_regs { > @@ -256,27 +258,36 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev) > struct ofnode_phandle_args args; > u32 *syscfg_base; > u32 mem_remap; > + u32 swp_fmc; > ofnode bank_node; > char *bank_name; > u8 bank = 0; > int ret; > > - mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND); > - if (mem_remap != NOT_FOUND) { > - ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, > + ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, > &args); > - if (ret) { > - debug("%s: can't find syscon device (%d)\n", __func__, > - ret); > - return ret; > - } > - > + if (ret) { > + debug("%s: can't find syscon device (%d)\n", __func__, ret); replace debug() by dev_dbg() > + } else { > syscfg_base = (u32 *)ofnode_get_addr(args.node); > > - /* set memory mapping selection */ > - clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap); > - } else { > - debug("%s: cannot find st,mem_remap property\n", __func__); > + mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND); > + if (mem_remap != NOT_FOUND) { > + /* set memory mapping selection */ > + clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap); > + } else { > + debug("%s: cannot find st,mem_remap property\n", __func__); ditto > + } > + > + swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND); > + if (swp_fmc != NOT_FOUND) { > + /* set fmc swapping selection */ > + clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc << SWP_FMC_OFFSET); > + } else { > + debug("%s: cannot find st,swp_fmc property\n", __func__); ditto > + } > + > + debug("syscfg %x = %x\n", (u32)syscfg_base, *syscfg_base); ditto > } > > dev_for_each_subnode(bank_node, dev) { > diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h > index 4fd9c23..46eda1d 100644 > --- a/include/configs/stm32f429-discovery.h > +++ b/include/configs/stm32f429-discovery.h > @@ -22,10 +22,10 @@ > #define CONFIG_NR_DRAM_BANKS 1 > #define CONFIG_SYS_RAM_CS 1 > #define CONFIG_SYS_RAM_FREQ_DIV 2 > -#define CONFIG_SYS_RAM_BASE 0xD0000000 > +#define CONFIG_SYS_RAM_BASE 0x90000000 > #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE > -#define CONFIG_SYS_LOAD_ADDR 0xD0400000 > -#define CONFIG_LOADADDR 0xD0400000 > +#define CONFIG_SYS_LOAD_ADDR 0x90400000 > +#define CONFIG_LOADADDR 0x90400000 > > #define CONFIG_SYS_MAX_FLASH_SECT 12 > #define CONFIG_SYS_MAX_FLASH_BANKS 2 > Thanks Patrice
- adds reading FMC swap setting from DTB to SDRAM driver - sets FMC swap for stm32f429-disco board - changes ram start address to 0x90000000
Signed-off-by: Radoslaw Pietrzyk radoslaw.pietrzyk@gmail.com --- arch/arm/dts/stm32f429-disco-u-boot.dtsi | 2 ++ drivers/ram/stm32_sdram.c | 37 +++++++++++++++++++++----------- include/configs/stm32f429-discovery.h | 6 +++--- 3 files changed, 29 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi b/arch/arm/dts/stm32f429-disco-u-boot.dtsi index 8a0f642..10e0950 100644 --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi @@ -37,6 +37,8 @@ clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; pinctrl-0 = <&fmc_pins>; pinctrl-names = "default"; + st,syscfg = <&syscfg>; + st,swp_fmc = <1>; u-boot,dm-pre-reloc;
/* diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c index dc39f33..f6cac8e 100644 --- a/drivers/ram/stm32_sdram.c +++ b/drivers/ram/stm32_sdram.c @@ -11,6 +11,8 @@ #include <asm/io.h>
#define MEM_MODE_MASK GENMASK(2, 0) +#define SWP_FMC_OFFSET 10 +#define SWP_FMC_MASK GENMASK(SWP_FMC_OFFSET+1, SWP_FMC_OFFSET) #define NOT_FOUND 0xff
struct stm32_fmc_regs { @@ -256,27 +258,36 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev) struct ofnode_phandle_args args; u32 *syscfg_base; u32 mem_remap; + u32 swp_fmc; ofnode bank_node; char *bank_name; u8 bank = 0; int ret;
- mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND); - if (mem_remap != NOT_FOUND) { - ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, + ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, &args); - if (ret) { - debug("%s: can't find syscon device (%d)\n", __func__, - ret); - return ret; - } - + if (ret) { + dev_dbg(dev, "%s: can't find syscon device (%d)\n", __func__, ret); + } else { syscfg_base = (u32 *)ofnode_get_addr(args.node);
- /* set memory mapping selection */ - clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap); - } else { - debug("%s: cannot find st,mem_remap property\n", __func__); + mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND); + if (mem_remap != NOT_FOUND) { + /* set memory mapping selection */ + clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap); + } else { + dev_dbg(dev, "%s: cannot find st,mem_remap property\n", __func__); + } + + swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND); + if (swp_fmc != NOT_FOUND) { + /* set fmc swapping selection */ + clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc << SWP_FMC_OFFSET); + } else { + dev_dbg(dev, "%s: cannot find st,swp_fmc property\n", __func__); + } + + dev_dbg(dev, "syscfg %x = %x\n", (u32)syscfg_base, *syscfg_base); }
dev_for_each_subnode(bank_node, dev) { diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 4fd9c23..46eda1d 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -22,10 +22,10 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_RAM_CS 1 #define CONFIG_SYS_RAM_FREQ_DIV 2 -#define CONFIG_SYS_RAM_BASE 0xD0000000 +#define CONFIG_SYS_RAM_BASE 0x90000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE -#define CONFIG_SYS_LOAD_ADDR 0xD0400000 -#define CONFIG_LOADADDR 0xD0400000 +#define CONFIG_SYS_LOAD_ADDR 0x90400000 +#define CONFIG_LOADADDR 0x90400000
#define CONFIG_SYS_MAX_FLASH_SECT 12 #define CONFIG_SYS_MAX_FLASH_BANKS 2
Hi Radoslaw
On 05/16/2018 05:27 PM, Radoslaw Pietrzyk wrote:
- adds reading FMC swap setting from DTB to SDRAM driver
- sets FMC swap for stm32f429-disco board
- changes ram start address to 0x90000000
Signed-off-by: Radoslaw Pietrzyk radoslaw.pietrzyk@gmail.com
arch/arm/dts/stm32f429-disco-u-boot.dtsi | 2 ++ drivers/ram/stm32_sdram.c | 37 +++++++++++++++++++++----------- include/configs/stm32f429-discovery.h | 6 +++--- 3 files changed, 29 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/stm32f429-disco-u-boot.dtsi b/arch/arm/dts/stm32f429-disco-u-boot.dtsi index 8a0f642..10e0950 100644 --- a/arch/arm/dts/stm32f429-disco-u-boot.dtsi +++ b/arch/arm/dts/stm32f429-disco-u-boot.dtsi @@ -37,6 +37,8 @@ clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>; pinctrl-0 = <&fmc_pins>; pinctrl-names = "default";
st,syscfg = <&syscfg>;st,swp_fmc = <1>; u-boot,dm-pre-reloc; /*diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c index dc39f33..f6cac8e 100644 --- a/drivers/ram/stm32_sdram.c +++ b/drivers/ram/stm32_sdram.c @@ -11,6 +11,8 @@ #include <asm/io.h>
#define MEM_MODE_MASK GENMASK(2, 0) +#define SWP_FMC_OFFSET 10 +#define SWP_FMC_MASK GENMASK(SWP_FMC_OFFSET+1, SWP_FMC_OFFSET) #define NOT_FOUND 0xff
struct stm32_fmc_regs { @@ -256,27 +258,36 @@ static int stm32_fmc_ofdata_to_platdata(struct udevice *dev) struct ofnode_phandle_args args; u32 *syscfg_base; u32 mem_remap;
- u32 swp_fmc; ofnode bank_node; char *bank_name; u8 bank = 0; int ret;
- mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND);
- if (mem_remap != NOT_FOUND) {
ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0,
- ret = dev_read_phandle_with_args(dev, "st,syscfg", NULL, 0, 0, &args);
if (ret) {debug("%s: can't find syscon device (%d)\n", __func__,ret);return ret;}
- if (ret) {
dev_dbg(dev, "%s: can't find syscon device (%d)\n", __func__, ret);- } else { syscfg_base = (u32 *)ofnode_get_addr(args.node);
/* set memory mapping selection */clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);- } else {
debug("%s: cannot find st,mem_remap property\n", __func__);
mem_remap = dev_read_u32_default(dev, "st,mem_remap", NOT_FOUND);if (mem_remap != NOT_FOUND) {/* set memory mapping selection */clrsetbits_le32(syscfg_base, MEM_MODE_MASK, mem_remap);} else {dev_dbg(dev, "%s: cannot find st,mem_remap property\n", __func__);}swp_fmc = dev_read_u32_default(dev, "st,swp_fmc", NOT_FOUND);if (swp_fmc != NOT_FOUND) {/* set fmc swapping selection */clrsetbits_le32(syscfg_base, SWP_FMC_MASK, swp_fmc << SWP_FMC_OFFSET);} else {dev_dbg(dev, "%s: cannot find st,swp_fmc property\n", __func__);}dev_dbg(dev, "syscfg %x = %x\n", (u32)syscfg_base, *syscfg_base);}
dev_for_each_subnode(bank_node, dev) {
diff --git a/include/configs/stm32f429-discovery.h b/include/configs/stm32f429-discovery.h index 4fd9c23..46eda1d 100644 --- a/include/configs/stm32f429-discovery.h +++ b/include/configs/stm32f429-discovery.h @@ -22,10 +22,10 @@ #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_SYS_RAM_CS 1 #define CONFIG_SYS_RAM_FREQ_DIV 2 -#define CONFIG_SYS_RAM_BASE 0xD0000000 +#define CONFIG_SYS_RAM_BASE 0x90000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_RAM_BASE -#define CONFIG_SYS_LOAD_ADDR 0xD0400000 -#define CONFIG_LOADADDR 0xD0400000 +#define CONFIG_SYS_LOAD_ADDR 0x90400000 +#define CONFIG_LOADADDR 0x90400000
#define CONFIG_SYS_MAX_FLASH_SECT 12 #define CONFIG_SYS_MAX_FLASH_BANKS 2
Acked-by: Patrice Chotard patrice.chotard@st.com
Thanks
On Wed, May 16, 2018 at 05:27:11PM +0200, Radoslaw Pietrzyk wrote:
- adds reading FMC swap setting from DTB to SDRAM driver
- sets FMC swap for stm32f429-disco board
- changes ram start address to 0x90000000
Signed-off-by: Radoslaw Pietrzyk radoslaw.pietrzyk@gmail.com Acked-by: Patrice Chotard patrice.chotard@st.com
Applied to u-boot/master, thanks!
participants (4)
-
Patrice CHOTARD -
Radoslaw Pietrzyk -
Radosław Pietrzyk
-
Tom Rini