Dear Sergey Alyoshin,

On Tuesday, December 17, 2013 8:24:54 PM, Sergey Alyoshin wrote:

Enable fuse supply before fuse programming and disable after.

Signed-off-by: Sergey Alyoshin alyoshin.s@gmail.com

arch/arm/cpu/armv7/mx5/clock.c | 12 ++++++++++++ arch/arm/include/asm/arch-mx5/clock.h | 1 + arch/arm/include/asm/arch-mx5/crm_regs.h | 3 +++ drivers/misc/fsl_iim.c | 13 ++++++++++++- 4 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/mx5/clock.c b/arch/arm/cpu/armv7/mx5/clock.c index fb3b128..2ca87e4 100644 --- a/arch/arm/cpu/armv7/mx5/clock.c +++ b/arch/arm/cpu/armv7/mx5/clock.c @@ -749,6 +749,18 @@ void enable_nfc_clk(unsigned char enable) MXC_CCM_CCGR5_EMI_ENFC(cg)); }

+#ifdef CONFIG_FSL_IIM +void enable_efuse_prog_supply(bool enable) +{

• if (enable)

• setbits_le32(&mxc_ccm->cgpr,
  

• 		MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE);
  

• else

• clrbits_le32(&mxc_ccm->cgpr,
  

• 		MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE);
  

+} +#endif

/* Config main_bus_clock for periphs */ static int config_periph_clk(u32 ref, u32 freq) { diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h index 9ee79ae..3db4112 100644 --- a/arch/arm/include/asm/arch-mx5/clock.h +++ b/arch/arm/include/asm/arch-mx5/clock.h @@ -53,5 +53,6 @@ void enable_usboh3_clk(bool enable); void mxc_set_sata_internal_clock(void); int enable_i2c_clk(unsigned char enable, unsigned i2c_num); void enable_nfc_clk(unsigned char enable); +void enable_efuse_prog_supply(bool enable);

#endif /* __ASM_ARCH_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-mx5/crm_regs.h b/arch/arm/include/asm/arch-mx5/crm_regs.h index 392881c..efe57e0 100644 --- a/arch/arm/include/asm/arch-mx5/crm_regs.h +++ b/arch/arm/include/asm/arch-mx5/crm_regs.h @@ -305,6 +305,9 @@ struct mxc_ccm_reg { /* Define the bits in register CCDR */ #define MXC_CCM_CCDR_IPU_HS_MASK (0x1 << 17)

+/* Define the bits in register CGPR */ +#define MXC_CCM_CGPR_EFUSE_PROG_SUPPLY_GATE (1 << 4)

/* Define the bits in register CCGRx */ #define MXC_CCM_CCGR_CG_MASK 0x3 #define MXC_CCM_CCGR_CG_OFF 0x0 diff --git a/drivers/misc/fsl_iim.c b/drivers/misc/fsl_iim.c index 44ae7b1..36433a7 100644 --- a/drivers/misc/fsl_iim.c +++ b/drivers/misc/fsl_iim.c @@ -16,6 +16,9 @@ #ifndef CONFIG_MPC512X #include <asm/arch/imx-regs.h> #endif +#if defined(CONFIG_MX51) || defined(CONFIG_MX53) +#include <asm/arch/clock.h> +#endif

/* FSL IIM-specific constants */ #define STAT_BUSY 0x80 @@ -93,6 +96,10 @@ struct fsl_iim { } bank[8]; };

+#if !defined(CONFIG_MX51) && !defined(CONFIG_MX53) +#define enable_efuse_prog_supply(enable) +#endif

static int prepare_access(struct fsl_iim **regs, u32 bank, u32 word, int assert, const char *caller) { @@ -237,12 +244,16 @@ int fuse_prog(u32 bank, u32 word, u32 val) if (ret) return ret;

• enable_efuse_prog_supply(1); for (bit = 0; val; bit++, val >>= 1) if (val & 0x01) { ret = prog_bit(regs, bank, word, bit);

• 	if (ret)
  

• 	if (ret) {
  

• 		enable_efuse_prog_supply(0);
  	return ret;
  

• 	}
  

  }

• enable_efuse_prog_supply(0);

  return 0;

}

1.7.10.4

Reviewed-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com

Thanks for this contribution and for your patience.

Best regards, Benoît